arch/arm64/boot/dts/renesas/r8a77961.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77961-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A77961_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a77961";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         /*
  20          * The external audio clocks are configured as 0 Hz fixed frequency
  21          * clocks by default.
  22          * Boards that provide audio clocks should override them.
  23          */
  24         audio_clk_a: audio_clk_a {
  25                 compatible = "fixed-clock";
  26                 #clock-cells = <0>;
  27                 clock-frequency = <0>;
  28         };
  29
  30         audio_clk_b: audio_clk_b {
  31                 compatible = "fixed-clock";
  32                 #clock-cells = <0>;
  33                 clock-frequency = <0>;
  34         };
  35
  36         audio_clk_c: audio_clk_c {
  37                 compatible = "fixed-clock";
  38                 #clock-cells = <0>;
  39                 clock-frequency = <0>;
  40         };
  41
  42         /* External CAN clock - to be overridden by boards that provide it */
  43         can_clk: can {
  44                 compatible = "fixed-clock";
  45                 #clock-cells = <0>;
  46                 clock-frequency = <0>;
  47         };
  48
  49         cluster0_opp: opp_table0 {
  50                 compatible = "operating-points-v2";
  51                 opp-shared;
  52
  53                 opp-500000000 {
  54                         opp-hz = /bits/ 64 <500000000>;
  55                         opp-microvolt = <830000>;
  56                         clock-latency-ns = <300000>;
  57                 };
  58                 opp-1000000000 {
  59                         opp-hz = /bits/ 64 <1000000000>;
  60                         opp-microvolt = <830000>;
  61                         clock-latency-ns = <300000>;
  62                 };
  63                 opp-1500000000 {
  64                         opp-hz = /bits/ 64 <1500000000>;
  65                         opp-microvolt = <830000>;
  66                         clock-latency-ns = <300000>;
  67                         opp-suspend;
  68                 };
  69                 opp-1600000000 {
  70                         opp-hz = /bits/ 64 <1600000000>;
  71                         opp-microvolt = <900000>;
  72                         clock-latency-ns = <300000>;
  73                         turbo-mode;
  74                 };
  75                 opp-1700000000 {
  76                         opp-hz = /bits/ 64 <1700000000>;
  77                         opp-microvolt = <900000>;
  78                         clock-latency-ns = <300000>;
  79                         turbo-mode;
  80                 };
  81                 opp-1800000000 {
  82                         opp-hz = /bits/ 64 <1800000000>;
  83                         opp-microvolt = <960000>;
  84                         clock-latency-ns = <300000>;
  85                         turbo-mode;
  86                 };
  87         };
  88
  89         cluster1_opp: opp_table1 {
  90                 compatible = "operating-points-v2";
  91                 opp-shared;
  92
  93                 opp-800000000 {
  94                         opp-hz = /bits/ 64 <800000000>;
  95                         opp-microvolt = <820000>;
  96                         clock-latency-ns = <300000>;
  97                 };
  98                 opp-1000000000 {
  99                         opp-hz = /bits/ 64 <1000000000>;
 100                         opp-microvolt = <820000>;
 101                         clock-latency-ns = <300000>;
 102                 };
 103                 opp-1200000000 {
 104                         opp-hz = /bits/ 64 <1200000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1300000000 {
 109                         opp-hz = /bits/ 64 <1300000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                         turbo-mode;
 113                 };
 114         };
 115
 116         cpus {
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119
 120                 cpu-map {
 121                         cluster0 {
 122                                 core0 {
 123                                         cpu = <&a57_0>;
 124                                 };
 125                                 core1 {
 126                                         cpu = <&a57_1>;
 127                                 };
 128                         };
 129
 130                         cluster1 {
 131                                 core0 {
 132                                         cpu = <&a53_0>;
 133                                 };
 134                                 core1 {
 135                                         cpu = <&a53_1>;
 136                                 };
 137                                 core2 {
 138                                         cpu = <&a53_2>;
 139                                 };
 140                                 core3 {
 141                                         cpu = <&a53_3>;
 142                                 };
 143                         };
 144                 };
 145
 146                 a57_0: cpu@0 {
 147                         compatible = "arm,cortex-a57";
 148                         reg = <0x0>;
 149                         device_type = "cpu";
 150                         power-domains = <&sysc R8A77961_PD_CA57_CPU0>;
 151                         next-level-cache = <&L2_CA57>;
 152                         enable-method = "psci";
 153                         cpu-idle-states = <&CPU_SLEEP_0>;
 154                         dynamic-power-coefficient = <854>;
 155                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
 156                         operating-points-v2 = <&cluster0_opp>;
 157                         capacity-dmips-mhz = <1024>;
 158                         #cooling-cells = <2>;
 159                 };
 160
 161                 a57_1: cpu@1 {
 162                         compatible = "arm,cortex-a57";
 163                         reg = <0x1>;
 164                         device_type = "cpu";
 165                         power-domains = <&sysc R8A77961_PD_CA57_CPU1>;
 166                         next-level-cache = <&L2_CA57>;
 167                         enable-method = "psci";
 168                         cpu-idle-states = <&CPU_SLEEP_0>;
 169                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
 170                         operating-points-v2 = <&cluster0_opp>;
 171                         capacity-dmips-mhz = <1024>;
 172                         #cooling-cells = <2>;
 173                 };
 174
 175                 a53_0: cpu@100 {
 176                         compatible = "arm,cortex-a53";
 177                         reg = <0x100>;
 178                         device_type = "cpu";
 179                         power-domains = <&sysc R8A77961_PD_CA53_CPU0>;
 180                         next-level-cache = <&L2_CA53>;
 181                         enable-method = "psci";
 182                         cpu-idle-states = <&CPU_SLEEP_1>;
 183                         #cooling-cells = <2>;
 184                         dynamic-power-coefficient = <277>;
 185                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 186                         operating-points-v2 = <&cluster1_opp>;
 187                         capacity-dmips-mhz = <535>;
 188                 };
 189
 190                 a53_1: cpu@101 {
 191                         compatible = "arm,cortex-a53";
 192                         reg = <0x101>;
 193                         device_type = "cpu";
 194                         power-domains = <&sysc R8A77961_PD_CA53_CPU1>;
 195                         next-level-cache = <&L2_CA53>;
 196                         enable-method = "psci";
 197                         cpu-idle-states = <&CPU_SLEEP_1>;
 198                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 199                         operating-points-v2 = <&cluster1_opp>;
 200                         capacity-dmips-mhz = <535>;
 201                 };
 202
 203                 a53_2: cpu@102 {
 204                         compatible = "arm,cortex-a53";
 205                         reg = <0x102>;
 206                         device_type = "cpu";
 207                         power-domains = <&sysc R8A77961_PD_CA53_CPU2>;
 208                         next-level-cache = <&L2_CA53>;
 209                         enable-method = "psci";
 210                         cpu-idle-states = <&CPU_SLEEP_1>;
 211                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 212                         operating-points-v2 = <&cluster1_opp>;
 213                         capacity-dmips-mhz = <535>;
 214                 };
 215
 216                 a53_3: cpu@103 {
 217                         compatible = "arm,cortex-a53";
 218                         reg = <0x103>;
 219                         device_type = "cpu";
 220                         power-domains = <&sysc R8A77961_PD_CA53_CPU3>;
 221                         next-level-cache = <&L2_CA53>;
 222                         enable-method = "psci";
 223                         cpu-idle-states = <&CPU_SLEEP_1>;
 224                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 225                         operating-points-v2 = <&cluster1_opp>;
 226                         capacity-dmips-mhz = <535>;
 227                 };
 228
 229                 L2_CA57: cache-controller-0 {
 230                         compatible = "cache";
 231                         power-domains = <&sysc R8A77961_PD_CA57_SCU>;
 232                         cache-unified;
 233                         cache-level = <2>;
 234                 };
 235
 236                 L2_CA53: cache-controller-1 {
 237                         compatible = "cache";
 238                         power-domains = <&sysc R8A77961_PD_CA53_SCU>;
 239                         cache-unified;
 240                         cache-level = <2>;
 241                 };
 242
 243                 idle-states {
 244                         entry-method = "psci";
 245
 246                         CPU_SLEEP_0: cpu-sleep-0 {
 247                                 compatible = "arm,idle-state";
 248                                 arm,psci-suspend-param = <0x0010000>;
 249                                 local-timer-stop;
 250                                 entry-latency-us = <400>;
 251                                 exit-latency-us = <500>;
 252                                 min-residency-us = <4000>;
 253                         };
 254
 255                         CPU_SLEEP_1: cpu-sleep-1 {
 256                                 compatible = "arm,idle-state";
 257                                 arm,psci-suspend-param = <0x0010000>;
 258                                 local-timer-stop;
 259                                 entry-latency-us = <700>;
 260                                 exit-latency-us = <700>;
 261                                 min-residency-us = <5000>;
 262                         };
 263                 };
 264         };
 265
 266         extal_clk: extal {
 267                 compatible = "fixed-clock";
 268                 #clock-cells = <0>;
 269                 /* This value must be overridden by the board */
 270                 clock-frequency = <0>;
 271         };
 272
 273         extalr_clk: extalr {
 274                 compatible = "fixed-clock";
 275                 #clock-cells = <0>;
 276                 /* This value must be overridden by the board */
 277                 clock-frequency = <0>;
 278         };
 279
 280         /* External PCIe clock - can be overridden by the board */
 281         pcie_bus_clk: pcie_bus {
 282                 compatible = "fixed-clock";
 283                 #clock-cells = <0>;
 284                 clock-frequency = <0>;
 285         };
 286
 287         pmu_a53 {
 288                 compatible = "arm,cortex-a53-pmu";
 289                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 290                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 291                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 292                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 293                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 294         };
 295
 296         pmu_a57 {
 297                 compatible = "arm,cortex-a57-pmu";
 298                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 299                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 300                 interrupt-affinity = <&a57_0>, <&a57_1>;
 301         };
 302
 303         psci {
 304                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 305                 method = "smc";
 306         };
 307
 308         /* External SCIF clock - to be overridden by boards that provide it */
 309         scif_clk: scif {
 310                 compatible = "fixed-clock";
 311                 #clock-cells = <0>;
 312                 clock-frequency = <0>;
 313         };
 314
 315         soc {
 316                 compatible = "simple-bus";
 317                 interrupt-parent = <&gic>;
 318                 #address-cells = <2>;
 319                 #size-cells = <2>;
 320                 ranges;
 321
 322                 rwdt: watchdog@e6020000 {
 323                         compatible = "renesas,r8a77961-wdt",
 324                                      "renesas,rcar-gen3-wdt";
 325                         reg = <0 0xe6020000 0 0x0c>;
 326                         clocks = <&cpg CPG_MOD 402>;
 327                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 328                         resets = <&cpg 402>;
 329                         status = "disabled";
 330                 };
 331
 332                 gpio0: gpio@e6050000 {
 333                         compatible = "renesas,gpio-r8a77961",
 334                                      "renesas,rcar-gen3-gpio";
 335                         reg = <0 0xe6050000 0 0x50>;
 336                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 337                         #gpio-cells = <2>;
 338                         gpio-controller;
 339                         gpio-ranges = <&pfc 0 0 16>;
 340                         #interrupt-cells = <2>;
 341                         interrupt-controller;
 342                         clocks = <&cpg CPG_MOD 912>;
 343                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 344                         resets = <&cpg 912>;
 345                 };
 346
 347                 gpio1: gpio@e6051000 {
 348                         compatible = "renesas,gpio-r8a77961",
 349                                      "renesas,rcar-gen3-gpio";
 350                         reg = <0 0xe6051000 0 0x50>;
 351                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 352                         #gpio-cells = <2>;
 353                         gpio-controller;
 354                         gpio-ranges = <&pfc 0 32 29>;
 355                         #interrupt-cells = <2>;
 356                         interrupt-controller;
 357                         clocks = <&cpg CPG_MOD 911>;
 358                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 359                         resets = <&cpg 911>;
 360                 };
 361
 362                 gpio2: gpio@e6052000 {
 363                         compatible = "renesas,gpio-r8a77961",
 364                                      "renesas,rcar-gen3-gpio";
 365                         reg = <0 0xe6052000 0 0x50>;
 366                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 367                         #gpio-cells = <2>;
 368                         gpio-controller;
 369                         gpio-ranges = <&pfc 0 64 15>;
 370                         #interrupt-cells = <2>;
 371                         interrupt-controller;
 372                         clocks = <&cpg CPG_MOD 910>;
 373                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 374                         resets = <&cpg 910>;
 375                 };
 376
 377                 gpio3: gpio@e6053000 {
 378                         compatible = "renesas,gpio-r8a77961",
 379                                      "renesas,rcar-gen3-gpio";
 380                         reg = <0 0xe6053000 0 0x50>;
 381                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 382                         #gpio-cells = <2>;
 383                         gpio-controller;
 384                         gpio-ranges = <&pfc 0 96 16>;
 385                         #interrupt-cells = <2>;
 386                         interrupt-controller;
 387                         clocks = <&cpg CPG_MOD 909>;
 388                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 389                         resets = <&cpg 909>;
 390                 };
 391
 392                 gpio4: gpio@e6054000 {
 393                         compatible = "renesas,gpio-r8a77961",
 394                                      "renesas,rcar-gen3-gpio";
 395                         reg = <0 0xe6054000 0 0x50>;
 396                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 397                         #gpio-cells = <2>;
 398                         gpio-controller;
 399                         gpio-ranges = <&pfc 0 128 18>;
 400                         #interrupt-cells = <2>;
 401                         interrupt-controller;
 402                         clocks = <&cpg CPG_MOD 908>;
 403                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 404                         resets = <&cpg 908>;
 405                 };
 406
 407                 gpio5: gpio@e6055000 {
 408                         compatible = "renesas,gpio-r8a77961",
 409                                      "renesas,rcar-gen3-gpio";
 410                         reg = <0 0xe6055000 0 0x50>;
 411                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 412                         #gpio-cells = <2>;
 413                         gpio-controller;
 414                         gpio-ranges = <&pfc 0 160 26>;
 415                         #interrupt-cells = <2>;
 416                         interrupt-controller;
 417                         clocks = <&cpg CPG_MOD 907>;
 418                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 419                         resets = <&cpg 907>;
 420                 };
 421
 422                 gpio6: gpio@e6055400 {
 423                         compatible = "renesas,gpio-r8a77961",
 424                                      "renesas,rcar-gen3-gpio";
 425                         reg = <0 0xe6055400 0 0x50>;
 426                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 427                         #gpio-cells = <2>;
 428                         gpio-controller;
 429                         gpio-ranges = <&pfc 0 192 32>;
 430                         #interrupt-cells = <2>;
 431                         interrupt-controller;
 432                         clocks = <&cpg CPG_MOD 906>;
 433                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 434                         resets = <&cpg 906>;
 435                 };
 436
 437                 gpio7: gpio@e6055800 {
 438                         compatible = "renesas,gpio-r8a77961",
 439                                      "renesas,rcar-gen3-gpio";
 440                         reg = <0 0xe6055800 0 0x50>;
 441                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 442                         #gpio-cells = <2>;
 443                         gpio-controller;
 444                         gpio-ranges = <&pfc 0 224 4>;
 445                         #interrupt-cells = <2>;
 446                         interrupt-controller;
 447                         clocks = <&cpg CPG_MOD 905>;
 448                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 449                         resets = <&cpg 905>;
 450                 };
 451
 452                 pfc: pinctrl@e6060000 {
 453                         compatible = "renesas,pfc-r8a77961";
 454                         reg = <0 0xe6060000 0 0x50c>;
 455                 };
 456
 457                 cmt0: timer@e60f0000 {
 458                         compatible = "renesas,r8a77961-cmt0",
 459                                      "renesas,rcar-gen3-cmt0";
 460                         reg = <0 0xe60f0000 0 0x1004>;
 461                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 462                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 463                         clocks = <&cpg CPG_MOD 303>;
 464                         clock-names = "fck";
 465                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 466                         resets = <&cpg 303>;
 467                         status = "disabled";
 468                 };
 469
 470                 cmt1: timer@e6130000 {
 471                         compatible = "renesas,r8a77961-cmt1",
 472                                      "renesas,rcar-gen3-cmt1";
 473                         reg = <0 0xe6130000 0 0x1004>;
 474                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 475                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 477                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 478                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 482                         clocks = <&cpg CPG_MOD 302>;
 483                         clock-names = "fck";
 484                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 485                         resets = <&cpg 302>;
 486                         status = "disabled";
 487                 };
 488
 489                 cmt2: timer@e6140000 {
 490                         compatible = "renesas,r8a77961-cmt1",
 491                                      "renesas,rcar-gen3-cmt1";
 492                         reg = <0 0xe6140000 0 0x1004>;
 493                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 501                         clocks = <&cpg CPG_MOD 301>;
 502                         clock-names = "fck";
 503                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 504                         resets = <&cpg 301>;
 505                         status = "disabled";
 506                 };
 507
 508                 cmt3: timer@e6148000 {
 509                         compatible = "renesas,r8a77961-cmt1",
 510                                      "renesas,rcar-gen3-cmt1";
 511                         reg = <0 0xe6148000 0 0x1004>;
 512                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 515                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 520                         clocks = <&cpg CPG_MOD 300>;
 521                         clock-names = "fck";
 522                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 523                         resets = <&cpg 300>;
 524                         status = "disabled";
 525                 };
 526
 527                 cpg: clock-controller@e6150000 {
 528                         compatible = "renesas,r8a77961-cpg-mssr";
 529                         reg = <0 0xe6150000 0 0x1000>;
 530                         clocks = <&extal_clk>, <&extalr_clk>;
 531                         clock-names = "extal", "extalr";
 532                         #clock-cells = <2>;
 533                         #power-domain-cells = <0>;
 534                         #reset-cells = <1>;
 535                 };
 536
 537                 rst: reset-controller@e6160000 {
 538                         compatible = "renesas,r8a77961-rst";
 539                         reg = <0 0xe6160000 0 0x0200>;
 540                 };
 541
 542                 sysc: system-controller@e6180000 {
 543                         compatible = "renesas,r8a77961-sysc";
 544                         reg = <0 0xe6180000 0 0x0400>;
 545                         #power-domain-cells = <1>;
 546                 };
 547
 548                 tsc: thermal@e6198000 {
 549                         compatible = "renesas,r8a77961-thermal";
 550                         reg = <0 0xe6198000 0 0x100>,
 551                               <0 0xe61a0000 0 0x100>,
 552                               <0 0xe61a8000 0 0x100>;
 553                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 554                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 556                         clocks = <&cpg CPG_MOD 522>;
 557                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 558                         resets = <&cpg 522>;
 559                         #thermal-sensor-cells = <1>;
 560                 };
 561
 562                 intc_ex: interrupt-controller@e61c0000 {
 563                         compatible = "renesas,intc-ex-r8a77961", "renesas,irqc";
 564                         #interrupt-cells = <2>;
 565                         interrupt-controller;
 566                         reg = <0 0xe61c0000 0 0x200>;
 567                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 568                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 569                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 570                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 571                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 572                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 573                         clocks = <&cpg CPG_MOD 407>;
 574                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 575                         resets = <&cpg 407>;
 576                 };
 577
 578                 tmu0: timer@e61e0000 {
 579                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 580                         reg = <0 0xe61e0000 0 0x30>;
 581                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 582                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 584                         clocks = <&cpg CPG_MOD 125>;
 585                         clock-names = "fck";
 586                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 587                         resets = <&cpg 125>;
 588                         status = "disabled";
 589                 };
 590
 591                 tmu1: timer@e6fc0000 {
 592                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 593                         reg = <0 0xe6fc0000 0 0x30>;
 594                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 595                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 597                         clocks = <&cpg CPG_MOD 124>;
 598                         clock-names = "fck";
 599                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 600                         resets = <&cpg 124>;
 601                         status = "disabled";
 602                 };
 603
 604                 tmu2: timer@e6fd0000 {
 605                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 606                         reg = <0 0xe6fd0000 0 0x30>;
 607                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 610                         clocks = <&cpg CPG_MOD 123>;
 611                         clock-names = "fck";
 612                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 613                         resets = <&cpg 123>;
 614                         status = "disabled";
 615                 };
 616
 617                 tmu3: timer@e6fe0000 {
 618                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 619                         reg = <0 0xe6fe0000 0 0x30>;
 620                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 621                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 122>;
 624                         clock-names = "fck";
 625                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 626                         resets = <&cpg 122>;
 627                         status = "disabled";
 628                 };
 629
 630                 tmu4: timer@ffc00000 {
 631                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 632                         reg = <0 0xffc00000 0 0x30>;
 633                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 634                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 635                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 636                         clocks = <&cpg CPG_MOD 121>;
 637                         clock-names = "fck";
 638                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 639                         resets = <&cpg 121>;
 640                         status = "disabled";
 641                 };
 642
 643                 i2c0: i2c@e6500000 {
 644                         #address-cells = <1>;
 645                         #size-cells = <0>;
 646                         compatible = "renesas,i2c-r8a77961",
 647                                      "renesas,rcar-gen3-i2c";
 648                         reg = <0 0xe6500000 0 0x40>;
 649                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 650                         clocks = <&cpg CPG_MOD 931>;
 651                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 652                         resets = <&cpg 931>;
 653                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 654                                <&dmac2 0x91>, <&dmac2 0x90>;
 655                         dma-names = "tx", "rx", "tx", "rx";
 656                         i2c-scl-internal-delay-ns = <110>;
 657                         status = "disabled";
 658                 };
 659
 660                 i2c1: i2c@e6508000 {
 661                         #address-cells = <1>;
 662                         #size-cells = <0>;
 663                         compatible = "renesas,i2c-r8a77961",
 664                                      "renesas,rcar-gen3-i2c";
 665                         reg = <0 0xe6508000 0 0x40>;
 666                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 667                         clocks = <&cpg CPG_MOD 930>;
 668                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 669                         resets = <&cpg 930>;
 670                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 671                                <&dmac2 0x93>, <&dmac2 0x92>;
 672                         dma-names = "tx", "rx", "tx", "rx";
 673                         i2c-scl-internal-delay-ns = <6>;
 674                         status = "disabled";
 675                 };
 676
 677                 i2c2: i2c@e6510000 {
 678                         #address-cells = <1>;
 679                         #size-cells = <0>;
 680                         compatible = "renesas,i2c-r8a77961",
 681                                      "renesas,rcar-gen3-i2c";
 682                         reg = <0 0xe6510000 0 0x40>;
 683                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 684                         clocks = <&cpg CPG_MOD 929>;
 685                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 686                         resets = <&cpg 929>;
 687                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 688                                <&dmac2 0x95>, <&dmac2 0x94>;
 689                         dma-names = "tx", "rx", "tx", "rx";
 690                         i2c-scl-internal-delay-ns = <6>;
 691                         status = "disabled";
 692                 };
 693
 694                 i2c3: i2c@e66d0000 {
 695                         #address-cells = <1>;
 696                         #size-cells = <0>;
 697                         compatible = "renesas,i2c-r8a77961",
 698                                      "renesas,rcar-gen3-i2c";
 699                         reg = <0 0xe66d0000 0 0x40>;
 700                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 701                         clocks = <&cpg CPG_MOD 928>;
 702                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 703                         resets = <&cpg 928>;
 704                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 705                         dma-names = "tx", "rx";
 706                         i2c-scl-internal-delay-ns = <110>;
 707                         status = "disabled";
 708                 };
 709
 710                 i2c4: i2c@e66d8000 {
 711                         #address-cells = <1>;
 712                         #size-cells = <0>;
 713                         compatible = "renesas,i2c-r8a77961",
 714                                      "renesas,rcar-gen3-i2c";
 715                         reg = <0 0xe66d8000 0 0x40>;
 716                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 927>;
 718                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 719                         resets = <&cpg 927>;
 720                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 721                         dma-names = "tx", "rx";
 722                         i2c-scl-internal-delay-ns = <110>;
 723                         status = "disabled";
 724                 };
 725
 726                 i2c5: i2c@e66e0000 {
 727                         #address-cells = <1>;
 728                         #size-cells = <0>;
 729                         compatible = "renesas,i2c-r8a77961",
 730                                      "renesas,rcar-gen3-i2c";
 731                         reg = <0 0xe66e0000 0 0x40>;
 732                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 733                         clocks = <&cpg CPG_MOD 919>;
 734                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 735                         resets = <&cpg 919>;
 736                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 737                         dma-names = "tx", "rx";
 738                         i2c-scl-internal-delay-ns = <110>;
 739                         status = "disabled";
 740                 };
 741
 742                 i2c6: i2c@e66e8000 {
 743                         #address-cells = <1>;
 744                         #size-cells = <0>;
 745                         compatible = "renesas,i2c-r8a77961",
 746                                      "renesas,rcar-gen3-i2c";
 747                         reg = <0 0xe66e8000 0 0x40>;
 748                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 749                         clocks = <&cpg CPG_MOD 918>;
 750                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 751                         resets = <&cpg 918>;
 752                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 753                         dma-names = "tx", "rx";
 754                         i2c-scl-internal-delay-ns = <6>;
 755                         status = "disabled";
 756                 };
 757
 758                 i2c_dvfs: i2c@e60b0000 {
 759                         #address-cells = <1>;
 760                         #size-cells = <0>;
 761                         compatible = "renesas,iic-r8a77961",
 762                                      "renesas,rcar-gen3-iic",
 763                                      "renesas,rmobile-iic";
 764                         reg = <0 0xe60b0000 0 0x425>;
 765                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 766                         clocks = <&cpg CPG_MOD 926>;
 767                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 768                         resets = <&cpg 926>;
 769                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 770                         dma-names = "tx", "rx";
 771                         status = "disabled";
 772                 };
 773
 774                 hscif0: serial@e6540000 {
 775                         compatible = "renesas,hscif-r8a77961",
 776                                      "renesas,rcar-gen3-hscif",
 777                                      "renesas,hscif";
 778                         reg = <0 0xe6540000 0 0x60>;
 779                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 780                         clocks = <&cpg CPG_MOD 520>,
 781                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 782                                  <&scif_clk>;
 783                         clock-names = "fck", "brg_int", "scif_clk";
 784                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 785                                <&dmac2 0x31>, <&dmac2 0x30>;
 786                         dma-names = "tx", "rx", "tx", "rx";
 787                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 788                         resets = <&cpg 520>;
 789                         status = "disabled";
 790                 };
 791
 792                 hscif1: serial@e6550000 {
 793                         compatible = "renesas,hscif-r8a77961",
 794                                      "renesas,rcar-gen3-hscif",
 795                                      "renesas,hscif";
 796                         reg = <0 0xe6550000 0 0x60>;
 797                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 798                         clocks = <&cpg CPG_MOD 519>,
 799                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 800                                  <&scif_clk>;
 801                         clock-names = "fck", "brg_int", "scif_clk";
 802                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 803                                <&dmac2 0x33>, <&dmac2 0x32>;
 804                         dma-names = "tx", "rx", "tx", "rx";
 805                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 806                         resets = <&cpg 519>;
 807                         status = "disabled";
 808                 };
 809
 810                 hscif2: serial@e6560000 {
 811                         compatible = "renesas,hscif-r8a77961",
 812                                      "renesas,rcar-gen3-hscif",
 813                                      "renesas,hscif";
 814                         reg = <0 0xe6560000 0 0x60>;
 815                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 816                         clocks = <&cpg CPG_MOD 518>,
 817                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 818                                  <&scif_clk>;
 819                         clock-names = "fck", "brg_int", "scif_clk";
 820                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 821                                <&dmac2 0x35>, <&dmac2 0x34>;
 822                         dma-names = "tx", "rx", "tx", "rx";
 823                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 824                         resets = <&cpg 518>;
 825                         status = "disabled";
 826                 };
 827
 828                 hscif3: serial@e66a0000 {
 829                         compatible = "renesas,hscif-r8a77961",
 830                                      "renesas,rcar-gen3-hscif",
 831                                      "renesas,hscif";
 832                         reg = <0 0xe66a0000 0 0x60>;
 833                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 834                         clocks = <&cpg CPG_MOD 517>,
 835                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 836                                  <&scif_clk>;
 837                         clock-names = "fck", "brg_int", "scif_clk";
 838                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 839                         dma-names = "tx", "rx";
 840                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 841                         resets = <&cpg 517>;
 842                         status = "disabled";
 843                 };
 844
 845                 hscif4: serial@e66b0000 {
 846                         compatible = "renesas,hscif-r8a77961",
 847                                      "renesas,rcar-gen3-hscif",
 848                                      "renesas,hscif";
 849                         reg = <0 0xe66b0000 0 0x60>;
 850                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 851                         clocks = <&cpg CPG_MOD 516>,
 852                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 853                                  <&scif_clk>;
 854                         clock-names = "fck", "brg_int", "scif_clk";
 855                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 856                         dma-names = "tx", "rx";
 857                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 858                         resets = <&cpg 516>;
 859                         status = "disabled";
 860                 };
 861
 862                 hsusb: usb@e6590000 {
 863                         compatible = "renesas,usbhs-r8a77961",
 864                                      "renesas,rcar-gen3-usbhs";
 865                         reg = <0 0xe6590000 0 0x200>;
 866                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 867                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 868                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 869                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 870                         dma-names = "ch0", "ch1", "ch2", "ch3";
 871                         renesas,buswait = <11>;
 872                         phys = <&usb2_phy0 3>;
 873                         phy-names = "usb";
 874                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 875                         resets = <&cpg 704>, <&cpg 703>;
 876                         status = "disabled";
 877                 };
 878
 879                 usb_dmac0: dma-controller@e65a0000 {
 880                         compatible = "renesas,r8a77961-usb-dmac",
 881                                      "renesas,usb-dmac";
 882                         reg = <0 0xe65a0000 0 0x100>;
 883                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 884                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 885                         interrupt-names = "ch0", "ch1";
 886                         clocks = <&cpg CPG_MOD 330>;
 887                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 888                         resets = <&cpg 330>;
 889                         #dma-cells = <1>;
 890                         dma-channels = <2>;
 891                 };
 892
 893                 usb_dmac1: dma-controller@e65b0000 {
 894                         compatible = "renesas,r8a77961-usb-dmac",
 895                                      "renesas,usb-dmac";
 896                         reg = <0 0xe65b0000 0 0x100>;
 897                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 898                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 899                         interrupt-names = "ch0", "ch1";
 900                         clocks = <&cpg CPG_MOD 331>;
 901                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 902                         resets = <&cpg 331>;
 903                         #dma-cells = <1>;
 904                         dma-channels = <2>;
 905                 };
 906
 907                 usb3_phy0: usb-phy@e65ee000 {
 908                         compatible = "renesas,r8a77961-usb3-phy",
 909                                      "renesas,rcar-gen3-usb3-phy";
 910                         reg = <0 0xe65ee000 0 0x90>;
 911                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 912                                  <&usb_extal_clk>;
 913                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 914                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 915                         resets = <&cpg 328>;
 916                         #phy-cells = <0>;
 917                         status = "disabled";
 918                 };
 919
 920                 arm_cc630p: crypto@e6601000 {
 921                         compatible = "arm,cryptocell-630p-ree";
 922                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 923                         reg = <0x0 0xe6601000 0 0x1000>;
 924                         clocks = <&cpg CPG_MOD 229>;
 925                         resets = <&cpg 229>;
 926                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 927                 };
 928
 929                 dmac0: dma-controller@e6700000 {
 930                         compatible = "renesas,dmac-r8a77961",
 931                                      "renesas,rcar-dmac";
 932                         reg = <0 0xe6700000 0 0x10000>;
 933                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 934                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 935                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 936                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 950                         interrupt-names = "error",
 951                                         "ch0", "ch1", "ch2", "ch3",
 952                                         "ch4", "ch5", "ch6", "ch7",
 953                                         "ch8", "ch9", "ch10", "ch11",
 954                                         "ch12", "ch13", "ch14", "ch15";
 955                         clocks = <&cpg CPG_MOD 219>;
 956                         clock-names = "fck";
 957                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 958                         resets = <&cpg 219>;
 959                         #dma-cells = <1>;
 960                         dma-channels = <16>;
 961                 };
 962
 963                 dmac1: dma-controller@e7300000 {
 964                         compatible = "renesas,dmac-r8a77961",
 965                                      "renesas,rcar-dmac";
 966                         reg = <0 0xe7300000 0 0x10000>;
 967                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 984                         interrupt-names = "error",
 985                                         "ch0", "ch1", "ch2", "ch3",
 986                                         "ch4", "ch5", "ch6", "ch7",
 987                                         "ch8", "ch9", "ch10", "ch11",
 988                                         "ch12", "ch13", "ch14", "ch15";
 989                         clocks = <&cpg CPG_MOD 218>;
 990                         clock-names = "fck";
 991                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 992                         resets = <&cpg 218>;
 993                         #dma-cells = <1>;
 994                         dma-channels = <16>;
 995                 };
 996
 997                 dmac2: dma-controller@e7310000 {
 998                         compatible = "renesas,dmac-r8a77961",
 999                                      "renesas,rcar-dmac";
1000                         reg = <0 0xe7310000 0 0x10000>;
1001                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1002                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1003                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1004                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1005                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1006                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1007                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1008                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1009                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1010                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1011                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1012                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1013                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1014                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1015                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1016                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1017                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1018                         interrupt-names = "error",
1019                                         "ch0", "ch1", "ch2", "ch3",
1020                                         "ch4", "ch5", "ch6", "ch7",
1021                                         "ch8", "ch9", "ch10", "ch11",
1022                                         "ch12", "ch13", "ch14", "ch15";
1023                         clocks = <&cpg CPG_MOD 217>;
1024                         clock-names = "fck";
1025                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1026                         resets = <&cpg 217>;
1027                         #dma-cells = <1>;
1028                         dma-channels = <16>;
1029                 };
1030
1031                 ipmmu_ds0: iommu@e6740000 {
1032                         compatible = "renesas,ipmmu-r8a77961";
1033                         reg = <0 0xe6740000 0 0x1000>;
1034                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1035                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1036                         #iommu-cells = <1>;
1037                 };
1038
1039                 ipmmu_ds1: iommu@e7740000 {
1040                         compatible = "renesas,ipmmu-r8a77961";
1041                         reg = <0 0xe7740000 0 0x1000>;
1042                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1043                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1044                         #iommu-cells = <1>;
1045                 };
1046
1047                 ipmmu_hc: iommu@e6570000 {
1048                         compatible = "renesas,ipmmu-r8a77961";
1049                         reg = <0 0xe6570000 0 0x1000>;
1050                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1051                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1052                         #iommu-cells = <1>;
1053                 };
1054
1055                 ipmmu_ir: iommu@ff8b0000 {
1056                         compatible = "renesas,ipmmu-r8a77961";
1057                         reg = <0 0xff8b0000 0 0x1000>;
1058                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1059                         power-domains = <&sysc R8A77961_PD_A3IR>;
1060                         #iommu-cells = <1>;
1061                 };
1062
1063                 ipmmu_mm: iommu@e67b0000 {
1064                         compatible = "renesas,ipmmu-r8a77961";
1065                         reg = <0 0xe67b0000 0 0x1000>;
1066                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1067                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1068                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1069                         #iommu-cells = <1>;
1070                 };
1071
1072                 ipmmu_mp: iommu@ec670000 {
1073                         compatible = "renesas,ipmmu-r8a77961";
1074                         reg = <0 0xec670000 0 0x1000>;
1075                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1076                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1077                         #iommu-cells = <1>;
1078                 };
1079
1080                 ipmmu_pv0: iommu@fd800000 {
1081                         compatible = "renesas,ipmmu-r8a77961";
1082                         reg = <0 0xfd800000 0 0x1000>;
1083                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1084                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1085                         #iommu-cells = <1>;
1086                 };
1087
1088                 ipmmu_pv1: iommu@fd950000 {
1089                         compatible = "renesas,ipmmu-r8a77961";
1090                         reg = <0 0xfd950000 0 0x1000>;
1091                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1092                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1093                         #iommu-cells = <1>;
1094                 };
1095
1096                 ipmmu_rt: iommu@ffc80000 {
1097                         compatible = "renesas,ipmmu-r8a77961";
1098                         reg = <0 0xffc80000 0 0x1000>;
1099                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1100                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1101                         #iommu-cells = <1>;
1102                 };
1103
1104                 ipmmu_vc0: iommu@fe6b0000 {
1105                         compatible = "renesas,ipmmu-r8a77961";
1106                         reg = <0 0xfe6b0000 0 0x1000>;
1107                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1108                         power-domains = <&sysc R8A77961_PD_A3VC>;
1109                         #iommu-cells = <1>;
1110                 };
1111
1112                 ipmmu_vi0: iommu@febd0000 {
1113                         compatible = "renesas,ipmmu-r8a77961";
1114                         reg = <0 0xfebd0000 0 0x1000>;
1115                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1116                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1117                         #iommu-cells = <1>;
1118                 };
1119
1120                 avb: ethernet@e6800000 {
1121                         compatible = "renesas,etheravb-r8a77961",
1122                                      "renesas,etheravb-rcar-gen3";
1123                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1124                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1125                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1126                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1127                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1128                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1129                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1130                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1131                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1132                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1133                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1134                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1135                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1136                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1137                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1138                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1139                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1140                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1141                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1142                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1143                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1144                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1145                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1146                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1147                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1148                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1149                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1150                                           "ch4", "ch5", "ch6", "ch7",
1151                                           "ch8", "ch9", "ch10", "ch11",
1152                                           "ch12", "ch13", "ch14", "ch15",
1153                                           "ch16", "ch17", "ch18", "ch19",
1154                                           "ch20", "ch21", "ch22", "ch23",
1155                                           "ch24";
1156                         clocks = <&cpg CPG_MOD 812>;
1157                         clock-names = "fck";
1158                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1159                         resets = <&cpg 812>;
1160                         phy-mode = "rgmii";
1161                         rx-internal-delay-ps = <0>;
1162                         tx-internal-delay-ps = <0>;
1163                         #address-cells = <1>;
1164                         #size-cells = <0>;
1165                         status = "disabled";
1166                 };
1167
1168                 can0: can@e6c30000 {
1169                         compatible = "renesas,can-r8a77961",
1170                                      "renesas,rcar-gen3-can";
1171                         reg = <0 0xe6c30000 0 0x1000>;
1172                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1173                         clocks = <&cpg CPG_MOD 916>,
1174                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1175                                <&can_clk>;
1176                         clock-names = "clkp1", "clkp2", "can_clk";
1177                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1178                         assigned-clock-rates = <40000000>;
1179                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1180                         resets = <&cpg 916>;
1181                         status = "disabled";
1182                 };
1183
1184                 can1: can@e6c38000 {
1185                         compatible = "renesas,can-r8a77961",
1186                                      "renesas,rcar-gen3-can";
1187                         reg = <0 0xe6c38000 0 0x1000>;
1188                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1189                         clocks = <&cpg CPG_MOD 915>,
1190                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1191                                <&can_clk>;
1192                         clock-names = "clkp1", "clkp2", "can_clk";
1193                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1194                         assigned-clock-rates = <40000000>;
1195                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1196                         resets = <&cpg 915>;
1197                         status = "disabled";
1198                 };
1199
1200                 pwm0: pwm@e6e30000 {
1201                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1202                         reg = <0 0xe6e30000 0 8>;
1203                         #pwm-cells = <2>;
1204                         clocks = <&cpg CPG_MOD 523>;
1205                         resets = <&cpg 523>;
1206                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1207                         status = "disabled";
1208                 };
1209
1210                 pwm1: pwm@e6e31000 {
1211                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1212                         reg = <0 0xe6e31000 0 8>;
1213                         #pwm-cells = <2>;
1214                         clocks = <&cpg CPG_MOD 523>;
1215                         resets = <&cpg 523>;
1216                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1217                         status = "disabled";
1218                 };
1219
1220                 pwm2: pwm@e6e32000 {
1221                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1222                         reg = <0 0xe6e32000 0 8>;
1223                         #pwm-cells = <2>;
1224                         clocks = <&cpg CPG_MOD 523>;
1225                         resets = <&cpg 523>;
1226                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1227                         status = "disabled";
1228                 };
1229
1230                 pwm3: pwm@e6e33000 {
1231                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1232                         reg = <0 0xe6e33000 0 8>;
1233                         #pwm-cells = <2>;
1234                         clocks = <&cpg CPG_MOD 523>;
1235                         resets = <&cpg 523>;
1236                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1237                         status = "disabled";
1238                 };
1239
1240                 pwm4: pwm@e6e34000 {
1241                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1242                         reg = <0 0xe6e34000 0 8>;
1243                         #pwm-cells = <2>;
1244                         clocks = <&cpg CPG_MOD 523>;
1245                         resets = <&cpg 523>;
1246                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1247                         status = "disabled";
1248                 };
1249
1250                 pwm5: pwm@e6e35000 {
1251                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1252                         reg = <0 0xe6e35000 0 8>;
1253                         #pwm-cells = <2>;
1254                         clocks = <&cpg CPG_MOD 523>;
1255                         resets = <&cpg 523>;
1256                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1257                         status = "disabled";
1258                 };
1259
1260                 pwm6: pwm@e6e36000 {
1261                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1262                         reg = <0 0xe6e36000 0 8>;
1263                         #pwm-cells = <2>;
1264                         clocks = <&cpg CPG_MOD 523>;
1265                         resets = <&cpg 523>;
1266                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1267                         status = "disabled";
1268                 };
1269
1270                 scif0: serial@e6e60000 {
1271                         compatible = "renesas,scif-r8a77961",
1272                                      "renesas,rcar-gen3-scif", "renesas,scif";
1273                         reg = <0 0xe6e60000 0 64>;
1274                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1275                         clocks = <&cpg CPG_MOD 207>,
1276                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1277                                  <&scif_clk>;
1278                         clock-names = "fck", "brg_int", "scif_clk";
1279                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1280                                <&dmac2 0x51>, <&dmac2 0x50>;
1281                         dma-names = "tx", "rx", "tx", "rx";
1282                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1283                         resets = <&cpg 207>;
1284                         status = "disabled";
1285                 };
1286
1287                 scif1: serial@e6e68000 {
1288                         compatible = "renesas,scif-r8a77961",
1289                                      "renesas,rcar-gen3-scif", "renesas,scif";
1290                         reg = <0 0xe6e68000 0 64>;
1291                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1292                         clocks = <&cpg CPG_MOD 206>,
1293                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1294                                  <&scif_clk>;
1295                         clock-names = "fck", "brg_int", "scif_clk";
1296                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1297                                <&dmac2 0x53>, <&dmac2 0x52>;
1298                         dma-names = "tx", "rx", "tx", "rx";
1299                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1300                         resets = <&cpg 206>;
1301                         status = "disabled";
1302                 };
1303
1304                 scif2: serial@e6e88000 {
1305                         compatible = "renesas,scif-r8a77961",
1306                                      "renesas,rcar-gen3-scif", "renesas,scif";
1307                         reg = <0 0xe6e88000 0 64>;
1308                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1309                         clocks = <&cpg CPG_MOD 310>,
1310                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1311                                  <&scif_clk>;
1312                         clock-names = "fck", "brg_int", "scif_clk";
1313                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1314                                <&dmac2 0x13>, <&dmac2 0x12>;
1315                         dma-names = "tx", "rx", "tx", "rx";
1316                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1317                         resets = <&cpg 310>;
1318                         status = "disabled";
1319                 };
1320
1321                 scif3: serial@e6c50000 {
1322                         compatible = "renesas,scif-r8a77961",
1323                                      "renesas,rcar-gen3-scif", "renesas,scif";
1324                         reg = <0 0xe6c50000 0 64>;
1325                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1326                         clocks = <&cpg CPG_MOD 204>,
1327                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1328                                  <&scif_clk>;
1329                         clock-names = "fck", "brg_int", "scif_clk";
1330                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1331                         dma-names = "tx", "rx";
1332                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1333                         resets = <&cpg 204>;
1334                         status = "disabled";
1335                 };
1336
1337                 scif4: serial@e6c40000 {
1338                         compatible = "renesas,scif-r8a77961",
1339                                      "renesas,rcar-gen3-scif", "renesas,scif";
1340                         reg = <0 0xe6c40000 0 64>;
1341                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1342                         clocks = <&cpg CPG_MOD 203>,
1343                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1344                                  <&scif_clk>;
1345                         clock-names = "fck", "brg_int", "scif_clk";
1346                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1347                         dma-names = "tx", "rx";
1348                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1349                         resets = <&cpg 203>;
1350                         status = "disabled";
1351                 };
1352
1353                 scif5: serial@e6f30000 {
1354                         compatible = "renesas,scif-r8a77961",
1355                                      "renesas,rcar-gen3-scif", "renesas,scif";
1356                         reg = <0 0xe6f30000 0 64>;
1357                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1358                         clocks = <&cpg CPG_MOD 202>,
1359                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1360                                  <&scif_clk>;
1361                         clock-names = "fck", "brg_int", "scif_clk";
1362                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1363                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1364                         dma-names = "tx", "rx", "tx", "rx";
1365                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1366                         resets = <&cpg 202>;
1367                         status = "disabled";
1368                 };
1369
1370                 msiof0: spi@e6e90000 {
1371                         compatible = "renesas,msiof-r8a77961",
1372                                      "renesas,rcar-gen3-msiof";
1373                         reg = <0 0xe6e90000 0 0x0064>;
1374                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1375                         clocks = <&cpg CPG_MOD 211>;
1376                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1377                                <&dmac2 0x41>, <&dmac2 0x40>;
1378                         dma-names = "tx", "rx", "tx", "rx";
1379                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1380                         resets = <&cpg 211>;
1381                         #address-cells = <1>;
1382                         #size-cells = <0>;
1383                         status = "disabled";
1384                 };
1385
1386                 msiof1: spi@e6ea0000 {
1387                         compatible = "renesas,msiof-r8a77961",
1388                                      "renesas,rcar-gen3-msiof";
1389                         reg = <0 0xe6ea0000 0 0x0064>;
1390                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1391                         clocks = <&cpg CPG_MOD 210>;
1392                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1393                                <&dmac2 0x43>, <&dmac2 0x42>;
1394                         dma-names = "tx", "rx", "tx", "rx";
1395                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1396                         resets = <&cpg 210>;
1397                         #address-cells = <1>;
1398                         #size-cells = <0>;
1399                         status = "disabled";
1400                 };
1401
1402                 msiof2: spi@e6c00000 {
1403                         compatible = "renesas,msiof-r8a77961",
1404                                      "renesas,rcar-gen3-msiof";
1405                         reg = <0 0xe6c00000 0 0x0064>;
1406                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1407                         clocks = <&cpg CPG_MOD 209>;
1408                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1409                         dma-names = "tx", "rx";
1410                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1411                         resets = <&cpg 209>;
1412                         #address-cells = <1>;
1413                         #size-cells = <0>;
1414                         status = "disabled";
1415                 };
1416
1417                 msiof3: spi@e6c10000 {
1418                         compatible = "renesas,msiof-r8a77961",
1419                                      "renesas,rcar-gen3-msiof";
1420                         reg = <0 0xe6c10000 0 0x0064>;
1421                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1422                         clocks = <&cpg CPG_MOD 208>;
1423                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1424                         dma-names = "tx", "rx";
1425                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1426                         resets = <&cpg 208>;
1427                         #address-cells = <1>;
1428                         #size-cells = <0>;
1429                         status = "disabled";
1430                 };
1431
1432                 vin0: video@e6ef0000 {
1433                         compatible = "renesas,vin-r8a77961";
1434                         reg = <0 0xe6ef0000 0 0x1000>;
1435                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1436                         clocks = <&cpg CPG_MOD 811>;
1437                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1438                         resets = <&cpg 811>;
1439                         renesas,id = <0>;
1440                         status = "disabled";
1441
1442                         ports {
1443                                 #address-cells = <1>;
1444                                 #size-cells = <0>;
1445
1446                                 port@1 {
1447                                         #address-cells = <1>;
1448                                         #size-cells = <0>;
1449
1450                                         reg = <1>;
1451
1452                                         vin0csi20: endpoint@0 {
1453                                                 reg = <0>;
1454                                                 remote-endpoint = <&csi20vin0>;
1455                                         };
1456                                         vin0csi40: endpoint@2 {
1457                                                 reg = <2>;
1458                                                 remote-endpoint = <&csi40vin0>;
1459                                         };
1460                                 };
1461                         };
1462                 };
1463
1464                 vin1: video@e6ef1000 {
1465                         compatible = "renesas,vin-r8a77961";
1466                         reg = <0 0xe6ef1000 0 0x1000>;
1467                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1468                         clocks = <&cpg CPG_MOD 810>;
1469                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1470                         resets = <&cpg 810>;
1471                         renesas,id = <1>;
1472                         status = "disabled";
1473
1474                         ports {
1475                                 #address-cells = <1>;
1476                                 #size-cells = <0>;
1477
1478                                 port@1 {
1479                                         #address-cells = <1>;
1480                                         #size-cells = <0>;
1481
1482                                         reg = <1>;
1483
1484                                         vin1csi20: endpoint@0 {
1485                                                 reg = <0>;
1486                                                 remote-endpoint = <&csi20vin1>;
1487                                         };
1488                                         vin1csi40: endpoint@2 {
1489                                                 reg = <2>;
1490                                                 remote-endpoint = <&csi40vin1>;
1491                                         };
1492                                 };
1493                         };
1494                 };
1495
1496                 vin2: video@e6ef2000 {
1497                         compatible = "renesas,vin-r8a77961";
1498                         reg = <0 0xe6ef2000 0 0x1000>;
1499                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1500                         clocks = <&cpg CPG_MOD 809>;
1501                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1502                         resets = <&cpg 809>;
1503                         renesas,id = <2>;
1504                         status = "disabled";
1505
1506                         ports {
1507                                 #address-cells = <1>;
1508                                 #size-cells = <0>;
1509
1510                                 port@1 {
1511                                         #address-cells = <1>;
1512                                         #size-cells = <0>;
1513
1514                                         reg = <1>;
1515
1516                                         vin2csi20: endpoint@0 {
1517                                                 reg = <0>;
1518                                                 remote-endpoint = <&csi20vin2>;
1519                                         };
1520                                         vin2csi40: endpoint@2 {
1521                                                 reg = <2>;
1522                                                 remote-endpoint = <&csi40vin2>;
1523                                         };
1524                                 };
1525                         };
1526                 };
1527
1528                 vin3: video@e6ef3000 {
1529                         compatible = "renesas,vin-r8a77961";
1530                         reg = <0 0xe6ef3000 0 0x1000>;
1531                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1532                         clocks = <&cpg CPG_MOD 808>;
1533                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1534                         resets = <&cpg 808>;
1535                         renesas,id = <3>;
1536                         status = "disabled";
1537
1538                         ports {
1539                                 #address-cells = <1>;
1540                                 #size-cells = <0>;
1541
1542                                 port@1 {
1543                                         #address-cells = <1>;
1544                                         #size-cells = <0>;
1545
1546                                         reg = <1>;
1547
1548                                         vin3csi20: endpoint@0 {
1549                                                 reg = <0>;
1550                                                 remote-endpoint = <&csi20vin3>;
1551                                         };
1552                                         vin3csi40: endpoint@2 {
1553                                                 reg = <2>;
1554                                                 remote-endpoint = <&csi40vin3>;
1555                                         };
1556                                 };
1557                         };
1558                 };
1559
1560                 vin4: video@e6ef4000 {
1561                         compatible = "renesas,vin-r8a77961";
1562                         reg = <0 0xe6ef4000 0 0x1000>;
1563                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1564                         clocks = <&cpg CPG_MOD 807>;
1565                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1566                         resets = <&cpg 807>;
1567                         renesas,id = <4>;
1568                         status = "disabled";
1569
1570                         ports {
1571                                 #address-cells = <1>;
1572                                 #size-cells = <0>;
1573
1574                                 port@1 {
1575                                         #address-cells = <1>;
1576                                         #size-cells = <0>;
1577
1578                                         reg = <1>;
1579
1580                                         vin4csi20: endpoint@0 {
1581                                                 reg = <0>;
1582                                                 remote-endpoint = <&csi20vin4>;
1583                                         };
1584                                         vin4csi40: endpoint@2 {
1585                                                 reg = <2>;
1586                                                 remote-endpoint = <&csi40vin4>;
1587                                         };
1588                                 };
1589                         };
1590                 };
1591
1592                 vin5: video@e6ef5000 {
1593                         compatible = "renesas,vin-r8a77961";
1594                         reg = <0 0xe6ef5000 0 0x1000>;
1595                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1596                         clocks = <&cpg CPG_MOD 806>;
1597                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1598                         resets = <&cpg 806>;
1599                         renesas,id = <5>;
1600                         status = "disabled";
1601
1602                         ports {
1603                                 #address-cells = <1>;
1604                                 #size-cells = <0>;
1605
1606                                 port@1 {
1607                                         #address-cells = <1>;
1608                                         #size-cells = <0>;
1609
1610                                         reg = <1>;
1611
1612                                         vin5csi20: endpoint@0 {
1613                                                 reg = <0>;
1614                                                 remote-endpoint = <&csi20vin5>;
1615                                         };
1616                                         vin5csi40: endpoint@2 {
1617                                                 reg = <2>;
1618                                                 remote-endpoint = <&csi40vin5>;
1619                                         };
1620                                 };
1621                         };
1622                 };
1623
1624                 vin6: video@e6ef6000 {
1625                         compatible = "renesas,vin-r8a77961";
1626                         reg = <0 0xe6ef6000 0 0x1000>;
1627                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1628                         clocks = <&cpg CPG_MOD 805>;
1629                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1630                         resets = <&cpg 805>;
1631                         renesas,id = <6>;
1632                         status = "disabled";
1633
1634                         ports {
1635                                 #address-cells = <1>;
1636                                 #size-cells = <0>;
1637
1638                                 port@1 {
1639                                         #address-cells = <1>;
1640                                         #size-cells = <0>;
1641
1642                                         reg = <1>;
1643
1644                                         vin6csi20: endpoint@0 {
1645                                                 reg = <0>;
1646                                                 remote-endpoint = <&csi20vin6>;
1647                                         };
1648                                         vin6csi40: endpoint@2 {
1649                                                 reg = <2>;
1650                                                 remote-endpoint = <&csi40vin6>;
1651                                         };
1652                                 };
1653                         };
1654                 };
1655
1656                 vin7: video@e6ef7000 {
1657                         compatible = "renesas,vin-r8a77961";
1658                         reg = <0 0xe6ef7000 0 0x1000>;
1659                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1660                         clocks = <&cpg CPG_MOD 804>;
1661                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1662                         resets = <&cpg 804>;
1663                         renesas,id = <7>;
1664                         status = "disabled";
1665
1666                         ports {
1667                                 #address-cells = <1>;
1668                                 #size-cells = <0>;
1669
1670                                 port@1 {
1671                                         #address-cells = <1>;
1672                                         #size-cells = <0>;
1673
1674                                         reg = <1>;
1675
1676                                         vin7csi20: endpoint@0 {
1677                                                 reg = <0>;
1678                                                 remote-endpoint = <&csi20vin7>;
1679                                         };
1680                                         vin7csi40: endpoint@2 {
1681                                                 reg = <2>;
1682                                                 remote-endpoint = <&csi40vin7>;
1683                                         };
1684                                 };
1685                         };
1686                 };
1687
1688                 rcar_sound: sound@ec500000 {
1689                         /*
1690                          * #sound-dai-cells is required
1691                          *
1692                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1693                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1694                          */
1695                         /*
1696                          * #clock-cells is required for audio_clkout0/1/2/3
1697                          *
1698                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1699                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1700                          */
1701                         compatible =  "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3";
1702                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1703                               <0 0xec5a0000 0 0x100>,  /* ADG */
1704                               <0 0xec540000 0 0x1000>, /* SSIU */
1705                               <0 0xec541000 0 0x280>,  /* SSI */
1706                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1707                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1708
1709                         clocks = <&cpg CPG_MOD 1005>,
1710                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1711                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1712                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1713                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1714                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1715                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1716                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1717                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1718                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1719                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1720                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1721                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1722                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1723                                  <&audio_clk_a>, <&audio_clk_b>,
1724                                  <&audio_clk_c>,
1725                                  <&cpg CPG_CORE R8A77961_CLK_S0D4>;
1726                         clock-names = "ssi-all",
1727                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1728                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1729                                       "ssi.1", "ssi.0",
1730                                       "src.9", "src.8", "src.7", "src.6",
1731                                       "src.5", "src.4", "src.3", "src.2",
1732                                       "src.1", "src.0",
1733                                       "mix.1", "mix.0",
1734                                       "ctu.1", "ctu.0",
1735                                       "dvc.0", "dvc.1",
1736                                       "clk_a", "clk_b", "clk_c", "clk_i";
1737                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1738                         resets = <&cpg 1005>,
1739                                  <&cpg 1006>, <&cpg 1007>,
1740                                  <&cpg 1008>, <&cpg 1009>,
1741                                  <&cpg 1010>, <&cpg 1011>,
1742                                  <&cpg 1012>, <&cpg 1013>,
1743                                  <&cpg 1014>, <&cpg 1015>;
1744                         reset-names = "ssi-all",
1745                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1746                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1747                                       "ssi.1", "ssi.0";
1748                         status = "disabled";
1749
1750                         rcar_sound,ctu {
1751                                 ctu00: ctu-0 { };
1752                                 ctu01: ctu-1 { };
1753                                 ctu02: ctu-2 { };
1754                                 ctu03: ctu-3 { };
1755                                 ctu10: ctu-4 { };
1756                                 ctu11: ctu-5 { };
1757                                 ctu12: ctu-6 { };
1758                                 ctu13: ctu-7 { };
1759                         };
1760
1761                         rcar_sound,dvc {
1762                                 dvc0: dvc-0 {
1763                                         dmas = <&audma1 0xbc>;
1764                                         dma-names = "tx";
1765                                 };
1766                                 dvc1: dvc-1 {
1767                                         dmas = <&audma1 0xbe>;
1768                                         dma-names = "tx";
1769                                 };
1770                         };
1771
1772                         rcar_sound,mix {
1773                                 mix0: mix-0 { };
1774                                 mix1: mix-1 { };
1775                         };
1776
1777                         rcar_sound,src {
1778                                 src0: src-0 {
1779                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1780                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1781                                         dma-names = "rx", "tx";
1782                                 };
1783                                 src1: src-1 {
1784                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1785                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1786                                         dma-names = "rx", "tx";
1787                                 };
1788                                 src2: src-2 {
1789                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1790                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1791                                         dma-names = "rx", "tx";
1792                                 };
1793                                 src3: src-3 {
1794                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1795                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1796                                         dma-names = "rx", "tx";
1797                                 };
1798                                 src4: src-4 {
1799                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1800                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1801                                         dma-names = "rx", "tx";
1802                                 };
1803                                 src5: src-5 {
1804                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1805                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1806                                         dma-names = "rx", "tx";
1807                                 };
1808                                 src6: src-6 {
1809                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1810                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1811                                         dma-names = "rx", "tx";
1812                                 };
1813                                 src7: src-7 {
1814                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1815                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1816                                         dma-names = "rx", "tx";
1817                                 };
1818                                 src8: src-8 {
1819                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1820                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1821                                         dma-names = "rx", "tx";
1822                                 };
1823                                 src9: src-9 {
1824                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1825                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1826                                         dma-names = "rx", "tx";
1827                                 };
1828                         };
1829
1830                         rcar_sound,ssi {
1831                                 ssi0: ssi-0 {
1832                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1833                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
1834                                         dma-names = "rx", "tx";
1835                                 };
1836                                 ssi1: ssi-1 {
1837                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1838                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
1839                                         dma-names = "rx", "tx";
1840                                 };
1841                                 ssi2: ssi-2 {
1842                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1843                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
1844                                         dma-names = "rx", "tx";
1845                                 };
1846                                 ssi3: ssi-3 {
1847                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1848                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
1849                                         dma-names = "rx", "tx";
1850                                 };
1851                                 ssi4: ssi-4 {
1852                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1853                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
1854                                         dma-names = "rx", "tx";
1855                                 };
1856                                 ssi5: ssi-5 {
1857                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1858                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1859                                         dma-names = "rx", "tx";
1860                                 };
1861                                 ssi6: ssi-6 {
1862                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1863                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1864                                         dma-names = "rx", "tx";
1865                                 };
1866                                 ssi7: ssi-7 {
1867                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1868                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
1869                                         dma-names = "rx", "tx";
1870                                 };
1871                                 ssi8: ssi-8 {
1872                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1873                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
1874                                         dma-names = "rx", "tx";
1875                                 };
1876                                 ssi9: ssi-9 {
1877                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1878                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
1879                                         dma-names = "rx", "tx";
1880                                 };
1881                         };
1882
1883                         rcar_sound,ssiu {
1884                                 ssiu00: ssiu-0 {
1885                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1886                                         dma-names = "rx", "tx";
1887                                 };
1888                                 ssiu01: ssiu-1 {
1889                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1890                                         dma-names = "rx", "tx";
1891                                 };
1892                                 ssiu02: ssiu-2 {
1893                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1894                                         dma-names = "rx", "tx";
1895                                 };
1896                                 ssiu03: ssiu-3 {
1897                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1898                                         dma-names = "rx", "tx";
1899                                 };
1900                                 ssiu04: ssiu-4 {
1901                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1902                                         dma-names = "rx", "tx";
1903                                 };
1904                                 ssiu05: ssiu-5 {
1905                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1906                                         dma-names = "rx", "tx";
1907                                 };
1908                                 ssiu06: ssiu-6 {
1909                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1910                                         dma-names = "rx", "tx";
1911                                 };
1912                                 ssiu07: ssiu-7 {
1913                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1914                                         dma-names = "rx", "tx";
1915                                 };
1916                                 ssiu10: ssiu-8 {
1917                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1918                                         dma-names = "rx", "tx";
1919                                 };
1920                                 ssiu11: ssiu-9 {
1921                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1922                                         dma-names = "rx", "tx";
1923                                 };
1924                                 ssiu12: ssiu-10 {
1925                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1926                                         dma-names = "rx", "tx";
1927                                 };
1928                                 ssiu13: ssiu-11 {
1929                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1930                                         dma-names = "rx", "tx";
1931                                 };
1932                                 ssiu14: ssiu-12 {
1933                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1934                                         dma-names = "rx", "tx";
1935                                 };
1936                                 ssiu15: ssiu-13 {
1937                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1938                                         dma-names = "rx", "tx";
1939                                 };
1940                                 ssiu16: ssiu-14 {
1941                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1942                                         dma-names = "rx", "tx";
1943                                 };
1944                                 ssiu17: ssiu-15 {
1945                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1946                                         dma-names = "rx", "tx";
1947                                 };
1948                                 ssiu20: ssiu-16 {
1949                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
1950                                         dma-names = "rx", "tx";
1951                                 };
1952                                 ssiu21: ssiu-17 {
1953                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
1954                                         dma-names = "rx", "tx";
1955                                 };
1956                                 ssiu22: ssiu-18 {
1957                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1958                                         dma-names = "rx", "tx";
1959                                 };
1960                                 ssiu23: ssiu-19 {
1961                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1962                                         dma-names = "rx", "tx";
1963                                 };
1964                                 ssiu24: ssiu-20 {
1965                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1966                                         dma-names = "rx", "tx";
1967                                 };
1968                                 ssiu25: ssiu-21 {
1969                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1970                                         dma-names = "rx", "tx";
1971                                 };
1972                                 ssiu26: ssiu-22 {
1973                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
1974                                         dma-names = "rx", "tx";
1975                                 };
1976                                 ssiu27: ssiu-23 {
1977                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1978                                         dma-names = "rx", "tx";
1979                                 };
1980                                 ssiu30: ssiu-24 {
1981                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
1982                                         dma-names = "rx", "tx";
1983                                 };
1984                                 ssiu31: ssiu-25 {
1985                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
1986                                         dma-names = "rx", "tx";
1987                                 };
1988                                 ssiu32: ssiu-26 {
1989                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
1990                                         dma-names = "rx", "tx";
1991                                 };
1992                                 ssiu33: ssiu-27 {
1993                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
1994                                         dma-names = "rx", "tx";
1995                                 };
1996                                 ssiu34: ssiu-28 {
1997                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
1998                                         dma-names = "rx", "tx";
1999                                 };
2000                                 ssiu35: ssiu-29 {
2001                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2002                                         dma-names = "rx", "tx";
2003                                 };
2004                                 ssiu36: ssiu-30 {
2005                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2006                                         dma-names = "rx", "tx";
2007                                 };
2008                                 ssiu37: ssiu-31 {
2009                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2010                                         dma-names = "rx", "tx";
2011                                 };
2012                                 ssiu40: ssiu-32 {
2013                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
2014                                         dma-names = "rx", "tx";
2015                                 };
2016                                 ssiu41: ssiu-33 {
2017                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2018                                         dma-names = "rx", "tx";
2019                                 };
2020                                 ssiu42: ssiu-34 {
2021                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2022                                         dma-names = "rx", "tx";
2023                                 };
2024                                 ssiu43: ssiu-35 {
2025                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2026                                         dma-names = "rx", "tx";
2027                                 };
2028                                 ssiu44: ssiu-36 {
2029                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2030                                         dma-names = "rx", "tx";
2031                                 };
2032                                 ssiu45: ssiu-37 {
2033                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2034                                         dma-names = "rx", "tx";
2035                                 };
2036                                 ssiu46: ssiu-38 {
2037                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2038                                         dma-names = "rx", "tx";
2039                                 };
2040                                 ssiu47: ssiu-39 {
2041                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2042                                         dma-names = "rx", "tx";
2043                                 };
2044                                 ssiu50: ssiu-40 {
2045                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2046                                         dma-names = "rx", "tx";
2047                                 };
2048                                 ssiu60: ssiu-41 {
2049                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2050                                         dma-names = "rx", "tx";
2051                                 };
2052                                 ssiu70: ssiu-42 {
2053                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2054                                         dma-names = "rx", "tx";
2055                                 };
2056                                 ssiu80: ssiu-43 {
2057                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2058                                         dma-names = "rx", "tx";
2059                                 };
2060                                 ssiu90: ssiu-44 {
2061                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2062                                         dma-names = "rx", "tx";
2063                                 };
2064                                 ssiu91: ssiu-45 {
2065                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2066                                         dma-names = "rx", "tx";
2067                                 };
2068                                 ssiu92: ssiu-46 {
2069                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2070                                         dma-names = "rx", "tx";
2071                                 };
2072                                 ssiu93: ssiu-47 {
2073                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2074                                         dma-names = "rx", "tx";
2075                                 };
2076                                 ssiu94: ssiu-48 {
2077                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2078                                         dma-names = "rx", "tx";
2079                                 };
2080                                 ssiu95: ssiu-49 {
2081                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2082                                         dma-names = "rx", "tx";
2083                                 };
2084                                 ssiu96: ssiu-50 {
2085                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2086                                         dma-names = "rx", "tx";
2087                                 };
2088                                 ssiu97: ssiu-51 {
2089                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2090                                         dma-names = "rx", "tx";
2091                                 };
2092                         };
2093                 };
2094
2095                 audma0: dma-controller@ec700000 {
2096                         compatible = "renesas,dmac-r8a77961",
2097                                      "renesas,rcar-dmac";
2098                         reg = <0 0xec700000 0 0x10000>;
2099                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2100                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2101                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2102                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2103                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2104                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2105                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2106                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2107                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2108                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2109                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2110                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2111                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2112                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2113                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2114                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2115                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2116                         interrupt-names = "error",
2117                                         "ch0", "ch1", "ch2", "ch3",
2118                                         "ch4", "ch5", "ch6", "ch7",
2119                                         "ch8", "ch9", "ch10", "ch11",
2120                                         "ch12", "ch13", "ch14", "ch15";
2121                         clocks = <&cpg CPG_MOD 502>;
2122                         clock-names = "fck";
2123                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2124                         resets = <&cpg 502>;
2125                         #dma-cells = <1>;
2126                         dma-channels = <16>;
2127                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2128                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2129                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2130                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2131                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2132                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2133                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2134                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2135                 };
2136
2137                 audma1: dma-controller@ec720000 {
2138                         compatible = "renesas,dmac-r8a77961",
2139                                      "renesas,rcar-dmac";
2140                         reg = <0 0xec720000 0 0x10000>;
2141                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2142                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2143                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2144                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2145                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2146                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2147                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2148                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2149                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2150                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2151                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2152                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2153                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2154                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2155                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2156                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2157                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2158                         interrupt-names = "error",
2159                                         "ch0", "ch1", "ch2", "ch3",
2160                                         "ch4", "ch5", "ch6", "ch7",
2161                                         "ch8", "ch9", "ch10", "ch11",
2162                                         "ch12", "ch13", "ch14", "ch15";
2163                         clocks = <&cpg CPG_MOD 501>;
2164                         clock-names = "fck";
2165                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2166                         resets = <&cpg 501>;
2167                         #dma-cells = <1>;
2168                         dma-channels = <16>;
2169                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2170                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2171                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2172                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2173                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2174                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2175                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2176                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2177                 };
2178
2179                 xhci0: usb@ee000000 {
2180                         compatible = "renesas,xhci-r8a77961",
2181                                      "renesas,rcar-gen3-xhci";
2182                         reg = <0 0xee000000 0 0xc00>;
2183                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2184                         clocks = <&cpg CPG_MOD 328>;
2185                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2186                         resets = <&cpg 328>;
2187                         status = "disabled";
2188                 };
2189
2190                 usb3_peri0: usb@ee020000 {
2191                         compatible = "renesas,r8a77961-usb3-peri",
2192                                      "renesas,rcar-gen3-usb3-peri";
2193                         reg = <0 0xee020000 0 0x400>;
2194                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2195                         clocks = <&cpg CPG_MOD 328>;
2196                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2197                         resets = <&cpg 328>;
2198                         status = "disabled";
2199                 };
2200
2201                 ohci0: usb@ee080000 {
2202                         compatible = "generic-ohci";
2203                         reg = <0 0xee080000 0 0x100>;
2204                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2205                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2206                         phys = <&usb2_phy0 1>;
2207                         phy-names = "usb";
2208                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2209                         resets = <&cpg 703>, <&cpg 704>;
2210                         status = "disabled";
2211                 };
2212
2213                 ohci1: usb@ee0a0000 {
2214                         compatible = "generic-ohci";
2215                         reg = <0 0xee0a0000 0 0x100>;
2216                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2217                         clocks = <&cpg CPG_MOD 702>;
2218                         phys = <&usb2_phy1 1>;
2219                         phy-names = "usb";
2220                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2221                         resets = <&cpg 702>;
2222                         status = "disabled";
2223                 };
2224
2225                 ehci0: usb@ee080100 {
2226                         compatible = "generic-ehci";
2227                         reg = <0 0xee080100 0 0x100>;
2228                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2229                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2230                         phys = <&usb2_phy0 2>;
2231                         phy-names = "usb";
2232                         companion = <&ohci0>;
2233                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2234                         resets = <&cpg 703>, <&cpg 704>;
2235                         status = "disabled";
2236                 };
2237
2238                 ehci1: usb@ee0a0100 {
2239                         compatible = "generic-ehci";
2240                         reg = <0 0xee0a0100 0 0x100>;
2241                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2242                         clocks = <&cpg CPG_MOD 702>;
2243                         phys = <&usb2_phy1 2>;
2244                         phy-names = "usb";
2245                         companion = <&ohci1>;
2246                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2247                         resets = <&cpg 702>;
2248                         status = "disabled";
2249                 };
2250
2251                 usb2_phy0: usb-phy@ee080200 {
2252                         compatible = "renesas,usb2-phy-r8a77961",
2253                                      "renesas,rcar-gen3-usb2-phy";
2254                         reg = <0 0xee080200 0 0x700>;
2255                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2256                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2257                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2258                         resets = <&cpg 703>, <&cpg 704>;
2259                         #phy-cells = <1>;
2260                         status = "disabled";
2261                 };
2262
2263                 usb2_phy1: usb-phy@ee0a0200 {
2264                         compatible = "renesas,usb2-phy-r8a77961",
2265                                      "renesas,rcar-gen3-usb2-phy";
2266                         reg = <0 0xee0a0200 0 0x700>;
2267                         clocks = <&cpg CPG_MOD 702>;
2268                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2269                         resets = <&cpg 702>;
2270                         #phy-cells = <1>;
2271                         status = "disabled";
2272                 };
2273
2274                 sdhi0: mmc@ee100000 {
2275                         compatible = "renesas,sdhi-r8a77961",
2276                                      "renesas,rcar-gen3-sdhi";
2277                         reg = <0 0xee100000 0 0x2000>;
2278                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2279                         clocks = <&cpg CPG_MOD 314>;
2280                         max-frequency = <200000000>;
2281                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2282                         resets = <&cpg 314>;
2283                         status = "disabled";
2284                 };
2285
2286                 sdhi1: mmc@ee120000 {
2287                         compatible = "renesas,sdhi-r8a77961",
2288                                      "renesas,rcar-gen3-sdhi";
2289                         reg = <0 0xee120000 0 0x2000>;
2290                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2291                         clocks = <&cpg CPG_MOD 313>;
2292                         max-frequency = <200000000>;
2293                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2294                         resets = <&cpg 313>;
2295                         status = "disabled";
2296                 };
2297
2298                 sdhi2: mmc@ee140000 {
2299                         compatible = "renesas,sdhi-r8a77961",
2300                                      "renesas,rcar-gen3-sdhi";
2301                         reg = <0 0xee140000 0 0x2000>;
2302                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2303                         clocks = <&cpg CPG_MOD 312>;
2304                         max-frequency = <200000000>;
2305                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2306                         resets = <&cpg 312>;
2307                         status = "disabled";
2308                 };
2309
2310                 sdhi3: mmc@ee160000 {
2311                         compatible = "renesas,sdhi-r8a77961",
2312                                      "renesas,rcar-gen3-sdhi";
2313                         reg = <0 0xee160000 0 0x2000>;
2314                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2315                         clocks = <&cpg CPG_MOD 311>;
2316                         max-frequency = <200000000>;
2317                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2318                         resets = <&cpg 311>;
2319                         status = "disabled";
2320                 };
2321
2322                 gic: interrupt-controller@f1010000 {
2323                         compatible = "arm,gic-400";
2324                         #interrupt-cells = <3>;
2325                         #address-cells = <0>;
2326                         interrupt-controller;
2327                         reg = <0x0 0xf1010000 0 0x1000>,
2328                               <0x0 0xf1020000 0 0x20000>,
2329                               <0x0 0xf1040000 0 0x20000>,
2330                               <0x0 0xf1060000 0 0x20000>;
2331                         interrupts = <GIC_PPI 9
2332                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2333                         clocks = <&cpg CPG_MOD 408>;
2334                         clock-names = "clk";
2335                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2336                         resets = <&cpg 408>;
2337                 };
2338
2339                 pciec0: pcie@fe000000 {
2340                         compatible = "renesas,pcie-r8a77961",
2341                                      "renesas,pcie-rcar-gen3";
2342                         reg = <0 0xfe000000 0 0x80000>;
2343                         #address-cells = <3>;
2344                         #size-cells = <2>;
2345                         bus-range = <0x00 0xff>;
2346                         device_type = "pci";
2347                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2348                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2349                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2350                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2351                         /* Map all possible DDR as inbound ranges */
2352                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2353                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2354                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2355                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2356                         #interrupt-cells = <1>;
2357                         interrupt-map-mask = <0 0 0 0>;
2358                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2359                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2360                         clock-names = "pcie", "pcie_bus";
2361                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2362                         resets = <&cpg 319>;
2363                         status = "disabled";
2364                 };
2365
2366                 pciec1: pcie@ee800000 {
2367                         compatible = "renesas,pcie-r8a77961",
2368                                      "renesas,pcie-rcar-gen3";
2369                         reg = <0 0xee800000 0 0x80000>;
2370                         #address-cells = <3>;
2371                         #size-cells = <2>;
2372                         bus-range = <0x00 0xff>;
2373                         device_type = "pci";
2374                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2375                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2376                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2377                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2378                         /* Map all possible DDR as inbound ranges */
2379                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2380                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2381                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2382                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2383                         #interrupt-cells = <1>;
2384                         interrupt-map-mask = <0 0 0 0>;
2385                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2386                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2387                         clock-names = "pcie", "pcie_bus";
2388                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2389                         resets = <&cpg 318>;
2390                         status = "disabled";
2391                 };
2392
2393                 fcpf0: fcp@fe950000 {
2394                         compatible = "renesas,fcpf";
2395                         reg = <0 0xfe950000 0 0x200>;
2396                         clocks = <&cpg CPG_MOD 615>;
2397                         power-domains = <&sysc R8A77961_PD_A3VC>;
2398                         resets = <&cpg 615>;
2399                 };
2400
2401                 fcpvb0: fcp@fe96f000 {
2402                         compatible = "renesas,fcpv";
2403                         reg = <0 0xfe96f000 0 0x200>;
2404                         clocks = <&cpg CPG_MOD 607>;
2405                         power-domains = <&sysc R8A77961_PD_A3VC>;
2406                         resets = <&cpg 607>;
2407                 };
2408
2409                 fcpvi0: fcp@fe9af000 {
2410                         compatible = "renesas,fcpv";
2411                         reg = <0 0xfe9af000 0 0x200>;
2412                         clocks = <&cpg CPG_MOD 611>;
2413                         power-domains = <&sysc R8A77961_PD_A3VC>;
2414                         resets = <&cpg 611>;
2415                         iommus = <&ipmmu_vc0 19>;
2416                 };
2417
2418                 fcpvd0: fcp@fea27000 {
2419                         compatible = "renesas,fcpv";
2420                         reg = <0 0xfea27000 0 0x200>;
2421                         clocks = <&cpg CPG_MOD 603>;
2422                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2423                         resets = <&cpg 603>;
2424                         iommus = <&ipmmu_vi0 8>;
2425                 };
2426
2427                 fcpvd1: fcp@fea2f000 {
2428                         compatible = "renesas,fcpv";
2429                         reg = <0 0xfea2f000 0 0x200>;
2430                         clocks = <&cpg CPG_MOD 602>;
2431                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2432                         resets = <&cpg 602>;
2433                         iommus = <&ipmmu_vi0 9>;
2434                 };
2435
2436                 fcpvd2: fcp@fea37000 {
2437                         compatible = "renesas,fcpv";
2438                         reg = <0 0xfea37000 0 0x200>;
2439                         clocks = <&cpg CPG_MOD 601>;
2440                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2441                         resets = <&cpg 601>;
2442                         iommus = <&ipmmu_vi0 10>;
2443                 };
2444
2445                 vspb: vsp@fe960000 {
2446                         compatible = "renesas,vsp2";
2447                         reg = <0 0xfe960000 0 0x8000>;
2448                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2449                         clocks = <&cpg CPG_MOD 626>;
2450                         power-domains = <&sysc R8A77961_PD_A3VC>;
2451                         resets = <&cpg 626>;
2452
2453                         renesas,fcp = <&fcpvb0>;
2454                 };
2455
2456                 vspd0: vsp@fea20000 {
2457                         compatible = "renesas,vsp2";
2458                         reg = <0 0xfea20000 0 0x5000>;
2459                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2460                         clocks = <&cpg CPG_MOD 623>;
2461                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2462                         resets = <&cpg 623>;
2463
2464                         renesas,fcp = <&fcpvd0>;
2465                 };
2466
2467                 vspd1: vsp@fea28000 {
2468                         compatible = "renesas,vsp2";
2469                         reg = <0 0xfea28000 0 0x5000>;
2470                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2471                         clocks = <&cpg CPG_MOD 622>;
2472                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2473                         resets = <&cpg 622>;
2474
2475                         renesas,fcp = <&fcpvd1>;
2476                 };
2477
2478                 vspd2: vsp@fea30000 {
2479                         compatible = "renesas,vsp2";
2480                         reg = <0 0xfea30000 0 0x5000>;
2481                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2482                         clocks = <&cpg CPG_MOD 621>;
2483                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2484                         resets = <&cpg 621>;
2485
2486                         renesas,fcp = <&fcpvd2>;
2487                 };
2488
2489                 vspi0: vsp@fe9a0000 {
2490                         compatible = "renesas,vsp2";
2491                         reg = <0 0xfe9a0000 0 0x8000>;
2492                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2493                         clocks = <&cpg CPG_MOD 631>;
2494                         power-domains = <&sysc R8A77961_PD_A3VC>;
2495                         resets = <&cpg 631>;
2496
2497                         renesas,fcp = <&fcpvi0>;
2498                 };
2499
2500                 csi20: csi2@fea80000 {
2501                         compatible = "renesas,r8a77961-csi2";
2502                         reg = <0 0xfea80000 0 0x10000>;
2503                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2504                         clocks = <&cpg CPG_MOD 714>;
2505                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2506                         resets = <&cpg 714>;
2507                         status = "disabled";
2508
2509                         ports {
2510                                 #address-cells = <1>;
2511                                 #size-cells = <0>;
2512
2513                                 port@0 {
2514                                         reg = <0>;
2515                                 };
2516
2517                                 port@1 {
2518                                         #address-cells = <1>;
2519                                         #size-cells = <0>;
2520
2521                                         reg = <1>;
2522
2523                                         csi20vin0: endpoint@0 {
2524                                                 reg = <0>;
2525                                                 remote-endpoint = <&vin0csi20>;
2526                                         };
2527                                         csi20vin1: endpoint@1 {
2528                                                 reg = <1>;
2529                                                 remote-endpoint = <&vin1csi20>;
2530                                         };
2531                                         csi20vin2: endpoint@2 {
2532                                                 reg = <2>;
2533                                                 remote-endpoint = <&vin2csi20>;
2534                                         };
2535                                         csi20vin3: endpoint@3 {
2536                                                 reg = <3>;
2537                                                 remote-endpoint = <&vin3csi20>;
2538                                         };
2539                                         csi20vin4: endpoint@4 {
2540                                                 reg = <4>;
2541                                                 remote-endpoint = <&vin4csi20>;
2542                                         };
2543                                         csi20vin5: endpoint@5 {
2544                                                 reg = <5>;
2545                                                 remote-endpoint = <&vin5csi20>;
2546                                         };
2547                                         csi20vin6: endpoint@6 {
2548                                                 reg = <6>;
2549                                                 remote-endpoint = <&vin6csi20>;
2550                                         };
2551                                         csi20vin7: endpoint@7 {
2552                                                 reg = <7>;
2553                                                 remote-endpoint = <&vin7csi20>;
2554                                         };
2555                                 };
2556                         };
2557                 };
2558
2559                 csi40: csi2@feaa0000 {
2560                         compatible = "renesas,r8a77961-csi2";
2561                         reg = <0 0xfeaa0000 0 0x10000>;
2562                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2563                         clocks = <&cpg CPG_MOD 716>;
2564                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2565                         resets = <&cpg 716>;
2566                         status = "disabled";
2567
2568                         ports {
2569                                 #address-cells = <1>;
2570                                 #size-cells = <0>;
2571
2572                                 port@0 {
2573                                         reg = <0>;
2574                                 };
2575
2576                                 port@1 {
2577                                         #address-cells = <1>;
2578                                         #size-cells = <0>;
2579
2580                                         reg = <1>;
2581
2582                                         csi40vin0: endpoint@0 {
2583                                                 reg = <0>;
2584                                                 remote-endpoint = <&vin0csi40>;
2585                                         };
2586                                         csi40vin1: endpoint@1 {
2587                                                 reg = <1>;
2588                                                 remote-endpoint = <&vin1csi40>;
2589                                         };
2590                                         csi40vin2: endpoint@2 {
2591                                                 reg = <2>;
2592                                                 remote-endpoint = <&vin2csi40>;
2593                                         };
2594                                         csi40vin3: endpoint@3 {
2595                                                 reg = <3>;
2596                                                 remote-endpoint = <&vin3csi40>;
2597                                         };
2598                                         csi40vin4: endpoint@4 {
2599                                                 reg = <4>;
2600                                                 remote-endpoint = <&vin4csi40>;
2601                                         };
2602                                         csi40vin5: endpoint@5 {
2603                                                 reg = <5>;
2604                                                 remote-endpoint = <&vin5csi40>;
2605                                         };
2606                                         csi40vin6: endpoint@6 {
2607                                                 reg = <6>;
2608                                                 remote-endpoint = <&vin6csi40>;
2609                                         };
2610                                         csi40vin7: endpoint@7 {
2611                                                 reg = <7>;
2612                                                 remote-endpoint = <&vin7csi40>;
2613                                         };
2614                                 };
2615
2616                         };
2617                 };
2618
2619                 hdmi0: hdmi@fead0000 {
2620                         compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi";
2621                         reg = <0 0xfead0000 0 0x10000>;
2622                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2623                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>;
2624                         clock-names = "iahb", "isfr";
2625                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2626                         resets = <&cpg 729>;
2627                         status = "disabled";
2628
2629                         ports {
2630                                 #address-cells = <1>;
2631                                 #size-cells = <0>;
2632                                 port@0 {
2633                                         reg = <0>;
2634                                         dw_hdmi0_in: endpoint {
2635                                                 remote-endpoint = <&du_out_hdmi0>;
2636                                         };
2637                                 };
2638                                 port@1 {
2639                                         reg = <1>;
2640                                 };
2641                                 port@2 {
2642                                         /* HDMI sound */
2643                                         reg = <2>;
2644                                 };
2645                         };
2646                 };
2647
2648                 du: display@feb00000 {
2649                         compatible = "renesas,du-r8a77961";
2650                         reg = <0 0xfeb00000 0 0x70000>;
2651                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2652                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2653                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2654                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2655                                  <&cpg CPG_MOD 722>;
2656                         clock-names = "du.0", "du.1", "du.2";
2657                         resets = <&cpg 724>, <&cpg 722>;
2658                         reset-names = "du.0", "du.2";
2659
2660                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2661                         status = "disabled";
2662
2663                         ports {
2664                                 #address-cells = <1>;
2665                                 #size-cells = <0>;
2666
2667                                 port@0 {
2668                                         reg = <0>;
2669                                         du_out_rgb: endpoint {
2670                                         };
2671                                 };
2672                                 port@1 {
2673                                         reg = <1>;
2674                                         du_out_hdmi0: endpoint {
2675                                                 remote-endpoint = <&dw_hdmi0_in>;
2676                                         };
2677                                 };
2678                                 port@2 {
2679                                         reg = <2>;
2680                                         du_out_lvds0: endpoint {
2681                                         };
2682                                 };
2683                         };
2684                 };
2685
2686                 prr: chipid@fff00044 {
2687                         compatible = "renesas,prr";
2688                         reg = <0 0xfff00044 0 4>;
2689                 };
2690         };
2691
2692         thermal-zones {
2693                 sensor_thermal1: sensor-thermal1 {
2694                         polling-delay-passive = <250>;
2695                         polling-delay = <1000>;
2696                         thermal-sensors = <&tsc 0>;
2697                         sustainable-power = <3874>;
2698
2699                         trips {
2700                                 sensor1_crit: sensor1-crit {
2701                                         temperature = <120000>;
2702                                         hysteresis = <1000>;
2703                                         type = "critical";
2704                                 };
2705                         };
2706                 };
2707
2708                 sensor_thermal2: sensor-thermal2 {
2709                         polling-delay-passive = <250>;
2710                         polling-delay = <1000>;
2711                         thermal-sensors = <&tsc 1>;
2712                         sustainable-power = <3874>;
2713
2714                         trips {
2715                                 sensor2_crit: sensor2-crit {
2716                                         temperature = <120000>;
2717                                         hysteresis = <1000>;
2718                                         type = "critical";
2719                                 };
2720                         };
2721                 };
2722
2723                 sensor_thermal3: sensor-thermal3 {
2724                         polling-delay-passive = <250>;
2725                         polling-delay = <1000>;
2726                         thermal-sensors = <&tsc 2>;
2727                         sustainable-power = <3874>;
2728
2729                         cooling-maps {
2730                                 map0 {
2731                                         trip = <&target>;
2732                                         cooling-device = <&a57_0 2 4>;
2733                                         contribution = <1024>;
2734                                 };
2735                                 map1 {
2736                                         trip = <&target>;
2737                                         cooling-device = <&a53_0 0 2>;
2738                                         contribution = <1024>;
2739                                 };
2740                         };
2741                         trips {
2742                                 target: trip-point1 {
2743                                         temperature = <100000>;
2744                                         hysteresis = <1000>;
2745                                         type = "passive";
2746                                 };
2747
2748                                 sensor3_crit: sensor3-crit {
2749                                         temperature = <120000>;
2750                                         hysteresis = <1000>;
2751                                         type = "critical";
2752                                 };
2753                         };
2754                 };
2755         };
2756
2757         timer {
2758                 compatible = "arm,armv8-timer";
2759                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2760                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2761                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2762                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2763         };
2764
2765         /* External USB clocks - can be overridden by the board */
2766         usb3s0_clk: usb3s0 {
2767                 compatible = "fixed-clock";
2768                 #clock-cells = <0>;
2769                 clock-frequency = <0>;
2770         };
2771
2772         usb_extal_clk: usb_extal {
2773                 compatible = "fixed-clock";
2774                 #clock-cells = <0>;
2775                 clock-frequency = <0>;
2776         };
2777 };