arch/arm64/boot/dts/renesas/r8a77960.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-W (R8A77960) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7796-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7796";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         /*
  31          * The external audio clocks are configured as 0 Hz fixed frequency
  32          * clocks by default.
  33          * Boards that provide audio clocks should override them.
  34          */
  35         audio_clk_a: audio_clk_a {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         audio_clk_c: audio_clk_c {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <0>;
  51         };
  52
  53         /* External CAN clock - to be overridden by boards that provide it */
  54         can_clk: can {
  55                 compatible = "fixed-clock";
  56                 #clock-cells = <0>;
  57                 clock-frequency = <0>;
  58         };
  59
  60         cluster0_opp: opp_table0 {
  61                 compatible = "operating-points-v2";
  62                 opp-shared;
  63
  64                 opp-500000000 {
  65                         opp-hz = /bits/ 64 <500000000>;
  66                         opp-microvolt = <830000>;
  67                         clock-latency-ns = <300000>;
  68                 };
  69                 opp-1000000000 {
  70                         opp-hz = /bits/ 64 <1000000000>;
  71                         opp-microvolt = <830000>;
  72                         clock-latency-ns = <300000>;
  73                 };
  74                 opp-1500000000 {
  75                         opp-hz = /bits/ 64 <1500000000>;
  76                         opp-microvolt = <830000>;
  77                         clock-latency-ns = <300000>;
  78                         opp-suspend;
  79                 };
  80                 opp-1600000000 {
  81                         opp-hz = /bits/ 64 <1600000000>;
  82                         opp-microvolt = <900000>;
  83                         clock-latency-ns = <300000>;
  84                         turbo-mode;
  85                 };
  86                 opp-1700000000 {
  87                         opp-hz = /bits/ 64 <1700000000>;
  88                         opp-microvolt = <900000>;
  89                         clock-latency-ns = <300000>;
  90                         turbo-mode;
  91                 };
  92                 opp-1800000000 {
  93                         opp-hz = /bits/ 64 <1800000000>;
  94                         opp-microvolt = <960000>;
  95                         clock-latency-ns = <300000>;
  96                         turbo-mode;
  97                 };
  98         };
  99
 100         cluster1_opp: opp_table1 {
 101                 compatible = "operating-points-v2";
 102                 opp-shared;
 103
 104                 opp-800000000 {
 105                         opp-hz = /bits/ 64 <800000000>;
 106                         opp-microvolt = <820000>;
 107                         clock-latency-ns = <300000>;
 108                 };
 109                 opp-1000000000 {
 110                         opp-hz = /bits/ 64 <1000000000>;
 111                         opp-microvolt = <820000>;
 112                         clock-latency-ns = <300000>;
 113                 };
 114                 opp-1200000000 {
 115                         opp-hz = /bits/ 64 <1200000000>;
 116                         opp-microvolt = <820000>;
 117                         clock-latency-ns = <300000>;
 118                 };
 119                 opp-1300000000 {
 120                         opp-hz = /bits/ 64 <1300000000>;
 121                         opp-microvolt = <820000>;
 122                         clock-latency-ns = <300000>;
 123                         turbo-mode;
 124                 };
 125         };
 126
 127         cpus {
 128                 #address-cells = <1>;
 129                 #size-cells = <0>;
 130
 131                 cpu-map {
 132                         cluster0 {
 133                                 core0 {
 134                                         cpu = <&a57_0>;
 135                                 };
 136                                 core1 {
 137                                         cpu = <&a57_1>;
 138                                 };
 139                         };
 140
 141                         cluster1 {
 142                                 core0 {
 143                                         cpu = <&a53_0>;
 144                                 };
 145                                 core1 {
 146                                         cpu = <&a53_1>;
 147                                 };
 148                                 core2 {
 149                                         cpu = <&a53_2>;
 150                                 };
 151                                 core3 {
 152                                         cpu = <&a53_3>;
 153                                 };
 154                         };
 155                 };
 156
 157                 a57_0: cpu@0 {
 158                         compatible = "arm,cortex-a57";
 159                         reg = <0x0>;
 160                         device_type = "cpu";
 161                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
 162                         next-level-cache = <&L2_CA57>;
 163                         enable-method = "psci";
 164                         cpu-idle-states = <&CPU_SLEEP_0>;
 165                         dynamic-power-coefficient = <854>;
 166                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 167                         operating-points-v2 = <&cluster0_opp>;
 168                         capacity-dmips-mhz = <1024>;
 169                         #cooling-cells = <2>;
 170                 };
 171
 172                 a57_1: cpu@1 {
 173                         compatible = "arm,cortex-a57";
 174                         reg = <0x1>;
 175                         device_type = "cpu";
 176                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
 177                         next-level-cache = <&L2_CA57>;
 178                         enable-method = "psci";
 179                         cpu-idle-states = <&CPU_SLEEP_0>;
 180                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 181                         operating-points-v2 = <&cluster0_opp>;
 182                         capacity-dmips-mhz = <1024>;
 183                         #cooling-cells = <2>;
 184                 };
 185
 186                 a53_0: cpu@100 {
 187                         compatible = "arm,cortex-a53";
 188                         reg = <0x100>;
 189                         device_type = "cpu";
 190                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
 191                         next-level-cache = <&L2_CA53>;
 192                         enable-method = "psci";
 193                         cpu-idle-states = <&CPU_SLEEP_1>;
 194                         #cooling-cells = <2>;
 195                         dynamic-power-coefficient = <277>;
 196                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 197                         operating-points-v2 = <&cluster1_opp>;
 198                         capacity-dmips-mhz = <535>;
 199                 };
 200
 201                 a53_1: cpu@101 {
 202                         compatible = "arm,cortex-a53";
 203                         reg = <0x101>;
 204                         device_type = "cpu";
 205                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
 206                         next-level-cache = <&L2_CA53>;
 207                         enable-method = "psci";
 208                         cpu-idle-states = <&CPU_SLEEP_1>;
 209                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 210                         operating-points-v2 = <&cluster1_opp>;
 211                         capacity-dmips-mhz = <535>;
 212                 };
 213
 214                 a53_2: cpu@102 {
 215                         compatible = "arm,cortex-a53";
 216                         reg = <0x102>;
 217                         device_type = "cpu";
 218                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
 219                         next-level-cache = <&L2_CA53>;
 220                         enable-method = "psci";
 221                         cpu-idle-states = <&CPU_SLEEP_1>;
 222                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 223                         operating-points-v2 = <&cluster1_opp>;
 224                         capacity-dmips-mhz = <535>;
 225                 };
 226
 227                 a53_3: cpu@103 {
 228                         compatible = "arm,cortex-a53";
 229                         reg = <0x103>;
 230                         device_type = "cpu";
 231                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
 232                         next-level-cache = <&L2_CA53>;
 233                         enable-method = "psci";
 234                         cpu-idle-states = <&CPU_SLEEP_1>;
 235                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 236                         operating-points-v2 = <&cluster1_opp>;
 237                         capacity-dmips-mhz = <535>;
 238                 };
 239
 240                 L2_CA57: cache-controller-0 {
 241                         compatible = "cache";
 242                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
 243                         cache-unified;
 244                         cache-level = <2>;
 245                 };
 246
 247                 L2_CA53: cache-controller-1 {
 248                         compatible = "cache";
 249                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 250                         cache-unified;
 251                         cache-level = <2>;
 252                 };
 253
 254                 idle-states {
 255                         entry-method = "psci";
 256
 257                         CPU_SLEEP_0: cpu-sleep-0 {
 258                                 compatible = "arm,idle-state";
 259                                 arm,psci-suspend-param = <0x0010000>;
 260                                 local-timer-stop;
 261                                 entry-latency-us = <400>;
 262                                 exit-latency-us = <500>;
 263                                 min-residency-us = <4000>;
 264                         };
 265
 266                         CPU_SLEEP_1: cpu-sleep-1 {
 267                                 compatible = "arm,idle-state";
 268                                 arm,psci-suspend-param = <0x0010000>;
 269                                 local-timer-stop;
 270                                 entry-latency-us = <700>;
 271                                 exit-latency-us = <700>;
 272                                 min-residency-us = <5000>;
 273                         };
 274                 };
 275         };
 276
 277         extal_clk: extal {
 278                 compatible = "fixed-clock";
 279                 #clock-cells = <0>;
 280                 /* This value must be overridden by the board */
 281                 clock-frequency = <0>;
 282         };
 283
 284         extalr_clk: extalr {
 285                 compatible = "fixed-clock";
 286                 #clock-cells = <0>;
 287                 /* This value must be overridden by the board */
 288                 clock-frequency = <0>;
 289         };
 290
 291         /* External PCIe clock - can be overridden by the board */
 292         pcie_bus_clk: pcie_bus {
 293                 compatible = "fixed-clock";
 294                 #clock-cells = <0>;
 295                 clock-frequency = <0>;
 296         };
 297
 298         pmu_a53 {
 299                 compatible = "arm,cortex-a53-pmu";
 300                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 301                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 302                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 303                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 304                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 305         };
 306
 307         pmu_a57 {
 308                 compatible = "arm,cortex-a57-pmu";
 309                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 310                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 311                 interrupt-affinity = <&a57_0>, <&a57_1>;
 312         };
 313
 314         psci {
 315                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 316                 method = "smc";
 317         };
 318
 319         /* External SCIF clock - to be overridden by boards that provide it */
 320         scif_clk: scif {
 321                 compatible = "fixed-clock";
 322                 #clock-cells = <0>;
 323                 clock-frequency = <0>;
 324         };
 325
 326         soc {
 327                 compatible = "simple-bus";
 328                 interrupt-parent = <&gic>;
 329                 #address-cells = <2>;
 330                 #size-cells = <2>;
 331                 ranges;
 332
 333                 rwdt: watchdog@e6020000 {
 334                         compatible = "renesas,r8a7796-wdt",
 335                                      "renesas,rcar-gen3-wdt";
 336                         reg = <0 0xe6020000 0 0x0c>;
 337                         clocks = <&cpg CPG_MOD 402>;
 338                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 339                         resets = <&cpg 402>;
 340                         status = "disabled";
 341                 };
 342
 343                 gpio0: gpio@e6050000 {
 344                         compatible = "renesas,gpio-r8a7796",
 345                                      "renesas,rcar-gen3-gpio";
 346                         reg = <0 0xe6050000 0 0x50>;
 347                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 348                         #gpio-cells = <2>;
 349                         gpio-controller;
 350                         gpio-ranges = <&pfc 0 0 16>;
 351                         #interrupt-cells = <2>;
 352                         interrupt-controller;
 353                         clocks = <&cpg CPG_MOD 912>;
 354                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 355                         resets = <&cpg 912>;
 356                 };
 357
 358                 gpio1: gpio@e6051000 {
 359                         compatible = "renesas,gpio-r8a7796",
 360                                      "renesas,rcar-gen3-gpio";
 361                         reg = <0 0xe6051000 0 0x50>;
 362                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 363                         #gpio-cells = <2>;
 364                         gpio-controller;
 365                         gpio-ranges = <&pfc 0 32 29>;
 366                         #interrupt-cells = <2>;
 367                         interrupt-controller;
 368                         clocks = <&cpg CPG_MOD 911>;
 369                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 370                         resets = <&cpg 911>;
 371                 };
 372
 373                 gpio2: gpio@e6052000 {
 374                         compatible = "renesas,gpio-r8a7796",
 375                                      "renesas,rcar-gen3-gpio";
 376                         reg = <0 0xe6052000 0 0x50>;
 377                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 378                         #gpio-cells = <2>;
 379                         gpio-controller;
 380                         gpio-ranges = <&pfc 0 64 15>;
 381                         #interrupt-cells = <2>;
 382                         interrupt-controller;
 383                         clocks = <&cpg CPG_MOD 910>;
 384                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 385                         resets = <&cpg 910>;
 386                 };
 387
 388                 gpio3: gpio@e6053000 {
 389                         compatible = "renesas,gpio-r8a7796",
 390                                      "renesas,rcar-gen3-gpio";
 391                         reg = <0 0xe6053000 0 0x50>;
 392                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 393                         #gpio-cells = <2>;
 394                         gpio-controller;
 395                         gpio-ranges = <&pfc 0 96 16>;
 396                         #interrupt-cells = <2>;
 397                         interrupt-controller;
 398                         clocks = <&cpg CPG_MOD 909>;
 399                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 400                         resets = <&cpg 909>;
 401                 };
 402
 403                 gpio4: gpio@e6054000 {
 404                         compatible = "renesas,gpio-r8a7796",
 405                                      "renesas,rcar-gen3-gpio";
 406                         reg = <0 0xe6054000 0 0x50>;
 407                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 408                         #gpio-cells = <2>;
 409                         gpio-controller;
 410                         gpio-ranges = <&pfc 0 128 18>;
 411                         #interrupt-cells = <2>;
 412                         interrupt-controller;
 413                         clocks = <&cpg CPG_MOD 908>;
 414                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 415                         resets = <&cpg 908>;
 416                 };
 417
 418                 gpio5: gpio@e6055000 {
 419                         compatible = "renesas,gpio-r8a7796",
 420                                      "renesas,rcar-gen3-gpio";
 421                         reg = <0 0xe6055000 0 0x50>;
 422                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 423                         #gpio-cells = <2>;
 424                         gpio-controller;
 425                         gpio-ranges = <&pfc 0 160 26>;
 426                         #interrupt-cells = <2>;
 427                         interrupt-controller;
 428                         clocks = <&cpg CPG_MOD 907>;
 429                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 430                         resets = <&cpg 907>;
 431                 };
 432
 433                 gpio6: gpio@e6055400 {
 434                         compatible = "renesas,gpio-r8a7796",
 435                                      "renesas,rcar-gen3-gpio";
 436                         reg = <0 0xe6055400 0 0x50>;
 437                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 438                         #gpio-cells = <2>;
 439                         gpio-controller;
 440                         gpio-ranges = <&pfc 0 192 32>;
 441                         #interrupt-cells = <2>;
 442                         interrupt-controller;
 443                         clocks = <&cpg CPG_MOD 906>;
 444                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 445                         resets = <&cpg 906>;
 446                 };
 447
 448                 gpio7: gpio@e6055800 {
 449                         compatible = "renesas,gpio-r8a7796",
 450                                      "renesas,rcar-gen3-gpio";
 451                         reg = <0 0xe6055800 0 0x50>;
 452                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 453                         #gpio-cells = <2>;
 454                         gpio-controller;
 455                         gpio-ranges = <&pfc 0 224 4>;
 456                         #interrupt-cells = <2>;
 457                         interrupt-controller;
 458                         clocks = <&cpg CPG_MOD 905>;
 459                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 460                         resets = <&cpg 905>;
 461                 };
 462
 463                 pfc: pinctrl@e6060000 {
 464                         compatible = "renesas,pfc-r8a7796";
 465                         reg = <0 0xe6060000 0 0x50c>;
 466                 };
 467
 468                 cmt0: timer@e60f0000 {
 469                         compatible = "renesas,r8a7796-cmt0",
 470                                      "renesas,rcar-gen3-cmt0";
 471                         reg = <0 0xe60f0000 0 0x1004>;
 472                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 473                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 474                         clocks = <&cpg CPG_MOD 303>;
 475                         clock-names = "fck";
 476                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 477                         resets = <&cpg 303>;
 478                         status = "disabled";
 479                 };
 480
 481                 cmt1: timer@e6130000 {
 482                         compatible = "renesas,r8a7796-cmt1",
 483                                      "renesas,rcar-gen3-cmt1";
 484                         reg = <0 0xe6130000 0 0x1004>;
 485                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 486                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 487                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 488                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 489                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 490                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 493                         clocks = <&cpg CPG_MOD 302>;
 494                         clock-names = "fck";
 495                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 496                         resets = <&cpg 302>;
 497                         status = "disabled";
 498                 };
 499
 500                 cmt2: timer@e6140000 {
 501                         compatible = "renesas,r8a7796-cmt1",
 502                                      "renesas,rcar-gen3-cmt1";
 503                         reg = <0 0xe6140000 0 0x1004>;
 504                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 505                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 506                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 507                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 508                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 509                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 510                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 512                         clocks = <&cpg CPG_MOD 301>;
 513                         clock-names = "fck";
 514                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 515                         resets = <&cpg 301>;
 516                         status = "disabled";
 517                 };
 518
 519                 cmt3: timer@e6148000 {
 520                         compatible = "renesas,r8a7796-cmt1",
 521                                      "renesas,rcar-gen3-cmt1";
 522                         reg = <0 0xe6148000 0 0x1004>;
 523                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 524                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 525                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 526                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 531                         clocks = <&cpg CPG_MOD 300>;
 532                         clock-names = "fck";
 533                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 534                         resets = <&cpg 300>;
 535                         status = "disabled";
 536                 };
 537
 538                 cpg: clock-controller@e6150000 {
 539                         compatible = "renesas,r8a7796-cpg-mssr";
 540                         reg = <0 0xe6150000 0 0x1000>;
 541                         clocks = <&extal_clk>, <&extalr_clk>;
 542                         clock-names = "extal", "extalr";
 543                         #clock-cells = <2>;
 544                         #power-domain-cells = <0>;
 545                         #reset-cells = <1>;
 546                 };
 547
 548                 rst: reset-controller@e6160000 {
 549                         compatible = "renesas,r8a7796-rst";
 550                         reg = <0 0xe6160000 0 0x0200>;
 551                 };
 552
 553                 sysc: system-controller@e6180000 {
 554                         compatible = "renesas,r8a7796-sysc";
 555                         reg = <0 0xe6180000 0 0x0400>;
 556                         #power-domain-cells = <1>;
 557                 };
 558
 559                 tsc: thermal@e6198000 {
 560                         compatible = "renesas,r8a7796-thermal";
 561                         reg = <0 0xe6198000 0 0x100>,
 562                               <0 0xe61a0000 0 0x100>,
 563                               <0 0xe61a8000 0 0x100>;
 564                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 565                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 566                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 567                         clocks = <&cpg CPG_MOD 522>;
 568                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 569                         resets = <&cpg 522>;
 570                         #thermal-sensor-cells = <1>;
 571                 };
 572
 573                 intc_ex: interrupt-controller@e61c0000 {
 574                         compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
 575                         #interrupt-cells = <2>;
 576                         interrupt-controller;
 577                         reg = <0 0xe61c0000 0 0x200>;
 578                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 579                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 580                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 581                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 582                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 584                         clocks = <&cpg CPG_MOD 407>;
 585                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 586                         resets = <&cpg 407>;
 587                 };
 588
 589                 tmu0: timer@e61e0000 {
 590                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 591                         reg = <0 0xe61e0000 0 0x30>;
 592                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 593                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 594                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 595                         clocks = <&cpg CPG_MOD 125>;
 596                         clock-names = "fck";
 597                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 598                         resets = <&cpg 125>;
 599                         status = "disabled";
 600                 };
 601
 602                 tmu1: timer@e6fc0000 {
 603                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 604                         reg = <0 0xe6fc0000 0 0x30>;
 605                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 608                         clocks = <&cpg CPG_MOD 124>;
 609                         clock-names = "fck";
 610                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 611                         resets = <&cpg 124>;
 612                         status = "disabled";
 613                 };
 614
 615                 tmu2: timer@e6fd0000 {
 616                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 617                         reg = <0 0xe6fd0000 0 0x30>;
 618                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 620                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 621                         clocks = <&cpg CPG_MOD 123>;
 622                         clock-names = "fck";
 623                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 624                         resets = <&cpg 123>;
 625                         status = "disabled";
 626                 };
 627
 628                 tmu3: timer@e6fe0000 {
 629                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 630                         reg = <0 0xe6fe0000 0 0x30>;
 631                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 632                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 633                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 634                         clocks = <&cpg CPG_MOD 122>;
 635                         clock-names = "fck";
 636                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 637                         resets = <&cpg 122>;
 638                         status = "disabled";
 639                 };
 640
 641                 tmu4: timer@ffc00000 {
 642                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 643                         reg = <0 0xffc00000 0 0x30>;
 644                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 121>;
 648                         clock-names = "fck";
 649                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 650                         resets = <&cpg 121>;
 651                         status = "disabled";
 652                 };
 653
 654                 i2c0: i2c@e6500000 {
 655                         #address-cells = <1>;
 656                         #size-cells = <0>;
 657                         compatible = "renesas,i2c-r8a7796",
 658                                      "renesas,rcar-gen3-i2c";
 659                         reg = <0 0xe6500000 0 0x40>;
 660                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 661                         clocks = <&cpg CPG_MOD 931>;
 662                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 663                         resets = <&cpg 931>;
 664                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 665                                <&dmac2 0x91>, <&dmac2 0x90>;
 666                         dma-names = "tx", "rx", "tx", "rx";
 667                         i2c-scl-internal-delay-ns = <110>;
 668                         status = "disabled";
 669                 };
 670
 671                 i2c1: i2c@e6508000 {
 672                         #address-cells = <1>;
 673                         #size-cells = <0>;
 674                         compatible = "renesas,i2c-r8a7796",
 675                                      "renesas,rcar-gen3-i2c";
 676                         reg = <0 0xe6508000 0 0x40>;
 677                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 678                         clocks = <&cpg CPG_MOD 930>;
 679                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 680                         resets = <&cpg 930>;
 681                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 682                                <&dmac2 0x93>, <&dmac2 0x92>;
 683                         dma-names = "tx", "rx", "tx", "rx";
 684                         i2c-scl-internal-delay-ns = <6>;
 685                         status = "disabled";
 686                 };
 687
 688                 i2c2: i2c@e6510000 {
 689                         #address-cells = <1>;
 690                         #size-cells = <0>;
 691                         compatible = "renesas,i2c-r8a7796",
 692                                      "renesas,rcar-gen3-i2c";
 693                         reg = <0 0xe6510000 0 0x40>;
 694                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 695                         clocks = <&cpg CPG_MOD 929>;
 696                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 697                         resets = <&cpg 929>;
 698                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 699                                <&dmac2 0x95>, <&dmac2 0x94>;
 700                         dma-names = "tx", "rx", "tx", "rx";
 701                         i2c-scl-internal-delay-ns = <6>;
 702                         status = "disabled";
 703                 };
 704
 705                 i2c3: i2c@e66d0000 {
 706                         #address-cells = <1>;
 707                         #size-cells = <0>;
 708                         compatible = "renesas,i2c-r8a7796",
 709                                      "renesas,rcar-gen3-i2c";
 710                         reg = <0 0xe66d0000 0 0x40>;
 711                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 712                         clocks = <&cpg CPG_MOD 928>;
 713                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 714                         resets = <&cpg 928>;
 715                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 716                         dma-names = "tx", "rx";
 717                         i2c-scl-internal-delay-ns = <110>;
 718                         status = "disabled";
 719                 };
 720
 721                 i2c4: i2c@e66d8000 {
 722                         #address-cells = <1>;
 723                         #size-cells = <0>;
 724                         compatible = "renesas,i2c-r8a7796",
 725                                      "renesas,rcar-gen3-i2c";
 726                         reg = <0 0xe66d8000 0 0x40>;
 727                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 728                         clocks = <&cpg CPG_MOD 927>;
 729                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 730                         resets = <&cpg 927>;
 731                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 732                         dma-names = "tx", "rx";
 733                         i2c-scl-internal-delay-ns = <110>;
 734                         status = "disabled";
 735                 };
 736
 737                 i2c5: i2c@e66e0000 {
 738                         #address-cells = <1>;
 739                         #size-cells = <0>;
 740                         compatible = "renesas,i2c-r8a7796",
 741                                      "renesas,rcar-gen3-i2c";
 742                         reg = <0 0xe66e0000 0 0x40>;
 743                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 744                         clocks = <&cpg CPG_MOD 919>;
 745                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 746                         resets = <&cpg 919>;
 747                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 748                         dma-names = "tx", "rx";
 749                         i2c-scl-internal-delay-ns = <110>;
 750                         status = "disabled";
 751                 };
 752
 753                 i2c6: i2c@e66e8000 {
 754                         #address-cells = <1>;
 755                         #size-cells = <0>;
 756                         compatible = "renesas,i2c-r8a7796",
 757                                      "renesas,rcar-gen3-i2c";
 758                         reg = <0 0xe66e8000 0 0x40>;
 759                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 760                         clocks = <&cpg CPG_MOD 918>;
 761                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 762                         resets = <&cpg 918>;
 763                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 764                         dma-names = "tx", "rx";
 765                         i2c-scl-internal-delay-ns = <6>;
 766                         status = "disabled";
 767                 };
 768
 769                 i2c_dvfs: i2c@e60b0000 {
 770                         #address-cells = <1>;
 771                         #size-cells = <0>;
 772                         compatible = "renesas,iic-r8a7796",
 773                                      "renesas,rcar-gen3-iic",
 774                                      "renesas,rmobile-iic";
 775                         reg = <0 0xe60b0000 0 0x425>;
 776                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 777                         clocks = <&cpg CPG_MOD 926>;
 778                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 779                         resets = <&cpg 926>;
 780                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 781                         dma-names = "tx", "rx";
 782                         status = "disabled";
 783                 };
 784
 785                 hscif0: serial@e6540000 {
 786                         compatible = "renesas,hscif-r8a7796",
 787                                      "renesas,rcar-gen3-hscif",
 788                                      "renesas,hscif";
 789                         reg = <0 0xe6540000 0 0x60>;
 790                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 791                         clocks = <&cpg CPG_MOD 520>,
 792                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 793                                  <&scif_clk>;
 794                         clock-names = "fck", "brg_int", "scif_clk";
 795                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 796                                <&dmac2 0x31>, <&dmac2 0x30>;
 797                         dma-names = "tx", "rx", "tx", "rx";
 798                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 799                         resets = <&cpg 520>;
 800                         status = "disabled";
 801                 };
 802
 803                 hscif1: serial@e6550000 {
 804                         compatible = "renesas,hscif-r8a7796",
 805                                      "renesas,rcar-gen3-hscif",
 806                                      "renesas,hscif";
 807                         reg = <0 0xe6550000 0 0x60>;
 808                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 809                         clocks = <&cpg CPG_MOD 519>,
 810                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 811                                  <&scif_clk>;
 812                         clock-names = "fck", "brg_int", "scif_clk";
 813                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 814                                <&dmac2 0x33>, <&dmac2 0x32>;
 815                         dma-names = "tx", "rx", "tx", "rx";
 816                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 817                         resets = <&cpg 519>;
 818                         status = "disabled";
 819                 };
 820
 821                 hscif2: serial@e6560000 {
 822                         compatible = "renesas,hscif-r8a7796",
 823                                      "renesas,rcar-gen3-hscif",
 824                                      "renesas,hscif";
 825                         reg = <0 0xe6560000 0 0x60>;
 826                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 827                         clocks = <&cpg CPG_MOD 518>,
 828                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 829                                  <&scif_clk>;
 830                         clock-names = "fck", "brg_int", "scif_clk";
 831                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 832                                <&dmac2 0x35>, <&dmac2 0x34>;
 833                         dma-names = "tx", "rx", "tx", "rx";
 834                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 835                         resets = <&cpg 518>;
 836                         status = "disabled";
 837                 };
 838
 839                 hscif3: serial@e66a0000 {
 840                         compatible = "renesas,hscif-r8a7796",
 841                                      "renesas,rcar-gen3-hscif",
 842                                      "renesas,hscif";
 843                         reg = <0 0xe66a0000 0 0x60>;
 844                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 845                         clocks = <&cpg CPG_MOD 517>,
 846                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 847                                  <&scif_clk>;
 848                         clock-names = "fck", "brg_int", "scif_clk";
 849                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 850                         dma-names = "tx", "rx";
 851                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 852                         resets = <&cpg 517>;
 853                         status = "disabled";
 854                 };
 855
 856                 hscif4: serial@e66b0000 {
 857                         compatible = "renesas,hscif-r8a7796",
 858                                      "renesas,rcar-gen3-hscif",
 859                                      "renesas,hscif";
 860                         reg = <0 0xe66b0000 0 0x60>;
 861                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 862                         clocks = <&cpg CPG_MOD 516>,
 863                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 864                                  <&scif_clk>;
 865                         clock-names = "fck", "brg_int", "scif_clk";
 866                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 867                         dma-names = "tx", "rx";
 868                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 869                         resets = <&cpg 516>;
 870                         status = "disabled";
 871                 };
 872
 873                 hsusb: usb@e6590000 {
 874                         compatible = "renesas,usbhs-r8a7796",
 875                                      "renesas,rcar-gen3-usbhs";
 876                         reg = <0 0xe6590000 0 0x200>;
 877                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 878                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 879                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 880                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 881                         dma-names = "ch0", "ch1", "ch2", "ch3";
 882                         renesas,buswait = <11>;
 883                         phys = <&usb2_phy0 3>;
 884                         phy-names = "usb";
 885                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 886                         resets = <&cpg 704>, <&cpg 703>;
 887                         status = "disabled";
 888                 };
 889
 890                 usb_dmac0: dma-controller@e65a0000 {
 891                         compatible = "renesas,r8a7796-usb-dmac",
 892                                      "renesas,usb-dmac";
 893                         reg = <0 0xe65a0000 0 0x100>;
 894                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 895                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 896                         interrupt-names = "ch0", "ch1";
 897                         clocks = <&cpg CPG_MOD 330>;
 898                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 899                         resets = <&cpg 330>;
 900                         #dma-cells = <1>;
 901                         dma-channels = <2>;
 902                 };
 903
 904                 usb_dmac1: dma-controller@e65b0000 {
 905                         compatible = "renesas,r8a7796-usb-dmac",
 906                                      "renesas,usb-dmac";
 907                         reg = <0 0xe65b0000 0 0x100>;
 908                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 909                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 910                         interrupt-names = "ch0", "ch1";
 911                         clocks = <&cpg CPG_MOD 331>;
 912                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 913                         resets = <&cpg 331>;
 914                         #dma-cells = <1>;
 915                         dma-channels = <2>;
 916                 };
 917
 918                 usb3_phy0: usb-phy@e65ee000 {
 919                         compatible = "renesas,r8a7796-usb3-phy",
 920                                      "renesas,rcar-gen3-usb3-phy";
 921                         reg = <0 0xe65ee000 0 0x90>;
 922                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 923                                  <&usb_extal_clk>;
 924                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 925                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 926                         resets = <&cpg 328>;
 927                         #phy-cells = <0>;
 928                         status = "disabled";
 929                 };
 930
 931                 arm_cc630p: crypto@e6601000 {
 932                         compatible = "arm,cryptocell-630p-ree";
 933                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 934                         reg = <0x0 0xe6601000 0 0x1000>;
 935                         clocks = <&cpg CPG_MOD 229>;
 936                         resets = <&cpg 229>;
 937                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 938                 };
 939
 940                 dmac0: dma-controller@e6700000 {
 941                         compatible = "renesas,dmac-r8a7796",
 942                                      "renesas,rcar-dmac";
 943                         reg = <0 0xe6700000 0 0x10000>;
 944                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 950                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 951                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 952                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 953                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 954                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 961                         interrupt-names = "error",
 962                                         "ch0", "ch1", "ch2", "ch3",
 963                                         "ch4", "ch5", "ch6", "ch7",
 964                                         "ch8", "ch9", "ch10", "ch11",
 965                                         "ch12", "ch13", "ch14", "ch15";
 966                         clocks = <&cpg CPG_MOD 219>;
 967                         clock-names = "fck";
 968                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 969                         resets = <&cpg 219>;
 970                         #dma-cells = <1>;
 971                         dma-channels = <16>;
 972                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 973                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 974                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 975                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 976                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 977                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 978                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 979                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 980                 };
 981
 982                 dmac1: dma-controller@e7300000 {
 983                         compatible = "renesas,dmac-r8a7796",
 984                                      "renesas,rcar-dmac";
 985                         reg = <0 0xe7300000 0 0x10000>;
 986                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 993                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 994                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 995                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 996                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 997                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 998                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 999                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1000                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1001                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1002                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1003                         interrupt-names = "error",
1004                                         "ch0", "ch1", "ch2", "ch3",
1005                                         "ch4", "ch5", "ch6", "ch7",
1006                                         "ch8", "ch9", "ch10", "ch11",
1007                                         "ch12", "ch13", "ch14", "ch15";
1008                         clocks = <&cpg CPG_MOD 218>;
1009                         clock-names = "fck";
1010                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1011                         resets = <&cpg 218>;
1012                         #dma-cells = <1>;
1013                         dma-channels = <16>;
1014                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1015                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1016                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1017                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1018                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1019                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1020                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1021                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1022                 };
1023
1024                 dmac2: dma-controller@e7310000 {
1025                         compatible = "renesas,dmac-r8a7796",
1026                                      "renesas,rcar-dmac";
1027                         reg = <0 0xe7310000 0 0x10000>;
1028                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1029                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1030                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1031                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1032                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1033                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1034                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1035                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1036                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1037                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1038                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1039                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1040                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1041                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1042                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1043                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1044                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1045                         interrupt-names = "error",
1046                                         "ch0", "ch1", "ch2", "ch3",
1047                                         "ch4", "ch5", "ch6", "ch7",
1048                                         "ch8", "ch9", "ch10", "ch11",
1049                                         "ch12", "ch13", "ch14", "ch15";
1050                         clocks = <&cpg CPG_MOD 217>;
1051                         clock-names = "fck";
1052                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1053                         resets = <&cpg 217>;
1054                         #dma-cells = <1>;
1055                         dma-channels = <16>;
1056                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1057                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1058                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1059                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1060                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1061                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1062                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1063                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1064                 };
1065
1066                 ipmmu_ds0: iommu@e6740000 {
1067                         compatible = "renesas,ipmmu-r8a7796";
1068                         reg = <0 0xe6740000 0 0x1000>;
1069                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1070                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1071                         #iommu-cells = <1>;
1072                 };
1073
1074                 ipmmu_ds1: iommu@e7740000 {
1075                         compatible = "renesas,ipmmu-r8a7796";
1076                         reg = <0 0xe7740000 0 0x1000>;
1077                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1078                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1079                         #iommu-cells = <1>;
1080                 };
1081
1082                 ipmmu_hc: iommu@e6570000 {
1083                         compatible = "renesas,ipmmu-r8a7796";
1084                         reg = <0 0xe6570000 0 0x1000>;
1085                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1086                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1087                         #iommu-cells = <1>;
1088                 };
1089
1090                 ipmmu_ir: iommu@ff8b0000 {
1091                         compatible = "renesas,ipmmu-r8a7796";
1092                         reg = <0 0xff8b0000 0 0x1000>;
1093                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1094                         power-domains = <&sysc R8A7796_PD_A3IR>;
1095                         #iommu-cells = <1>;
1096                 };
1097
1098                 ipmmu_mm: iommu@e67b0000 {
1099                         compatible = "renesas,ipmmu-r8a7796";
1100                         reg = <0 0xe67b0000 0 0x1000>;
1101                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1102                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1103                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1104                         #iommu-cells = <1>;
1105                 };
1106
1107                 ipmmu_mp: iommu@ec670000 {
1108                         compatible = "renesas,ipmmu-r8a7796";
1109                         reg = <0 0xec670000 0 0x1000>;
1110                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1111                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1112                         #iommu-cells = <1>;
1113                 };
1114
1115                 ipmmu_pv0: iommu@fd800000 {
1116                         compatible = "renesas,ipmmu-r8a7796";
1117                         reg = <0 0xfd800000 0 0x1000>;
1118                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1119                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1120                         #iommu-cells = <1>;
1121                 };
1122
1123                 ipmmu_pv1: iommu@fd950000 {
1124                         compatible = "renesas,ipmmu-r8a7796";
1125                         reg = <0 0xfd950000 0 0x1000>;
1126                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1127                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1128                         #iommu-cells = <1>;
1129                 };
1130
1131                 ipmmu_rt: iommu@ffc80000 {
1132                         compatible = "renesas,ipmmu-r8a7796";
1133                         reg = <0 0xffc80000 0 0x1000>;
1134                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1135                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1136                         #iommu-cells = <1>;
1137                 };
1138
1139                 ipmmu_vc0: iommu@fe6b0000 {
1140                         compatible = "renesas,ipmmu-r8a7796";
1141                         reg = <0 0xfe6b0000 0 0x1000>;
1142                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1143                         power-domains = <&sysc R8A7796_PD_A3VC>;
1144                         #iommu-cells = <1>;
1145                 };
1146
1147                 ipmmu_vi0: iommu@febd0000 {
1148                         compatible = "renesas,ipmmu-r8a7796";
1149                         reg = <0 0xfebd0000 0 0x1000>;
1150                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1151                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1152                         #iommu-cells = <1>;
1153                 };
1154
1155                 avb: ethernet@e6800000 {
1156                         compatible = "renesas,etheravb-r8a7796",
1157                                      "renesas,etheravb-rcar-gen3";
1158                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1159                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1160                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1161                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1162                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1163                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1164                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1165                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1166                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1167                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1168                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1169                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1170                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1171                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1172                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1173                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1174                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1175                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1176                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1177                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1178                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1179                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1180                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1181                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1182                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1183                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1184                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1185                                           "ch4", "ch5", "ch6", "ch7",
1186                                           "ch8", "ch9", "ch10", "ch11",
1187                                           "ch12", "ch13", "ch14", "ch15",
1188                                           "ch16", "ch17", "ch18", "ch19",
1189                                           "ch20", "ch21", "ch22", "ch23",
1190                                           "ch24";
1191                         clocks = <&cpg CPG_MOD 812>;
1192                         clock-names = "fck";
1193                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1194                         resets = <&cpg 812>;
1195                         phy-mode = "rgmii";
1196                         rx-internal-delay-ps = <0>;
1197                         tx-internal-delay-ps = <0>;
1198                         iommus = <&ipmmu_ds0 16>;
1199                         #address-cells = <1>;
1200                         #size-cells = <0>;
1201                         status = "disabled";
1202                 };
1203
1204                 can0: can@e6c30000 {
1205                         compatible = "renesas,can-r8a7796",
1206                                      "renesas,rcar-gen3-can";
1207                         reg = <0 0xe6c30000 0 0x1000>;
1208                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1209                         clocks = <&cpg CPG_MOD 916>,
1210                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1211                                <&can_clk>;
1212                         clock-names = "clkp1", "clkp2", "can_clk";
1213                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1214                         assigned-clock-rates = <40000000>;
1215                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1216                         resets = <&cpg 916>;
1217                         status = "disabled";
1218                 };
1219
1220                 can1: can@e6c38000 {
1221                         compatible = "renesas,can-r8a7796",
1222                                      "renesas,rcar-gen3-can";
1223                         reg = <0 0xe6c38000 0 0x1000>;
1224                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1225                         clocks = <&cpg CPG_MOD 915>,
1226                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1227                                <&can_clk>;
1228                         clock-names = "clkp1", "clkp2", "can_clk";
1229                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1230                         assigned-clock-rates = <40000000>;
1231                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1232                         resets = <&cpg 915>;
1233                         status = "disabled";
1234                 };
1235
1236                 canfd: can@e66c0000 {
1237                         compatible = "renesas,r8a7796-canfd",
1238                                      "renesas,rcar-gen3-canfd";
1239                         reg = <0 0xe66c0000 0 0x8000>;
1240                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1241                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1242                         clocks = <&cpg CPG_MOD 914>,
1243                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1244                                <&can_clk>;
1245                         clock-names = "fck", "canfd", "can_clk";
1246                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1247                         assigned-clock-rates = <40000000>;
1248                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1249                         resets = <&cpg 914>;
1250                         status = "disabled";
1251
1252                         channel0 {
1253                                 status = "disabled";
1254                         };
1255
1256                         channel1 {
1257                                 status = "disabled";
1258                         };
1259                 };
1260
1261                 pwm0: pwm@e6e30000 {
1262                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1263                         reg = <0 0xe6e30000 0 8>;
1264                         #pwm-cells = <2>;
1265                         clocks = <&cpg CPG_MOD 523>;
1266                         resets = <&cpg 523>;
1267                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1268                         status = "disabled";
1269                 };
1270
1271                 pwm1: pwm@e6e31000 {
1272                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1273                         reg = <0 0xe6e31000 0 8>;
1274                         #pwm-cells = <2>;
1275                         clocks = <&cpg CPG_MOD 523>;
1276                         resets = <&cpg 523>;
1277                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1278                         status = "disabled";
1279                 };
1280
1281                 pwm2: pwm@e6e32000 {
1282                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1283                         reg = <0 0xe6e32000 0 8>;
1284                         #pwm-cells = <2>;
1285                         clocks = <&cpg CPG_MOD 523>;
1286                         resets = <&cpg 523>;
1287                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1288                         status = "disabled";
1289                 };
1290
1291                 pwm3: pwm@e6e33000 {
1292                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1293                         reg = <0 0xe6e33000 0 8>;
1294                         #pwm-cells = <2>;
1295                         clocks = <&cpg CPG_MOD 523>;
1296                         resets = <&cpg 523>;
1297                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1298                         status = "disabled";
1299                 };
1300
1301                 pwm4: pwm@e6e34000 {
1302                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1303                         reg = <0 0xe6e34000 0 8>;
1304                         #pwm-cells = <2>;
1305                         clocks = <&cpg CPG_MOD 523>;
1306                         resets = <&cpg 523>;
1307                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1308                         status = "disabled";
1309                 };
1310
1311                 pwm5: pwm@e6e35000 {
1312                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1313                         reg = <0 0xe6e35000 0 8>;
1314                         #pwm-cells = <2>;
1315                         clocks = <&cpg CPG_MOD 523>;
1316                         resets = <&cpg 523>;
1317                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1318                         status = "disabled";
1319                 };
1320
1321                 pwm6: pwm@e6e36000 {
1322                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1323                         reg = <0 0xe6e36000 0 8>;
1324                         #pwm-cells = <2>;
1325                         clocks = <&cpg CPG_MOD 523>;
1326                         resets = <&cpg 523>;
1327                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1328                         status = "disabled";
1329                 };
1330
1331                 scif0: serial@e6e60000 {
1332                         compatible = "renesas,scif-r8a7796",
1333                                      "renesas,rcar-gen3-scif", "renesas,scif";
1334                         reg = <0 0xe6e60000 0 64>;
1335                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1336                         clocks = <&cpg CPG_MOD 207>,
1337                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1338                                  <&scif_clk>;
1339                         clock-names = "fck", "brg_int", "scif_clk";
1340                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1341                                <&dmac2 0x51>, <&dmac2 0x50>;
1342                         dma-names = "tx", "rx", "tx", "rx";
1343                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1344                         resets = <&cpg 207>;
1345                         status = "disabled";
1346                 };
1347
1348                 scif1: serial@e6e68000 {
1349                         compatible = "renesas,scif-r8a7796",
1350                                      "renesas,rcar-gen3-scif", "renesas,scif";
1351                         reg = <0 0xe6e68000 0 64>;
1352                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1353                         clocks = <&cpg CPG_MOD 206>,
1354                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1355                                  <&scif_clk>;
1356                         clock-names = "fck", "brg_int", "scif_clk";
1357                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1358                                <&dmac2 0x53>, <&dmac2 0x52>;
1359                         dma-names = "tx", "rx", "tx", "rx";
1360                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1361                         resets = <&cpg 206>;
1362                         status = "disabled";
1363                 };
1364
1365                 scif2: serial@e6e88000 {
1366                         compatible = "renesas,scif-r8a7796",
1367                                      "renesas,rcar-gen3-scif", "renesas,scif";
1368                         reg = <0 0xe6e88000 0 64>;
1369                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1370                         clocks = <&cpg CPG_MOD 310>,
1371                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1372                                  <&scif_clk>;
1373                         clock-names = "fck", "brg_int", "scif_clk";
1374                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1375                                <&dmac2 0x13>, <&dmac2 0x12>;
1376                         dma-names = "tx", "rx", "tx", "rx";
1377                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1378                         resets = <&cpg 310>;
1379                         status = "disabled";
1380                 };
1381
1382                 scif3: serial@e6c50000 {
1383                         compatible = "renesas,scif-r8a7796",
1384                                      "renesas,rcar-gen3-scif", "renesas,scif";
1385                         reg = <0 0xe6c50000 0 64>;
1386                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1387                         clocks = <&cpg CPG_MOD 204>,
1388                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1389                                  <&scif_clk>;
1390                         clock-names = "fck", "brg_int", "scif_clk";
1391                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1392                         dma-names = "tx", "rx";
1393                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1394                         resets = <&cpg 204>;
1395                         status = "disabled";
1396                 };
1397
1398                 scif4: serial@e6c40000 {
1399                         compatible = "renesas,scif-r8a7796",
1400                                      "renesas,rcar-gen3-scif", "renesas,scif";
1401                         reg = <0 0xe6c40000 0 64>;
1402                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1403                         clocks = <&cpg CPG_MOD 203>,
1404                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1405                                  <&scif_clk>;
1406                         clock-names = "fck", "brg_int", "scif_clk";
1407                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1408                         dma-names = "tx", "rx";
1409                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1410                         resets = <&cpg 203>;
1411                         status = "disabled";
1412                 };
1413
1414                 scif5: serial@e6f30000 {
1415                         compatible = "renesas,scif-r8a7796",
1416                                      "renesas,rcar-gen3-scif", "renesas,scif";
1417                         reg = <0 0xe6f30000 0 64>;
1418                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1419                         clocks = <&cpg CPG_MOD 202>,
1420                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1421                                  <&scif_clk>;
1422                         clock-names = "fck", "brg_int", "scif_clk";
1423                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1424                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1425                         dma-names = "tx", "rx", "tx", "rx";
1426                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1427                         resets = <&cpg 202>;
1428                         status = "disabled";
1429                 };
1430
1431                 tpu: pwm@e6e80000 {
1432                         compatible = "renesas,tpu-r8a7796", "renesas,tpu";
1433                         reg = <0 0xe6e80000 0 0x148>;
1434                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1435                         clocks = <&cpg CPG_MOD 304>;
1436                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1437                         resets = <&cpg 304>;
1438                         #pwm-cells = <3>;
1439                         status = "disabled";
1440                 };
1441
1442                 msiof0: spi@e6e90000 {
1443                         compatible = "renesas,msiof-r8a7796",
1444                                      "renesas,rcar-gen3-msiof";
1445                         reg = <0 0xe6e90000 0 0x0064>;
1446                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1447                         clocks = <&cpg CPG_MOD 211>;
1448                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1449                                <&dmac2 0x41>, <&dmac2 0x40>;
1450                         dma-names = "tx", "rx", "tx", "rx";
1451                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1452                         resets = <&cpg 211>;
1453                         #address-cells = <1>;
1454                         #size-cells = <0>;
1455                         status = "disabled";
1456                 };
1457
1458                 msiof1: spi@e6ea0000 {
1459                         compatible = "renesas,msiof-r8a7796",
1460                                      "renesas,rcar-gen3-msiof";
1461                         reg = <0 0xe6ea0000 0 0x0064>;
1462                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1463                         clocks = <&cpg CPG_MOD 210>;
1464                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1465                                <&dmac2 0x43>, <&dmac2 0x42>;
1466                         dma-names = "tx", "rx", "tx", "rx";
1467                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1468                         resets = <&cpg 210>;
1469                         #address-cells = <1>;
1470                         #size-cells = <0>;
1471                         status = "disabled";
1472                 };
1473
1474                 msiof2: spi@e6c00000 {
1475                         compatible = "renesas,msiof-r8a7796",
1476                                      "renesas,rcar-gen3-msiof";
1477                         reg = <0 0xe6c00000 0 0x0064>;
1478                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1479                         clocks = <&cpg CPG_MOD 209>;
1480                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1481                         dma-names = "tx", "rx";
1482                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1483                         resets = <&cpg 209>;
1484                         #address-cells = <1>;
1485                         #size-cells = <0>;
1486                         status = "disabled";
1487                 };
1488
1489                 msiof3: spi@e6c10000 {
1490                         compatible = "renesas,msiof-r8a7796",
1491                                      "renesas,rcar-gen3-msiof";
1492                         reg = <0 0xe6c10000 0 0x0064>;
1493                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1494                         clocks = <&cpg CPG_MOD 208>;
1495                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1496                         dma-names = "tx", "rx";
1497                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1498                         resets = <&cpg 208>;
1499                         #address-cells = <1>;
1500                         #size-cells = <0>;
1501                         status = "disabled";
1502                 };
1503
1504                 vin0: video@e6ef0000 {
1505                         compatible = "renesas,vin-r8a7796";
1506                         reg = <0 0xe6ef0000 0 0x1000>;
1507                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1508                         clocks = <&cpg CPG_MOD 811>;
1509                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1510                         resets = <&cpg 811>;
1511                         renesas,id = <0>;
1512                         status = "disabled";
1513
1514                         ports {
1515                                 #address-cells = <1>;
1516                                 #size-cells = <0>;
1517
1518                                 port@1 {
1519                                         #address-cells = <1>;
1520                                         #size-cells = <0>;
1521
1522                                         reg = <1>;
1523
1524                                         vin0csi20: endpoint@0 {
1525                                                 reg = <0>;
1526                                                 remote-endpoint = <&csi20vin0>;
1527                                         };
1528                                         vin0csi40: endpoint@2 {
1529                                                 reg = <2>;
1530                                                 remote-endpoint = <&csi40vin0>;
1531                                         };
1532                                 };
1533                         };
1534                 };
1535
1536                 vin1: video@e6ef1000 {
1537                         compatible = "renesas,vin-r8a7796";
1538                         reg = <0 0xe6ef1000 0 0x1000>;
1539                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1540                         clocks = <&cpg CPG_MOD 810>;
1541                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1542                         resets = <&cpg 810>;
1543                         renesas,id = <1>;
1544                         status = "disabled";
1545
1546                         ports {
1547                                 #address-cells = <1>;
1548                                 #size-cells = <0>;
1549
1550                                 port@1 {
1551                                         #address-cells = <1>;
1552                                         #size-cells = <0>;
1553
1554                                         reg = <1>;
1555
1556                                         vin1csi20: endpoint@0 {
1557                                                 reg = <0>;
1558                                                 remote-endpoint = <&csi20vin1>;
1559                                         };
1560                                         vin1csi40: endpoint@2 {
1561                                                 reg = <2>;
1562                                                 remote-endpoint = <&csi40vin1>;
1563                                         };
1564                                 };
1565                         };
1566                 };
1567
1568                 vin2: video@e6ef2000 {
1569                         compatible = "renesas,vin-r8a7796";
1570                         reg = <0 0xe6ef2000 0 0x1000>;
1571                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1572                         clocks = <&cpg CPG_MOD 809>;
1573                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1574                         resets = <&cpg 809>;
1575                         renesas,id = <2>;
1576                         status = "disabled";
1577
1578                         ports {
1579                                 #address-cells = <1>;
1580                                 #size-cells = <0>;
1581
1582                                 port@1 {
1583                                         #address-cells = <1>;
1584                                         #size-cells = <0>;
1585
1586                                         reg = <1>;
1587
1588                                         vin2csi20: endpoint@0 {
1589                                                 reg = <0>;
1590                                                 remote-endpoint = <&csi20vin2>;
1591                                         };
1592                                         vin2csi40: endpoint@2 {
1593                                                 reg = <2>;
1594                                                 remote-endpoint = <&csi40vin2>;
1595                                         };
1596                                 };
1597                         };
1598                 };
1599
1600                 vin3: video@e6ef3000 {
1601                         compatible = "renesas,vin-r8a7796";
1602                         reg = <0 0xe6ef3000 0 0x1000>;
1603                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1604                         clocks = <&cpg CPG_MOD 808>;
1605                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1606                         resets = <&cpg 808>;
1607                         renesas,id = <3>;
1608                         status = "disabled";
1609
1610                         ports {
1611                                 #address-cells = <1>;
1612                                 #size-cells = <0>;
1613
1614                                 port@1 {
1615                                         #address-cells = <1>;
1616                                         #size-cells = <0>;
1617
1618                                         reg = <1>;
1619
1620                                         vin3csi20: endpoint@0 {
1621                                                 reg = <0>;
1622                                                 remote-endpoint = <&csi20vin3>;
1623                                         };
1624                                         vin3csi40: endpoint@2 {
1625                                                 reg = <2>;
1626                                                 remote-endpoint = <&csi40vin3>;
1627                                         };
1628                                 };
1629                         };
1630                 };
1631
1632                 vin4: video@e6ef4000 {
1633                         compatible = "renesas,vin-r8a7796";
1634                         reg = <0 0xe6ef4000 0 0x1000>;
1635                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1636                         clocks = <&cpg CPG_MOD 807>;
1637                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1638                         resets = <&cpg 807>;
1639                         renesas,id = <4>;
1640                         status = "disabled";
1641
1642                         ports {
1643                                 #address-cells = <1>;
1644                                 #size-cells = <0>;
1645
1646                                 port@1 {
1647                                         #address-cells = <1>;
1648                                         #size-cells = <0>;
1649
1650                                         reg = <1>;
1651
1652                                         vin4csi20: endpoint@0 {
1653                                                 reg = <0>;
1654                                                 remote-endpoint = <&csi20vin4>;
1655                                         };
1656                                         vin4csi40: endpoint@2 {
1657                                                 reg = <2>;
1658                                                 remote-endpoint = <&csi40vin4>;
1659                                         };
1660                                 };
1661                         };
1662                 };
1663
1664                 vin5: video@e6ef5000 {
1665                         compatible = "renesas,vin-r8a7796";
1666                         reg = <0 0xe6ef5000 0 0x1000>;
1667                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1668                         clocks = <&cpg CPG_MOD 806>;
1669                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1670                         resets = <&cpg 806>;
1671                         renesas,id = <5>;
1672                         status = "disabled";
1673
1674                         ports {
1675                                 #address-cells = <1>;
1676                                 #size-cells = <0>;
1677
1678                                 port@1 {
1679                                         #address-cells = <1>;
1680                                         #size-cells = <0>;
1681
1682                                         reg = <1>;
1683
1684                                         vin5csi20: endpoint@0 {
1685                                                 reg = <0>;
1686                                                 remote-endpoint = <&csi20vin5>;
1687                                         };
1688                                         vin5csi40: endpoint@2 {
1689                                                 reg = <2>;
1690                                                 remote-endpoint = <&csi40vin5>;
1691                                         };
1692                                 };
1693                         };
1694                 };
1695
1696                 vin6: video@e6ef6000 {
1697                         compatible = "renesas,vin-r8a7796";
1698                         reg = <0 0xe6ef6000 0 0x1000>;
1699                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1700                         clocks = <&cpg CPG_MOD 805>;
1701                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1702                         resets = <&cpg 805>;
1703                         renesas,id = <6>;
1704                         status = "disabled";
1705
1706                         ports {
1707                                 #address-cells = <1>;
1708                                 #size-cells = <0>;
1709
1710                                 port@1 {
1711                                         #address-cells = <1>;
1712                                         #size-cells = <0>;
1713
1714                                         reg = <1>;
1715
1716                                         vin6csi20: endpoint@0 {
1717                                                 reg = <0>;
1718                                                 remote-endpoint = <&csi20vin6>;
1719                                         };
1720                                         vin6csi40: endpoint@2 {
1721                                                 reg = <2>;
1722                                                 remote-endpoint = <&csi40vin6>;
1723                                         };
1724                                 };
1725                         };
1726                 };
1727
1728                 vin7: video@e6ef7000 {
1729                         compatible = "renesas,vin-r8a7796";
1730                         reg = <0 0xe6ef7000 0 0x1000>;
1731                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1732                         clocks = <&cpg CPG_MOD 804>;
1733                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1734                         resets = <&cpg 804>;
1735                         renesas,id = <7>;
1736                         status = "disabled";
1737
1738                         ports {
1739                                 #address-cells = <1>;
1740                                 #size-cells = <0>;
1741
1742                                 port@1 {
1743                                         #address-cells = <1>;
1744                                         #size-cells = <0>;
1745
1746                                         reg = <1>;
1747
1748                                         vin7csi20: endpoint@0 {
1749                                                 reg = <0>;
1750                                                 remote-endpoint = <&csi20vin7>;
1751                                         };
1752                                         vin7csi40: endpoint@2 {
1753                                                 reg = <2>;
1754                                                 remote-endpoint = <&csi40vin7>;
1755                                         };
1756                                 };
1757                         };
1758                 };
1759
1760                 drif00: rif@e6f40000 {
1761                         compatible = "renesas,r8a7796-drif",
1762                                      "renesas,rcar-gen3-drif";
1763                         reg = <0 0xe6f40000 0 0x64>;
1764                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1765                         clocks = <&cpg CPG_MOD 515>;
1766                         clock-names = "fck";
1767                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1768                         dma-names = "rx", "rx";
1769                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1770                         resets = <&cpg 515>;
1771                         renesas,bonding = <&drif01>;
1772                         status = "disabled";
1773                 };
1774
1775                 drif01: rif@e6f50000 {
1776                         compatible = "renesas,r8a7796-drif",
1777                                      "renesas,rcar-gen3-drif";
1778                         reg = <0 0xe6f50000 0 0x64>;
1779                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1780                         clocks = <&cpg CPG_MOD 514>;
1781                         clock-names = "fck";
1782                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1783                         dma-names = "rx", "rx";
1784                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1785                         resets = <&cpg 514>;
1786                         renesas,bonding = <&drif00>;
1787                         status = "disabled";
1788                 };
1789
1790                 drif10: rif@e6f60000 {
1791                         compatible = "renesas,r8a7796-drif",
1792                                      "renesas,rcar-gen3-drif";
1793                         reg = <0 0xe6f60000 0 0x64>;
1794                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1795                         clocks = <&cpg CPG_MOD 513>;
1796                         clock-names = "fck";
1797                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1798                         dma-names = "rx", "rx";
1799                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1800                         resets = <&cpg 513>;
1801                         renesas,bonding = <&drif11>;
1802                         status = "disabled";
1803                 };
1804
1805                 drif11: rif@e6f70000 {
1806                         compatible = "renesas,r8a7796-drif",
1807                                      "renesas,rcar-gen3-drif";
1808                         reg = <0 0xe6f70000 0 0x64>;
1809                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1810                         clocks = <&cpg CPG_MOD 512>;
1811                         clock-names = "fck";
1812                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1813                         dma-names = "rx", "rx";
1814                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1815                         resets = <&cpg 512>;
1816                         renesas,bonding = <&drif10>;
1817                         status = "disabled";
1818                 };
1819
1820                 drif20: rif@e6f80000 {
1821                         compatible = "renesas,r8a7796-drif",
1822                                      "renesas,rcar-gen3-drif";
1823                         reg = <0 0xe6f80000 0 0x64>;
1824                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1825                         clocks = <&cpg CPG_MOD 511>;
1826                         clock-names = "fck";
1827                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1828                         dma-names = "rx", "rx";
1829                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1830                         resets = <&cpg 511>;
1831                         renesas,bonding = <&drif21>;
1832                         status = "disabled";
1833                 };
1834
1835                 drif21: rif@e6f90000 {
1836                         compatible = "renesas,r8a7796-drif",
1837                                      "renesas,rcar-gen3-drif";
1838                         reg = <0 0xe6f90000 0 0x64>;
1839                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1840                         clocks = <&cpg CPG_MOD 510>;
1841                         clock-names = "fck";
1842                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1843                         dma-names = "rx", "rx";
1844                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1845                         resets = <&cpg 510>;
1846                         renesas,bonding = <&drif20>;
1847                         status = "disabled";
1848                 };
1849
1850                 drif30: rif@e6fa0000 {
1851                         compatible = "renesas,r8a7796-drif",
1852                                      "renesas,rcar-gen3-drif";
1853                         reg = <0 0xe6fa0000 0 0x64>;
1854                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1855                         clocks = <&cpg CPG_MOD 509>;
1856                         clock-names = "fck";
1857                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1858                         dma-names = "rx", "rx";
1859                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1860                         resets = <&cpg 509>;
1861                         renesas,bonding = <&drif31>;
1862                         status = "disabled";
1863                 };
1864
1865                 drif31: rif@e6fb0000 {
1866                         compatible = "renesas,r8a7796-drif",
1867                                      "renesas,rcar-gen3-drif";
1868                         reg = <0 0xe6fb0000 0 0x64>;
1869                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1870                         clocks = <&cpg CPG_MOD 508>;
1871                         clock-names = "fck";
1872                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1873                         dma-names = "rx", "rx";
1874                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1875                         resets = <&cpg 508>;
1876                         renesas,bonding = <&drif30>;
1877                         status = "disabled";
1878                 };
1879
1880                 rcar_sound: sound@ec500000 {
1881                         /*
1882                          * #sound-dai-cells is required
1883                          *
1884                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1885                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1886                          */
1887                         /*
1888                          * #clock-cells is required for audio_clkout0/1/2/3
1889                          *
1890                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1891                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1892                          */
1893                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1894                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1895                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1896                                 <0 0xec540000 0 0x1000>, /* SSIU */
1897                                 <0 0xec541000 0 0x280>,  /* SSI */
1898                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1899                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1900
1901                         clocks = <&cpg CPG_MOD 1005>,
1902                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1903                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1904                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1905                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1906                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1907                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1908                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1909                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1910                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1911                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1912                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1913                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1914                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1915                                  <&audio_clk_a>, <&audio_clk_b>,
1916                                  <&audio_clk_c>,
1917                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1918                         clock-names = "ssi-all",
1919                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1920                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1921                                       "ssi.1", "ssi.0",
1922                                       "src.9", "src.8", "src.7", "src.6",
1923                                       "src.5", "src.4", "src.3", "src.2",
1924                                       "src.1", "src.0",
1925                                       "mix.1", "mix.0",
1926                                       "ctu.1", "ctu.0",
1927                                       "dvc.0", "dvc.1",
1928                                       "clk_a", "clk_b", "clk_c", "clk_i";
1929                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1930                         resets = <&cpg 1005>,
1931                                  <&cpg 1006>, <&cpg 1007>,
1932                                  <&cpg 1008>, <&cpg 1009>,
1933                                  <&cpg 1010>, <&cpg 1011>,
1934                                  <&cpg 1012>, <&cpg 1013>,
1935                                  <&cpg 1014>, <&cpg 1015>;
1936                         reset-names = "ssi-all",
1937                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1938                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1939                                       "ssi.1", "ssi.0";
1940                         status = "disabled";
1941
1942                         rcar_sound,ctu {
1943                                 ctu00: ctu-0 { };
1944                                 ctu01: ctu-1 { };
1945                                 ctu02: ctu-2 { };
1946                                 ctu03: ctu-3 { };
1947                                 ctu10: ctu-4 { };
1948                                 ctu11: ctu-5 { };
1949                                 ctu12: ctu-6 { };
1950                                 ctu13: ctu-7 { };
1951                         };
1952
1953                         rcar_sound,dvc {
1954                                 dvc0: dvc-0 {
1955                                         dmas = <&audma1 0xbc>;
1956                                         dma-names = "tx";
1957                                 };
1958                                 dvc1: dvc-1 {
1959                                         dmas = <&audma1 0xbe>;
1960                                         dma-names = "tx";
1961                                 };
1962                         };
1963
1964                         rcar_sound,mix {
1965                                 mix0: mix-0 { };
1966                                 mix1: mix-1 { };
1967                         };
1968
1969                         rcar_sound,src {
1970                                 src0: src-0 {
1971                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1972                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1973                                         dma-names = "rx", "tx";
1974                                 };
1975                                 src1: src-1 {
1976                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1977                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1978                                         dma-names = "rx", "tx";
1979                                 };
1980                                 src2: src-2 {
1981                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1982                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1983                                         dma-names = "rx", "tx";
1984                                 };
1985                                 src3: src-3 {
1986                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1987                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1988                                         dma-names = "rx", "tx";
1989                                 };
1990                                 src4: src-4 {
1991                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1992                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1993                                         dma-names = "rx", "tx";
1994                                 };
1995                                 src5: src-5 {
1996                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1997                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1998                                         dma-names = "rx", "tx";
1999                                 };
2000                                 src6: src-6 {
2001                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2002                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
2003                                         dma-names = "rx", "tx";
2004                                 };
2005                                 src7: src-7 {
2006                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2007                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
2008                                         dma-names = "rx", "tx";
2009                                 };
2010                                 src8: src-8 {
2011                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2012                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
2013                                         dma-names = "rx", "tx";
2014                                 };
2015                                 src9: src-9 {
2016                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2017                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
2018                                         dma-names = "rx", "tx";
2019                                 };
2020                         };
2021
2022                         rcar_sound,ssi {
2023                                 ssi0: ssi-0 {
2024                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2025                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2026                                         dma-names = "rx", "tx";
2027                                 };
2028                                 ssi1: ssi-1 {
2029                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2030                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2031                                         dma-names = "rx", "tx";
2032                                 };
2033                                 ssi2: ssi-2 {
2034                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2035                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2036                                         dma-names = "rx", "tx";
2037                                 };
2038                                 ssi3: ssi-3 {
2039                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2040                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2041                                         dma-names = "rx", "tx";
2042                                 };
2043                                 ssi4: ssi-4 {
2044                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2045                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2046                                         dma-names = "rx", "tx";
2047                                 };
2048                                 ssi5: ssi-5 {
2049                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2050                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2051                                         dma-names = "rx", "tx";
2052                                 };
2053                                 ssi6: ssi-6 {
2054                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2055                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2056                                         dma-names = "rx", "tx";
2057                                 };
2058                                 ssi7: ssi-7 {
2059                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2060                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2061                                         dma-names = "rx", "tx";
2062                                 };
2063                                 ssi8: ssi-8 {
2064                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2065                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2066                                         dma-names = "rx", "tx";
2067                                 };
2068                                 ssi9: ssi-9 {
2069                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2070                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2071                                         dma-names = "rx", "tx";
2072                                 };
2073                         };
2074
2075                         rcar_sound,ssiu {
2076                                 ssiu00: ssiu-0 {
2077                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
2078                                         dma-names = "rx", "tx";
2079                                 };
2080                                 ssiu01: ssiu-1 {
2081                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
2082                                         dma-names = "rx", "tx";
2083                                 };
2084                                 ssiu02: ssiu-2 {
2085                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
2086                                         dma-names = "rx", "tx";
2087                                 };
2088                                 ssiu03: ssiu-3 {
2089                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
2090                                         dma-names = "rx", "tx";
2091                                 };
2092                                 ssiu04: ssiu-4 {
2093                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
2094                                         dma-names = "rx", "tx";
2095                                 };
2096                                 ssiu05: ssiu-5 {
2097                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
2098                                         dma-names = "rx", "tx";
2099                                 };
2100                                 ssiu06: ssiu-6 {
2101                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
2102                                         dma-names = "rx", "tx";
2103                                 };
2104                                 ssiu07: ssiu-7 {
2105                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
2106                                         dma-names = "rx", "tx";
2107                                 };
2108                                 ssiu10: ssiu-8 {
2109                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
2110                                         dma-names = "rx", "tx";
2111                                 };
2112                                 ssiu11: ssiu-9 {
2113                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2114                                         dma-names = "rx", "tx";
2115                                 };
2116                                 ssiu12: ssiu-10 {
2117                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
2118                                         dma-names = "rx", "tx";
2119                                 };
2120                                 ssiu13: ssiu-11 {
2121                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
2122                                         dma-names = "rx", "tx";
2123                                 };
2124                                 ssiu14: ssiu-12 {
2125                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
2126                                         dma-names = "rx", "tx";
2127                                 };
2128                                 ssiu15: ssiu-13 {
2129                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2130                                         dma-names = "rx", "tx";
2131                                 };
2132                                 ssiu16: ssiu-14 {
2133                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2134                                         dma-names = "rx", "tx";
2135                                 };
2136                                 ssiu17: ssiu-15 {
2137                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2138                                         dma-names = "rx", "tx";
2139                                 };
2140                                 ssiu20: ssiu-16 {
2141                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2142                                         dma-names = "rx", "tx";
2143                                 };
2144                                 ssiu21: ssiu-17 {
2145                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2146                                         dma-names = "rx", "tx";
2147                                 };
2148                                 ssiu22: ssiu-18 {
2149                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2150                                         dma-names = "rx", "tx";
2151                                 };
2152                                 ssiu23: ssiu-19 {
2153                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2154                                         dma-names = "rx", "tx";
2155                                 };
2156                                 ssiu24: ssiu-20 {
2157                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2158                                         dma-names = "rx", "tx";
2159                                 };
2160                                 ssiu25: ssiu-21 {
2161                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2162                                         dma-names = "rx", "tx";
2163                                 };
2164                                 ssiu26: ssiu-22 {
2165                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2166                                         dma-names = "rx", "tx";
2167                                 };
2168                                 ssiu27: ssiu-23 {
2169                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2170                                         dma-names = "rx", "tx";
2171                                 };
2172                                 ssiu30: ssiu-24 {
2173                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2174                                         dma-names = "rx", "tx";
2175                                 };
2176                                 ssiu31: ssiu-25 {
2177                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2178                                         dma-names = "rx", "tx";
2179                                 };
2180                                 ssiu32: ssiu-26 {
2181                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2182                                         dma-names = "rx", "tx";
2183                                 };
2184                                 ssiu33: ssiu-27 {
2185                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2186                                         dma-names = "rx", "tx";
2187                                 };
2188                                 ssiu34: ssiu-28 {
2189                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2190                                         dma-names = "rx", "tx";
2191                                 };
2192                                 ssiu35: ssiu-29 {
2193                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2194                                         dma-names = "rx", "tx";
2195                                 };
2196                                 ssiu36: ssiu-30 {
2197                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2198                                         dma-names = "rx", "tx";
2199                                 };
2200                                 ssiu37: ssiu-31 {
2201                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2202                                         dma-names = "rx", "tx";
2203                                 };
2204                                 ssiu40: ssiu-32 {
2205                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
2206                                         dma-names = "rx", "tx";
2207                                 };
2208                                 ssiu41: ssiu-33 {
2209                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2210                                         dma-names = "rx", "tx";
2211                                 };
2212                                 ssiu42: ssiu-34 {
2213                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2214                                         dma-names = "rx", "tx";
2215                                 };
2216                                 ssiu43: ssiu-35 {
2217                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2218                                         dma-names = "rx", "tx";
2219                                 };
2220                                 ssiu44: ssiu-36 {
2221                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2222                                         dma-names = "rx", "tx";
2223                                 };
2224                                 ssiu45: ssiu-37 {
2225                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2226                                         dma-names = "rx", "tx";
2227                                 };
2228                                 ssiu46: ssiu-38 {
2229                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2230                                         dma-names = "rx", "tx";
2231                                 };
2232                                 ssiu47: ssiu-39 {
2233                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2234                                         dma-names = "rx", "tx";
2235                                 };
2236                                 ssiu50: ssiu-40 {
2237                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2238                                         dma-names = "rx", "tx";
2239                                 };
2240                                 ssiu60: ssiu-41 {
2241                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2242                                         dma-names = "rx", "tx";
2243                                 };
2244                                 ssiu70: ssiu-42 {
2245                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2246                                         dma-names = "rx", "tx";
2247                                 };
2248                                 ssiu80: ssiu-43 {
2249                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2250                                         dma-names = "rx", "tx";
2251                                 };
2252                                 ssiu90: ssiu-44 {
2253                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2254                                         dma-names = "rx", "tx";
2255                                 };
2256                                 ssiu91: ssiu-45 {
2257                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2258                                         dma-names = "rx", "tx";
2259                                 };
2260                                 ssiu92: ssiu-46 {
2261                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2262                                         dma-names = "rx", "tx";
2263                                 };
2264                                 ssiu93: ssiu-47 {
2265                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2266                                         dma-names = "rx", "tx";
2267                                 };
2268                                 ssiu94: ssiu-48 {
2269                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2270                                         dma-names = "rx", "tx";
2271                                 };
2272                                 ssiu95: ssiu-49 {
2273                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2274                                         dma-names = "rx", "tx";
2275                                 };
2276                                 ssiu96: ssiu-50 {
2277                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2278                                         dma-names = "rx", "tx";
2279                                 };
2280                                 ssiu97: ssiu-51 {
2281                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2282                                         dma-names = "rx", "tx";
2283                                 };
2284                         };
2285                 };
2286
2287                 audma0: dma-controller@ec700000 {
2288                         compatible = "renesas,dmac-r8a7796",
2289                                      "renesas,rcar-dmac";
2290                         reg = <0 0xec700000 0 0x10000>;
2291                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2292                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2293                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2294                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2295                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2296                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2297                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2298                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2299                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2300                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2301                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2302                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2303                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2304                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2305                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2306                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2307                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2308                         interrupt-names = "error",
2309                                         "ch0", "ch1", "ch2", "ch3",
2310                                         "ch4", "ch5", "ch6", "ch7",
2311                                         "ch8", "ch9", "ch10", "ch11",
2312                                         "ch12", "ch13", "ch14", "ch15";
2313                         clocks = <&cpg CPG_MOD 502>;
2314                         clock-names = "fck";
2315                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2316                         resets = <&cpg 502>;
2317                         #dma-cells = <1>;
2318                         dma-channels = <16>;
2319                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2320                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2321                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2322                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2323                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2324                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2325                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2326                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2327                 };
2328
2329                 audma1: dma-controller@ec720000 {
2330                         compatible = "renesas,dmac-r8a7796",
2331                                      "renesas,rcar-dmac";
2332                         reg = <0 0xec720000 0 0x10000>;
2333                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2334                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2335                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2336                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2337                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2338                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2339                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2340                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2341                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2342                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2343                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2344                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2345                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2346                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2347                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2348                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2349                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2350                         interrupt-names = "error",
2351                                         "ch0", "ch1", "ch2", "ch3",
2352                                         "ch4", "ch5", "ch6", "ch7",
2353                                         "ch8", "ch9", "ch10", "ch11",
2354                                         "ch12", "ch13", "ch14", "ch15";
2355                         clocks = <&cpg CPG_MOD 501>;
2356                         clock-names = "fck";
2357                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2358                         resets = <&cpg 501>;
2359                         #dma-cells = <1>;
2360                         dma-channels = <16>;
2361                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2362                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2363                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2364                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2365                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2366                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2367                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2368                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2369                 };
2370
2371                 xhci0: usb@ee000000 {
2372                         compatible = "renesas,xhci-r8a7796",
2373                                      "renesas,rcar-gen3-xhci";
2374                         reg = <0 0xee000000 0 0xc00>;
2375                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2376                         clocks = <&cpg CPG_MOD 328>;
2377                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2378                         resets = <&cpg 328>;
2379                         status = "disabled";
2380                 };
2381
2382                 usb3_peri0: usb@ee020000 {
2383                         compatible = "renesas,r8a7796-usb3-peri",
2384                                      "renesas,rcar-gen3-usb3-peri";
2385                         reg = <0 0xee020000 0 0x400>;
2386                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2387                         clocks = <&cpg CPG_MOD 328>;
2388                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2389                         resets = <&cpg 328>;
2390                         status = "disabled";
2391                 };
2392
2393                 ohci0: usb@ee080000 {
2394                         compatible = "generic-ohci";
2395                         reg = <0 0xee080000 0 0x100>;
2396                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2397                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2398                         phys = <&usb2_phy0 1>;
2399                         phy-names = "usb";
2400                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2401                         resets = <&cpg 703>, <&cpg 704>;
2402                         status = "disabled";
2403                 };
2404
2405                 ohci1: usb@ee0a0000 {
2406                         compatible = "generic-ohci";
2407                         reg = <0 0xee0a0000 0 0x100>;
2408                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2409                         clocks = <&cpg CPG_MOD 702>;
2410                         phys = <&usb2_phy1 1>;
2411                         phy-names = "usb";
2412                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2413                         resets = <&cpg 702>;
2414                         status = "disabled";
2415                 };
2416
2417                 ehci0: usb@ee080100 {
2418                         compatible = "generic-ehci";
2419                         reg = <0 0xee080100 0 0x100>;
2420                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2421                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2422                         phys = <&usb2_phy0 2>;
2423                         phy-names = "usb";
2424                         companion = <&ohci0>;
2425                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2426                         resets = <&cpg 703>, <&cpg 704>;
2427                         status = "disabled";
2428                 };
2429
2430                 ehci1: usb@ee0a0100 {
2431                         compatible = "generic-ehci";
2432                         reg = <0 0xee0a0100 0 0x100>;
2433                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2434                         clocks = <&cpg CPG_MOD 702>;
2435                         phys = <&usb2_phy1 2>;
2436                         phy-names = "usb";
2437                         companion = <&ohci1>;
2438                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2439                         resets = <&cpg 702>;
2440                         status = "disabled";
2441                 };
2442
2443                 usb2_phy0: usb-phy@ee080200 {
2444                         compatible = "renesas,usb2-phy-r8a7796",
2445                                      "renesas,rcar-gen3-usb2-phy";
2446                         reg = <0 0xee080200 0 0x700>;
2447                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2448                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2449                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2450                         resets = <&cpg 703>, <&cpg 704>;
2451                         #phy-cells = <1>;
2452                         status = "disabled";
2453                 };
2454
2455                 usb2_phy1: usb-phy@ee0a0200 {
2456                         compatible = "renesas,usb2-phy-r8a7796",
2457                                      "renesas,rcar-gen3-usb2-phy";
2458                         reg = <0 0xee0a0200 0 0x700>;
2459                         clocks = <&cpg CPG_MOD 702>;
2460                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2461                         resets = <&cpg 702>;
2462                         #phy-cells = <1>;
2463                         status = "disabled";
2464                 };
2465
2466                 sdhi0: mmc@ee100000 {
2467                         compatible = "renesas,sdhi-r8a7796",
2468                                      "renesas,rcar-gen3-sdhi";
2469                         reg = <0 0xee100000 0 0x2000>;
2470                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2471                         clocks = <&cpg CPG_MOD 314>;
2472                         max-frequency = <200000000>;
2473                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2474                         resets = <&cpg 314>;
2475                         iommus = <&ipmmu_ds1 32>;
2476                         status = "disabled";
2477                 };
2478
2479                 sdhi1: mmc@ee120000 {
2480                         compatible = "renesas,sdhi-r8a7796",
2481                                      "renesas,rcar-gen3-sdhi";
2482                         reg = <0 0xee120000 0 0x2000>;
2483                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2484                         clocks = <&cpg CPG_MOD 313>;
2485                         max-frequency = <200000000>;
2486                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2487                         resets = <&cpg 313>;
2488                         iommus = <&ipmmu_ds1 33>;
2489                         status = "disabled";
2490                 };
2491
2492                 sdhi2: mmc@ee140000 {
2493                         compatible = "renesas,sdhi-r8a7796",
2494                                      "renesas,rcar-gen3-sdhi";
2495                         reg = <0 0xee140000 0 0x2000>;
2496                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2497                         clocks = <&cpg CPG_MOD 312>;
2498                         max-frequency = <200000000>;
2499                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2500                         resets = <&cpg 312>;
2501                         iommus = <&ipmmu_ds1 34>;
2502                         status = "disabled";
2503                 };
2504
2505                 sdhi3: mmc@ee160000 {
2506                         compatible = "renesas,sdhi-r8a7796",
2507                                      "renesas,rcar-gen3-sdhi";
2508                         reg = <0 0xee160000 0 0x2000>;
2509                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2510                         clocks = <&cpg CPG_MOD 311>;
2511                         max-frequency = <200000000>;
2512                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2513                         resets = <&cpg 311>;
2514                         iommus = <&ipmmu_ds1 35>;
2515                         status = "disabled";
2516                 };
2517
2518                 gic: interrupt-controller@f1010000 {
2519                         compatible = "arm,gic-400";
2520                         #interrupt-cells = <3>;
2521                         #address-cells = <0>;
2522                         interrupt-controller;
2523                         reg = <0x0 0xf1010000 0 0x1000>,
2524                               <0x0 0xf1020000 0 0x20000>,
2525                               <0x0 0xf1040000 0 0x20000>,
2526                               <0x0 0xf1060000 0 0x20000>;
2527                         interrupts = <GIC_PPI 9
2528                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2529                         clocks = <&cpg CPG_MOD 408>;
2530                         clock-names = "clk";
2531                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2532                         resets = <&cpg 408>;
2533                 };
2534
2535                 pciec0: pcie@fe000000 {
2536                         compatible = "renesas,pcie-r8a7796",
2537                                      "renesas,pcie-rcar-gen3";
2538                         reg = <0 0xfe000000 0 0x80000>;
2539                         #address-cells = <3>;
2540                         #size-cells = <2>;
2541                         bus-range = <0x00 0xff>;
2542                         device_type = "pci";
2543                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2544                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2545                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2546                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2547                         /* Map all possible DDR as inbound ranges */
2548                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2549                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2550                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2551                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2552                         #interrupt-cells = <1>;
2553                         interrupt-map-mask = <0 0 0 0>;
2554                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2555                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2556                         clock-names = "pcie", "pcie_bus";
2557                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2558                         resets = <&cpg 319>;
2559                         status = "disabled";
2560                 };
2561
2562                 pciec1: pcie@ee800000 {
2563                         compatible = "renesas,pcie-r8a7796",
2564                                      "renesas,pcie-rcar-gen3";
2565                         reg = <0 0xee800000 0 0x80000>;
2566                         #address-cells = <3>;
2567                         #size-cells = <2>;
2568                         bus-range = <0x00 0xff>;
2569                         device_type = "pci";
2570                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2571                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2572                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2573                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2574                         /* Map all possible DDR as inbound ranges */
2575                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2576                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2577                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2578                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2579                         #interrupt-cells = <1>;
2580                         interrupt-map-mask = <0 0 0 0>;
2581                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2582                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2583                         clock-names = "pcie", "pcie_bus";
2584                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2585                         resets = <&cpg 318>;
2586                         status = "disabled";
2587                 };
2588
2589                 imr-lx4@fe860000 {
2590                         compatible = "renesas,r8a7796-imr-lx4",
2591                                      "renesas,imr-lx4";
2592                         reg = <0 0xfe860000 0 0x2000>;
2593                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2594                         clocks = <&cpg CPG_MOD 823>;
2595                         power-domains = <&sysc R8A7796_PD_A3VC>;
2596                         resets = <&cpg 823>;
2597                 };
2598
2599                 imr-lx4@fe870000 {
2600                         compatible = "renesas,r8a7796-imr-lx4",
2601                                      "renesas,imr-lx4";
2602                         reg = <0 0xfe870000 0 0x2000>;
2603                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2604                         clocks = <&cpg CPG_MOD 822>;
2605                         power-domains = <&sysc R8A7796_PD_A3VC>;
2606                         resets = <&cpg 822>;
2607                 };
2608
2609                 fdp1@fe940000 {
2610                         compatible = "renesas,fdp1";
2611                         reg = <0 0xfe940000 0 0x2400>;
2612                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2613                         clocks = <&cpg CPG_MOD 119>;
2614                         power-domains = <&sysc R8A7796_PD_A3VC>;
2615                         resets = <&cpg 119>;
2616                         renesas,fcp = <&fcpf0>;
2617                 };
2618
2619                 fcpf0: fcp@fe950000 {
2620                         compatible = "renesas,fcpf";
2621                         reg = <0 0xfe950000 0 0x200>;
2622                         clocks = <&cpg CPG_MOD 615>;
2623                         power-domains = <&sysc R8A7796_PD_A3VC>;
2624                         resets = <&cpg 615>;
2625                 };
2626
2627                 fcpvb0: fcp@fe96f000 {
2628                         compatible = "renesas,fcpv";
2629                         reg = <0 0xfe96f000 0 0x200>;
2630                         clocks = <&cpg CPG_MOD 607>;
2631                         power-domains = <&sysc R8A7796_PD_A3VC>;
2632                         resets = <&cpg 607>;
2633                 };
2634
2635                 fcpvi0: fcp@fe9af000 {
2636                         compatible = "renesas,fcpv";
2637                         reg = <0 0xfe9af000 0 0x200>;
2638                         clocks = <&cpg CPG_MOD 611>;
2639                         power-domains = <&sysc R8A7796_PD_A3VC>;
2640                         resets = <&cpg 611>;
2641                         iommus = <&ipmmu_vc0 19>;
2642                 };
2643
2644                 fcpvd0: fcp@fea27000 {
2645                         compatible = "renesas,fcpv";
2646                         reg = <0 0xfea27000 0 0x200>;
2647                         clocks = <&cpg CPG_MOD 603>;
2648                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2649                         resets = <&cpg 603>;
2650                         iommus = <&ipmmu_vi0 8>;
2651                 };
2652
2653                 fcpvd1: fcp@fea2f000 {
2654                         compatible = "renesas,fcpv";
2655                         reg = <0 0xfea2f000 0 0x200>;
2656                         clocks = <&cpg CPG_MOD 602>;
2657                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2658                         resets = <&cpg 602>;
2659                         iommus = <&ipmmu_vi0 9>;
2660                 };
2661
2662                 fcpvd2: fcp@fea37000 {
2663                         compatible = "renesas,fcpv";
2664                         reg = <0 0xfea37000 0 0x200>;
2665                         clocks = <&cpg CPG_MOD 601>;
2666                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2667                         resets = <&cpg 601>;
2668                         iommus = <&ipmmu_vi0 10>;
2669                 };
2670
2671                 vspb: vsp@fe960000 {
2672                         compatible = "renesas,vsp2";
2673                         reg = <0 0xfe960000 0 0x8000>;
2674                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2675                         clocks = <&cpg CPG_MOD 626>;
2676                         power-domains = <&sysc R8A7796_PD_A3VC>;
2677                         resets = <&cpg 626>;
2678
2679                         renesas,fcp = <&fcpvb0>;
2680                 };
2681
2682                 vspd0: vsp@fea20000 {
2683                         compatible = "renesas,vsp2";
2684                         reg = <0 0xfea20000 0 0x5000>;
2685                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2686                         clocks = <&cpg CPG_MOD 623>;
2687                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2688                         resets = <&cpg 623>;
2689
2690                         renesas,fcp = <&fcpvd0>;
2691                 };
2692
2693                 vspd1: vsp@fea28000 {
2694                         compatible = "renesas,vsp2";
2695                         reg = <0 0xfea28000 0 0x5000>;
2696                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2697                         clocks = <&cpg CPG_MOD 622>;
2698                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2699                         resets = <&cpg 622>;
2700
2701                         renesas,fcp = <&fcpvd1>;
2702                 };
2703
2704                 vspd2: vsp@fea30000 {
2705                         compatible = "renesas,vsp2";
2706                         reg = <0 0xfea30000 0 0x5000>;
2707                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2708                         clocks = <&cpg CPG_MOD 621>;
2709                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2710                         resets = <&cpg 621>;
2711
2712                         renesas,fcp = <&fcpvd2>;
2713                 };
2714
2715                 vspi0: vsp@fe9a0000 {
2716                         compatible = "renesas,vsp2";
2717                         reg = <0 0xfe9a0000 0 0x8000>;
2718                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2719                         clocks = <&cpg CPG_MOD 631>;
2720                         power-domains = <&sysc R8A7796_PD_A3VC>;
2721                         resets = <&cpg 631>;
2722
2723                         renesas,fcp = <&fcpvi0>;
2724                 };
2725
2726                 cmm0: cmm@fea40000 {
2727                         compatible = "renesas,r8a7796-cmm",
2728                                      "renesas,rcar-gen3-cmm";
2729                         reg = <0 0xfea40000 0 0x1000>;
2730                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2731                         clocks = <&cpg CPG_MOD 711>;
2732                         resets = <&cpg 711>;
2733                 };
2734
2735                 cmm1: cmm@fea50000 {
2736                         compatible = "renesas,r8a7796-cmm",
2737                                      "renesas,rcar-gen3-cmm";
2738                         reg = <0 0xfea50000 0 0x1000>;
2739                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2740                         clocks = <&cpg CPG_MOD 710>;
2741                         resets = <&cpg 710>;
2742                 };
2743
2744                 cmm2: cmm@fea60000 {
2745                         compatible = "renesas,r8a7796-cmm",
2746                                      "renesas,rcar-gen3-cmm";
2747                         reg = <0 0xfea60000 0 0x1000>;
2748                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2749                         clocks = <&cpg CPG_MOD 709>;
2750                         resets = <&cpg 709>;
2751                 };
2752
2753                 csi20: csi2@fea80000 {
2754                         compatible = "renesas,r8a7796-csi2";
2755                         reg = <0 0xfea80000 0 0x10000>;
2756                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2757                         clocks = <&cpg CPG_MOD 714>;
2758                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2759                         resets = <&cpg 714>;
2760                         status = "disabled";
2761
2762                         ports {
2763                                 #address-cells = <1>;
2764                                 #size-cells = <0>;
2765
2766                                 port@0 {
2767                                         reg = <0>;
2768                                 };
2769
2770                                 port@1 {
2771                                         #address-cells = <1>;
2772                                         #size-cells = <0>;
2773
2774                                         reg = <1>;
2775
2776                                         csi20vin0: endpoint@0 {
2777                                                 reg = <0>;
2778                                                 remote-endpoint = <&vin0csi20>;
2779                                         };
2780                                         csi20vin1: endpoint@1 {
2781                                                 reg = <1>;
2782                                                 remote-endpoint = <&vin1csi20>;
2783                                         };
2784                                         csi20vin2: endpoint@2 {
2785                                                 reg = <2>;
2786                                                 remote-endpoint = <&vin2csi20>;
2787                                         };
2788                                         csi20vin3: endpoint@3 {
2789                                                 reg = <3>;
2790                                                 remote-endpoint = <&vin3csi20>;
2791                                         };
2792                                         csi20vin4: endpoint@4 {
2793                                                 reg = <4>;
2794                                                 remote-endpoint = <&vin4csi20>;
2795                                         };
2796                                         csi20vin5: endpoint@5 {
2797                                                 reg = <5>;
2798                                                 remote-endpoint = <&vin5csi20>;
2799                                         };
2800                                         csi20vin6: endpoint@6 {
2801                                                 reg = <6>;
2802                                                 remote-endpoint = <&vin6csi20>;
2803                                         };
2804                                         csi20vin7: endpoint@7 {
2805                                                 reg = <7>;
2806                                                 remote-endpoint = <&vin7csi20>;
2807                                         };
2808                                 };
2809                         };
2810                 };
2811
2812                 csi40: csi2@feaa0000 {
2813                         compatible = "renesas,r8a7796-csi2";
2814                         reg = <0 0xfeaa0000 0 0x10000>;
2815                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2816                         clocks = <&cpg CPG_MOD 716>;
2817                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2818                         resets = <&cpg 716>;
2819                         status = "disabled";
2820
2821                         ports {
2822                                 #address-cells = <1>;
2823                                 #size-cells = <0>;
2824
2825                                 port@0 {
2826                                         reg = <0>;
2827                                 };
2828
2829                                 port@1 {
2830                                         #address-cells = <1>;
2831                                         #size-cells = <0>;
2832
2833                                         reg = <1>;
2834
2835                                         csi40vin0: endpoint@0 {
2836                                                 reg = <0>;
2837                                                 remote-endpoint = <&vin0csi40>;
2838                                         };
2839                                         csi40vin1: endpoint@1 {
2840                                                 reg = <1>;
2841                                                 remote-endpoint = <&vin1csi40>;
2842                                         };
2843                                         csi40vin2: endpoint@2 {
2844                                                 reg = <2>;
2845                                                 remote-endpoint = <&vin2csi40>;
2846                                         };
2847                                         csi40vin3: endpoint@3 {
2848                                                 reg = <3>;
2849                                                 remote-endpoint = <&vin3csi40>;
2850                                         };
2851                                         csi40vin4: endpoint@4 {
2852                                                 reg = <4>;
2853                                                 remote-endpoint = <&vin4csi40>;
2854                                         };
2855                                         csi40vin5: endpoint@5 {
2856                                                 reg = <5>;
2857                                                 remote-endpoint = <&vin5csi40>;
2858                                         };
2859                                         csi40vin6: endpoint@6 {
2860                                                 reg = <6>;
2861                                                 remote-endpoint = <&vin6csi40>;
2862                                         };
2863                                         csi40vin7: endpoint@7 {
2864                                                 reg = <7>;
2865                                                 remote-endpoint = <&vin7csi40>;
2866                                         };
2867                                 };
2868
2869                         };
2870                 };
2871
2872                 hdmi0: hdmi@fead0000 {
2873                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2874                         reg = <0 0xfead0000 0 0x10000>;
2875                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2876                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2877                         clock-names = "iahb", "isfr";
2878                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2879                         resets = <&cpg 729>;
2880                         status = "disabled";
2881
2882                         ports {
2883                                 #address-cells = <1>;
2884                                 #size-cells = <0>;
2885                                 port@0 {
2886                                         reg = <0>;
2887                                         dw_hdmi0_in: endpoint {
2888                                                 remote-endpoint = <&du_out_hdmi0>;
2889                                         };
2890                                 };
2891                                 port@1 {
2892                                         reg = <1>;
2893                                 };
2894                                 port@2 {
2895                                         /* HDMI sound */
2896                                         reg = <2>;
2897                                 };
2898                         };
2899                 };
2900
2901                 du: display@feb00000 {
2902                         compatible = "renesas,du-r8a7796";
2903                         reg = <0 0xfeb00000 0 0x70000>;
2904                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2905                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2906                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2907                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2908                                  <&cpg CPG_MOD 722>;
2909                         clock-names = "du.0", "du.1", "du.2";
2910                         resets = <&cpg 724>, <&cpg 722>;
2911                         reset-names = "du.0", "du.2";
2912
2913                         renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
2914                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2915
2916                         status = "disabled";
2917
2918                         ports {
2919                                 #address-cells = <1>;
2920                                 #size-cells = <0>;
2921
2922                                 port@0 {
2923                                         reg = <0>;
2924                                         du_out_rgb: endpoint {
2925                                         };
2926                                 };
2927                                 port@1 {
2928                                         reg = <1>;
2929                                         du_out_hdmi0: endpoint {
2930                                                 remote-endpoint = <&dw_hdmi0_in>;
2931                                         };
2932                                 };
2933                                 port@2 {
2934                                         reg = <2>;
2935                                         du_out_lvds0: endpoint {
2936                                                 remote-endpoint = <&lvds0_in>;
2937                                         };
2938                                 };
2939                         };
2940                 };
2941
2942                 lvds0: lvds@feb90000 {
2943                         compatible = "renesas,r8a7796-lvds";
2944                         reg = <0 0xfeb90000 0 0x14>;
2945                         clocks = <&cpg CPG_MOD 727>;
2946                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2947                         resets = <&cpg 727>;
2948                         status = "disabled";
2949
2950                         ports {
2951                                 #address-cells = <1>;
2952                                 #size-cells = <0>;
2953
2954                                 port@0 {
2955                                         reg = <0>;
2956                                         lvds0_in: endpoint {
2957                                                 remote-endpoint = <&du_out_lvds0>;
2958                                         };
2959                                 };
2960                                 port@1 {
2961                                         reg = <1>;
2962                                         lvds0_out: endpoint {
2963                                         };
2964                                 };
2965                         };
2966                 };
2967
2968                 prr: chipid@fff00044 {
2969                         compatible = "renesas,prr";
2970                         reg = <0 0xfff00044 0 4>;
2971                 };
2972         };
2973
2974         thermal-zones {
2975                 sensor_thermal1: sensor-thermal1 {
2976                         polling-delay-passive = <250>;
2977                         polling-delay = <1000>;
2978                         thermal-sensors = <&tsc 0>;
2979                         sustainable-power = <3874>;
2980
2981                         trips {
2982                                 sensor1_crit: sensor1-crit {
2983                                         temperature = <120000>;
2984                                         hysteresis = <1000>;
2985                                         type = "critical";
2986                                 };
2987                         };
2988                 };
2989
2990                 sensor_thermal2: sensor-thermal2 {
2991                         polling-delay-passive = <250>;
2992                         polling-delay = <1000>;
2993                         thermal-sensors = <&tsc 1>;
2994                         sustainable-power = <3874>;
2995
2996                         trips {
2997                                 sensor2_crit: sensor2-crit {
2998                                         temperature = <120000>;
2999                                         hysteresis = <1000>;
3000                                         type = "critical";
3001                                 };
3002                         };
3003                 };
3004
3005                 sensor_thermal3: sensor-thermal3 {
3006                         polling-delay-passive = <250>;
3007                         polling-delay = <1000>;
3008                         thermal-sensors = <&tsc 2>;
3009                         sustainable-power = <3874>;
3010
3011                         cooling-maps {
3012                                 map0 {
3013                                         trip = <&target>;
3014                                         cooling-device = <&a57_0 2 4>;
3015                                         contribution = <1024>;
3016                                 };
3017                                 map1 {
3018                                         trip = <&target>;
3019                                         cooling-device = <&a53_0 0 2>;
3020                                         contribution = <1024>;
3021                                 };
3022                         };
3023                         trips {
3024                                 target: trip-point1 {
3025                                         temperature = <100000>;
3026                                         hysteresis = <1000>;
3027                                         type = "passive";
3028                                 };
3029
3030                                 sensor3_crit: sensor3-crit {
3031                                         temperature = <120000>;
3032                                         hysteresis = <1000>;
3033                                         type = "critical";
3034                                 };
3035                         };
3036                 };
3037         };
3038
3039         timer {
3040                 compatible = "arm,armv8-timer";
3041                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3042                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3043                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3044                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
3045         };
3046
3047         /* External USB clocks - can be overridden by the board */
3048         usb3s0_clk: usb3s0 {
3049                 compatible = "fixed-clock";
3050                 #clock-cells = <0>;
3051                 clock-frequency = <0>;
3052         };
3053
3054         usb_extal_clk: usb_extal {
3055                 compatible = "fixed-clock";
3056                 #clock-cells = <0>;
3057                 clock-frequency = <0>;
3058         };
3059 };