arch/arm64/boot/dts/renesas/r8a77951.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car H3 (R8A77951) SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7795-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         /*
  31          * The external audio clocks are configured as 0 Hz fixed frequency
  32          * clocks by default.
  33          * Boards that provide audio clocks should override them.
  34          */
  35         audio_clk_a: audio_clk_a {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         audio_clk_c: audio_clk_c {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <0>;
  51         };
  52
  53         /* External CAN clock - to be overridden by boards that provide it */
  54         can_clk: can {
  55                 compatible = "fixed-clock";
  56                 #clock-cells = <0>;
  57                 clock-frequency = <0>;
  58         };
  59
  60         cluster0_opp: opp_table0 {
  61                 compatible = "operating-points-v2";
  62                 opp-shared;
  63
  64                 opp-500000000 {
  65                         opp-hz = /bits/ 64 <500000000>;
  66                         opp-microvolt = <830000>;
  67                         clock-latency-ns = <300000>;
  68                 };
  69                 opp-1000000000 {
  70                         opp-hz = /bits/ 64 <1000000000>;
  71                         opp-microvolt = <830000>;
  72                         clock-latency-ns = <300000>;
  73                 };
  74                 opp-1500000000 {
  75                         opp-hz = /bits/ 64 <1500000000>;
  76                         opp-microvolt = <830000>;
  77                         clock-latency-ns = <300000>;
  78                         opp-suspend;
  79                 };
  80                 opp-1600000000 {
  81                         opp-hz = /bits/ 64 <1600000000>;
  82                         opp-microvolt = <900000>;
  83                         clock-latency-ns = <300000>;
  84                         turbo-mode;
  85                 };
  86                 opp-1700000000 {
  87                         opp-hz = /bits/ 64 <1700000000>;
  88                         opp-microvolt = <960000>;
  89                         clock-latency-ns = <300000>;
  90                         turbo-mode;
  91                 };
  92         };
  93
  94         cluster1_opp: opp_table1 {
  95                 compatible = "operating-points-v2";
  96                 opp-shared;
  97
  98                 opp-800000000 {
  99                         opp-hz = /bits/ 64 <800000000>;
 100                         opp-microvolt = <820000>;
 101                         clock-latency-ns = <300000>;
 102                 };
 103                 opp-1000000000 {
 104                         opp-hz = /bits/ 64 <1000000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1200000000 {
 109                         opp-hz = /bits/ 64 <1200000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                 };
 113         };
 114
 115         cpus {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118
 119                 cpu-map {
 120                         cluster0 {
 121                                 core0 {
 122                                         cpu = <&a57_0>;
 123                                 };
 124                                 core1 {
 125                                         cpu = <&a57_1>;
 126                                 };
 127                                 core2 {
 128                                         cpu = <&a57_2>;
 129                                 };
 130                                 core3 {
 131                                         cpu = <&a57_3>;
 132                                 };
 133                         };
 134
 135                         cluster1 {
 136                                 core0 {
 137                                         cpu = <&a53_0>;
 138                                 };
 139                                 core1 {
 140                                         cpu = <&a53_1>;
 141                                 };
 142                                 core2 {
 143                                         cpu = <&a53_2>;
 144                                 };
 145                                 core3 {
 146                                         cpu = <&a53_3>;
 147                                 };
 148                         };
 149                 };
 150
 151                 a57_0: cpu@0 {
 152                         compatible = "arm,cortex-a57";
 153                         reg = <0x0>;
 154                         device_type = "cpu";
 155                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
 156                         next-level-cache = <&L2_CA57>;
 157                         enable-method = "psci";
 158                         cpu-idle-states = <&CPU_SLEEP_0>;
 159                         dynamic-power-coefficient = <854>;
 160                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 161                         operating-points-v2 = <&cluster0_opp>;
 162                         capacity-dmips-mhz = <1024>;
 163                         #cooling-cells = <2>;
 164                 };
 165
 166                 a57_1: cpu@1 {
 167                         compatible = "arm,cortex-a57";
 168                         reg = <0x1>;
 169                         device_type = "cpu";
 170                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
 171                         next-level-cache = <&L2_CA57>;
 172                         enable-method = "psci";
 173                         cpu-idle-states = <&CPU_SLEEP_0>;
 174                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 175                         operating-points-v2 = <&cluster0_opp>;
 176                         capacity-dmips-mhz = <1024>;
 177                         #cooling-cells = <2>;
 178                 };
 179
 180                 a57_2: cpu@2 {
 181                         compatible = "arm,cortex-a57";
 182                         reg = <0x2>;
 183                         device_type = "cpu";
 184                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
 185                         next-level-cache = <&L2_CA57>;
 186                         enable-method = "psci";
 187                         cpu-idle-states = <&CPU_SLEEP_0>;
 188                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 189                         operating-points-v2 = <&cluster0_opp>;
 190                         capacity-dmips-mhz = <1024>;
 191                         #cooling-cells = <2>;
 192                 };
 193
 194                 a57_3: cpu@3 {
 195                         compatible = "arm,cortex-a57";
 196                         reg = <0x3>;
 197                         device_type = "cpu";
 198                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
 199                         next-level-cache = <&L2_CA57>;
 200                         enable-method = "psci";
 201                         cpu-idle-states = <&CPU_SLEEP_0>;
 202                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 203                         operating-points-v2 = <&cluster0_opp>;
 204                         capacity-dmips-mhz = <1024>;
 205                         #cooling-cells = <2>;
 206                 };
 207
 208                 a53_0: cpu@100 {
 209                         compatible = "arm,cortex-a53";
 210                         reg = <0x100>;
 211                         device_type = "cpu";
 212                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
 213                         next-level-cache = <&L2_CA53>;
 214                         enable-method = "psci";
 215                         cpu-idle-states = <&CPU_SLEEP_1>;
 216                         #cooling-cells = <2>;
 217                         dynamic-power-coefficient = <277>;
 218                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 219                         operating-points-v2 = <&cluster1_opp>;
 220                         capacity-dmips-mhz = <535>;
 221                 };
 222
 223                 a53_1: cpu@101 {
 224                         compatible = "arm,cortex-a53";
 225                         reg = <0x101>;
 226                         device_type = "cpu";
 227                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
 228                         next-level-cache = <&L2_CA53>;
 229                         enable-method = "psci";
 230                         cpu-idle-states = <&CPU_SLEEP_1>;
 231                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 232                         operating-points-v2 = <&cluster1_opp>;
 233                         capacity-dmips-mhz = <535>;
 234                 };
 235
 236                 a53_2: cpu@102 {
 237                         compatible = "arm,cortex-a53";
 238                         reg = <0x102>;
 239                         device_type = "cpu";
 240                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 241                         next-level-cache = <&L2_CA53>;
 242                         enable-method = "psci";
 243                         cpu-idle-states = <&CPU_SLEEP_1>;
 244                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 245                         operating-points-v2 = <&cluster1_opp>;
 246                         capacity-dmips-mhz = <535>;
 247                 };
 248
 249                 a53_3: cpu@103 {
 250                         compatible = "arm,cortex-a53";
 251                         reg = <0x103>;
 252                         device_type = "cpu";
 253                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 254                         next-level-cache = <&L2_CA53>;
 255                         enable-method = "psci";
 256                         cpu-idle-states = <&CPU_SLEEP_1>;
 257                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 258                         operating-points-v2 = <&cluster1_opp>;
 259                         capacity-dmips-mhz = <535>;
 260                 };
 261
 262                 L2_CA57: cache-controller-0 {
 263                         compatible = "cache";
 264                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 265                         cache-unified;
 266                         cache-level = <2>;
 267                 };
 268
 269                 L2_CA53: cache-controller-1 {
 270                         compatible = "cache";
 271                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 272                         cache-unified;
 273                         cache-level = <2>;
 274                 };
 275
 276                 idle-states {
 277                         entry-method = "psci";
 278
 279                         CPU_SLEEP_0: cpu-sleep-0 {
 280                                 compatible = "arm,idle-state";
 281                                 arm,psci-suspend-param = <0x0010000>;
 282                                 local-timer-stop;
 283                                 entry-latency-us = <400>;
 284                                 exit-latency-us = <500>;
 285                                 min-residency-us = <4000>;
 286                         };
 287
 288                         CPU_SLEEP_1: cpu-sleep-1 {
 289                                 compatible = "arm,idle-state";
 290                                 arm,psci-suspend-param = <0x0010000>;
 291                                 local-timer-stop;
 292                                 entry-latency-us = <700>;
 293                                 exit-latency-us = <700>;
 294                                 min-residency-us = <5000>;
 295                         };
 296                 };
 297         };
 298
 299         extal_clk: extal {
 300                 compatible = "fixed-clock";
 301                 #clock-cells = <0>;
 302                 /* This value must be overridden by the board */
 303                 clock-frequency = <0>;
 304         };
 305
 306         extalr_clk: extalr {
 307                 compatible = "fixed-clock";
 308                 #clock-cells = <0>;
 309                 /* This value must be overridden by the board */
 310                 clock-frequency = <0>;
 311         };
 312
 313         /* External PCIe clock - can be overridden by the board */
 314         pcie_bus_clk: pcie_bus {
 315                 compatible = "fixed-clock";
 316                 #clock-cells = <0>;
 317                 clock-frequency = <0>;
 318         };
 319
 320         pmu_a53 {
 321                 compatible = "arm,cortex-a53-pmu";
 322                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 323                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 324                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 325                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 326                 interrupt-affinity = <&a53_0>,
 327                                      <&a53_1>,
 328                                      <&a53_2>,
 329                                      <&a53_3>;
 330         };
 331
 332         pmu_a57 {
 333                 compatible = "arm,cortex-a57-pmu";
 334                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 335                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 336                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 337                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 338                 interrupt-affinity = <&a57_0>,
 339                                      <&a57_1>,
 340                                      <&a57_2>,
 341                                      <&a57_3>;
 342         };
 343
 344         psci {
 345                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 346                 method = "smc";
 347         };
 348
 349         /* External SCIF clock - to be overridden by boards that provide it */
 350         scif_clk: scif {
 351                 compatible = "fixed-clock";
 352                 #clock-cells = <0>;
 353                 clock-frequency = <0>;
 354         };
 355
 356         soc: soc {
 357                 compatible = "simple-bus";
 358                 interrupt-parent = <&gic>;
 359
 360                 #address-cells = <2>;
 361                 #size-cells = <2>;
 362                 ranges;
 363
 364                 rwdt: watchdog@e6020000 {
 365                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 366                         reg = <0 0xe6020000 0 0x0c>;
 367                         clocks = <&cpg CPG_MOD 402>;
 368                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 369                         resets = <&cpg 402>;
 370                         status = "disabled";
 371                 };
 372
 373                 gpio0: gpio@e6050000 {
 374                         compatible = "renesas,gpio-r8a7795",
 375                                      "renesas,rcar-gen3-gpio";
 376                         reg = <0 0xe6050000 0 0x50>;
 377                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 378                         #gpio-cells = <2>;
 379                         gpio-controller;
 380                         gpio-ranges = <&pfc 0 0 16>;
 381                         #interrupt-cells = <2>;
 382                         interrupt-controller;
 383                         clocks = <&cpg CPG_MOD 912>;
 384                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 385                         resets = <&cpg 912>;
 386                 };
 387
 388                 gpio1: gpio@e6051000 {
 389                         compatible = "renesas,gpio-r8a7795",
 390                                      "renesas,rcar-gen3-gpio";
 391                         reg = <0 0xe6051000 0 0x50>;
 392                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 393                         #gpio-cells = <2>;
 394                         gpio-controller;
 395                         gpio-ranges = <&pfc 0 32 29>;
 396                         #interrupt-cells = <2>;
 397                         interrupt-controller;
 398                         clocks = <&cpg CPG_MOD 911>;
 399                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 400                         resets = <&cpg 911>;
 401                 };
 402
 403                 gpio2: gpio@e6052000 {
 404                         compatible = "renesas,gpio-r8a7795",
 405                                      "renesas,rcar-gen3-gpio";
 406                         reg = <0 0xe6052000 0 0x50>;
 407                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 408                         #gpio-cells = <2>;
 409                         gpio-controller;
 410                         gpio-ranges = <&pfc 0 64 15>;
 411                         #interrupt-cells = <2>;
 412                         interrupt-controller;
 413                         clocks = <&cpg CPG_MOD 910>;
 414                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 415                         resets = <&cpg 910>;
 416                 };
 417
 418                 gpio3: gpio@e6053000 {
 419                         compatible = "renesas,gpio-r8a7795",
 420                                      "renesas,rcar-gen3-gpio";
 421                         reg = <0 0xe6053000 0 0x50>;
 422                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 423                         #gpio-cells = <2>;
 424                         gpio-controller;
 425                         gpio-ranges = <&pfc 0 96 16>;
 426                         #interrupt-cells = <2>;
 427                         interrupt-controller;
 428                         clocks = <&cpg CPG_MOD 909>;
 429                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 430                         resets = <&cpg 909>;
 431                 };
 432
 433                 gpio4: gpio@e6054000 {
 434                         compatible = "renesas,gpio-r8a7795",
 435                                      "renesas,rcar-gen3-gpio";
 436                         reg = <0 0xe6054000 0 0x50>;
 437                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 438                         #gpio-cells = <2>;
 439                         gpio-controller;
 440                         gpio-ranges = <&pfc 0 128 18>;
 441                         #interrupt-cells = <2>;
 442                         interrupt-controller;
 443                         clocks = <&cpg CPG_MOD 908>;
 444                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 445                         resets = <&cpg 908>;
 446                 };
 447
 448                 gpio5: gpio@e6055000 {
 449                         compatible = "renesas,gpio-r8a7795",
 450                                      "renesas,rcar-gen3-gpio";
 451                         reg = <0 0xe6055000 0 0x50>;
 452                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 453                         #gpio-cells = <2>;
 454                         gpio-controller;
 455                         gpio-ranges = <&pfc 0 160 26>;
 456                         #interrupt-cells = <2>;
 457                         interrupt-controller;
 458                         clocks = <&cpg CPG_MOD 907>;
 459                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 460                         resets = <&cpg 907>;
 461                 };
 462
 463                 gpio6: gpio@e6055400 {
 464                         compatible = "renesas,gpio-r8a7795",
 465                                      "renesas,rcar-gen3-gpio";
 466                         reg = <0 0xe6055400 0 0x50>;
 467                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 468                         #gpio-cells = <2>;
 469                         gpio-controller;
 470                         gpio-ranges = <&pfc 0 192 32>;
 471                         #interrupt-cells = <2>;
 472                         interrupt-controller;
 473                         clocks = <&cpg CPG_MOD 906>;
 474                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 475                         resets = <&cpg 906>;
 476                 };
 477
 478                 gpio7: gpio@e6055800 {
 479                         compatible = "renesas,gpio-r8a7795",
 480                                      "renesas,rcar-gen3-gpio";
 481                         reg = <0 0xe6055800 0 0x50>;
 482                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 483                         #gpio-cells = <2>;
 484                         gpio-controller;
 485                         gpio-ranges = <&pfc 0 224 4>;
 486                         #interrupt-cells = <2>;
 487                         interrupt-controller;
 488                         clocks = <&cpg CPG_MOD 905>;
 489                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 490                         resets = <&cpg 905>;
 491                 };
 492
 493                 pfc: pinctrl@e6060000 {
 494                         compatible = "renesas,pfc-r8a7795";
 495                         reg = <0 0xe6060000 0 0x50c>;
 496                 };
 497
 498                 cmt0: timer@e60f0000 {
 499                         compatible = "renesas,r8a7795-cmt0",
 500                                      "renesas,rcar-gen3-cmt0";
 501                         reg = <0 0xe60f0000 0 0x1004>;
 502                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 503                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 504                         clocks = <&cpg CPG_MOD 303>;
 505                         clock-names = "fck";
 506                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 507                         resets = <&cpg 303>;
 508                         status = "disabled";
 509                 };
 510
 511                 cmt1: timer@e6130000 {
 512                         compatible = "renesas,r8a7795-cmt1",
 513                                      "renesas,rcar-gen3-cmt1";
 514                         reg = <0 0xe6130000 0 0x1004>;
 515                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 521                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 522                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 523                         clocks = <&cpg CPG_MOD 302>;
 524                         clock-names = "fck";
 525                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 526                         resets = <&cpg 302>;
 527                         status = "disabled";
 528                 };
 529
 530                 cmt2: timer@e6140000 {
 531                         compatible = "renesas,r8a7795-cmt1",
 532                                      "renesas,rcar-gen3-cmt1";
 533                         reg = <0 0xe6140000 0 0x1004>;
 534                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 537                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 538                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 542                         clocks = <&cpg CPG_MOD 301>;
 543                         clock-names = "fck";
 544                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 545                         resets = <&cpg 301>;
 546                         status = "disabled";
 547                 };
 548
 549                 cmt3: timer@e6148000 {
 550                         compatible = "renesas,r8a7795-cmt1",
 551                                      "renesas,rcar-gen3-cmt1";
 552                         reg = <0 0xe6148000 0 0x1004>;
 553                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 554                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 556                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 557                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 558                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 559                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 560                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 561                         clocks = <&cpg CPG_MOD 300>;
 562                         clock-names = "fck";
 563                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 564                         resets = <&cpg 300>;
 565                         status = "disabled";
 566                 };
 567
 568                 cpg: clock-controller@e6150000 {
 569                         compatible = "renesas,r8a7795-cpg-mssr";
 570                         reg = <0 0xe6150000 0 0x1000>;
 571                         clocks = <&extal_clk>, <&extalr_clk>;
 572                         clock-names = "extal", "extalr";
 573                         #clock-cells = <2>;
 574                         #power-domain-cells = <0>;
 575                         #reset-cells = <1>;
 576                 };
 577
 578                 rst: reset-controller@e6160000 {
 579                         compatible = "renesas,r8a7795-rst";
 580                         reg = <0 0xe6160000 0 0x0200>;
 581                 };
 582
 583                 sysc: system-controller@e6180000 {
 584                         compatible = "renesas,r8a7795-sysc";
 585                         reg = <0 0xe6180000 0 0x0400>;
 586                         #power-domain-cells = <1>;
 587                 };
 588
 589                 tsc: thermal@e6198000 {
 590                         compatible = "renesas,r8a7795-thermal";
 591                         reg = <0 0xe6198000 0 0x100>,
 592                               <0 0xe61a0000 0 0x100>,
 593                               <0 0xe61a8000 0 0x100>;
 594                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 595                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 597                         clocks = <&cpg CPG_MOD 522>;
 598                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 599                         resets = <&cpg 522>;
 600                         #thermal-sensor-cells = <1>;
 601                 };
 602
 603                 intc_ex: interrupt-controller@e61c0000 {
 604                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 605                         #interrupt-cells = <2>;
 606                         interrupt-controller;
 607                         reg = <0 0xe61c0000 0 0x200>;
 608                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 614                         clocks = <&cpg CPG_MOD 407>;
 615                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 616                         resets = <&cpg 407>;
 617                 };
 618
 619                 tmu0: timer@e61e0000 {
 620                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 621                         reg = <0 0xe61e0000 0 0x30>;
 622                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 624                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 625                         clocks = <&cpg CPG_MOD 125>;
 626                         clock-names = "fck";
 627                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 628                         resets = <&cpg 125>;
 629                         status = "disabled";
 630                 };
 631
 632                 tmu1: timer@e6fc0000 {
 633                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 634                         reg = <0 0xe6fc0000 0 0x30>;
 635                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 636                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 637                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 638                         clocks = <&cpg CPG_MOD 124>;
 639                         clock-names = "fck";
 640                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 641                         resets = <&cpg 124>;
 642                         status = "disabled";
 643                 };
 644
 645                 tmu2: timer@e6fd0000 {
 646                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 647                         reg = <0 0xe6fd0000 0 0x30>;
 648                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 651                         clocks = <&cpg CPG_MOD 123>;
 652                         clock-names = "fck";
 653                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 654                         resets = <&cpg 123>;
 655                         status = "disabled";
 656                 };
 657
 658                 tmu3: timer@e6fe0000 {
 659                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 660                         reg = <0 0xe6fe0000 0 0x30>;
 661                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 662                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 663                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 664                         clocks = <&cpg CPG_MOD 122>;
 665                         clock-names = "fck";
 666                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 667                         resets = <&cpg 122>;
 668                         status = "disabled";
 669                 };
 670
 671                 tmu4: timer@ffc00000 {
 672                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 673                         reg = <0 0xffc00000 0 0x30>;
 674                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 675                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 676                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 677                         clocks = <&cpg CPG_MOD 121>;
 678                         clock-names = "fck";
 679                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 680                         resets = <&cpg 121>;
 681                         status = "disabled";
 682                 };
 683
 684                 i2c0: i2c@e6500000 {
 685                         #address-cells = <1>;
 686                         #size-cells = <0>;
 687                         compatible = "renesas,i2c-r8a7795",
 688                                      "renesas,rcar-gen3-i2c";
 689                         reg = <0 0xe6500000 0 0x40>;
 690                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 691                         clocks = <&cpg CPG_MOD 931>;
 692                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 693                         resets = <&cpg 931>;
 694                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 695                                <&dmac2 0x91>, <&dmac2 0x90>;
 696                         dma-names = "tx", "rx", "tx", "rx";
 697                         i2c-scl-internal-delay-ns = <110>;
 698                         status = "disabled";
 699                 };
 700
 701                 i2c1: i2c@e6508000 {
 702                         #address-cells = <1>;
 703                         #size-cells = <0>;
 704                         compatible = "renesas,i2c-r8a7795",
 705                                      "renesas,rcar-gen3-i2c";
 706                         reg = <0 0xe6508000 0 0x40>;
 707                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 708                         clocks = <&cpg CPG_MOD 930>;
 709                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 710                         resets = <&cpg 930>;
 711                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 712                                <&dmac2 0x93>, <&dmac2 0x92>;
 713                         dma-names = "tx", "rx", "tx", "rx";
 714                         i2c-scl-internal-delay-ns = <6>;
 715                         status = "disabled";
 716                 };
 717
 718                 i2c2: i2c@e6510000 {
 719                         #address-cells = <1>;
 720                         #size-cells = <0>;
 721                         compatible = "renesas,i2c-r8a7795",
 722                                      "renesas,rcar-gen3-i2c";
 723                         reg = <0 0xe6510000 0 0x40>;
 724                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 725                         clocks = <&cpg CPG_MOD 929>;
 726                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 727                         resets = <&cpg 929>;
 728                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 729                                <&dmac2 0x95>, <&dmac2 0x94>;
 730                         dma-names = "tx", "rx", "tx", "rx";
 731                         i2c-scl-internal-delay-ns = <6>;
 732                         status = "disabled";
 733                 };
 734
 735                 i2c3: i2c@e66d0000 {
 736                         #address-cells = <1>;
 737                         #size-cells = <0>;
 738                         compatible = "renesas,i2c-r8a7795",
 739                                      "renesas,rcar-gen3-i2c";
 740                         reg = <0 0xe66d0000 0 0x40>;
 741                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 742                         clocks = <&cpg CPG_MOD 928>;
 743                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 744                         resets = <&cpg 928>;
 745                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 746                         dma-names = "tx", "rx";
 747                         i2c-scl-internal-delay-ns = <110>;
 748                         status = "disabled";
 749                 };
 750
 751                 i2c4: i2c@e66d8000 {
 752                         #address-cells = <1>;
 753                         #size-cells = <0>;
 754                         compatible = "renesas,i2c-r8a7795",
 755                                      "renesas,rcar-gen3-i2c";
 756                         reg = <0 0xe66d8000 0 0x40>;
 757                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 758                         clocks = <&cpg CPG_MOD 927>;
 759                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 760                         resets = <&cpg 927>;
 761                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 762                         dma-names = "tx", "rx";
 763                         i2c-scl-internal-delay-ns = <110>;
 764                         status = "disabled";
 765                 };
 766
 767                 i2c5: i2c@e66e0000 {
 768                         #address-cells = <1>;
 769                         #size-cells = <0>;
 770                         compatible = "renesas,i2c-r8a7795",
 771                                      "renesas,rcar-gen3-i2c";
 772                         reg = <0 0xe66e0000 0 0x40>;
 773                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 774                         clocks = <&cpg CPG_MOD 919>;
 775                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 776                         resets = <&cpg 919>;
 777                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 778                         dma-names = "tx", "rx";
 779                         i2c-scl-internal-delay-ns = <110>;
 780                         status = "disabled";
 781                 };
 782
 783                 i2c6: i2c@e66e8000 {
 784                         #address-cells = <1>;
 785                         #size-cells = <0>;
 786                         compatible = "renesas,i2c-r8a7795",
 787                                      "renesas,rcar-gen3-i2c";
 788                         reg = <0 0xe66e8000 0 0x40>;
 789                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 790                         clocks = <&cpg CPG_MOD 918>;
 791                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 792                         resets = <&cpg 918>;
 793                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 794                         dma-names = "tx", "rx";
 795                         i2c-scl-internal-delay-ns = <6>;
 796                         status = "disabled";
 797                 };
 798
 799                 i2c_dvfs: i2c@e60b0000 {
 800                         #address-cells = <1>;
 801                         #size-cells = <0>;
 802                         compatible = "renesas,iic-r8a7795",
 803                                      "renesas,rcar-gen3-iic",
 804                                      "renesas,rmobile-iic";
 805                         reg = <0 0xe60b0000 0 0x425>;
 806                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 807                         clocks = <&cpg CPG_MOD 926>;
 808                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 809                         resets = <&cpg 926>;
 810                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 811                         dma-names = "tx", "rx";
 812                         status = "disabled";
 813                 };
 814
 815                 hscif0: serial@e6540000 {
 816                         compatible = "renesas,hscif-r8a7795",
 817                                      "renesas,rcar-gen3-hscif",
 818                                      "renesas,hscif";
 819                         reg = <0 0xe6540000 0 96>;
 820                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 821                         clocks = <&cpg CPG_MOD 520>,
 822                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 823                                  <&scif_clk>;
 824                         clock-names = "fck", "brg_int", "scif_clk";
 825                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 826                                <&dmac2 0x31>, <&dmac2 0x30>;
 827                         dma-names = "tx", "rx", "tx", "rx";
 828                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 829                         resets = <&cpg 520>;
 830                         status = "disabled";
 831                 };
 832
 833                 hscif1: serial@e6550000 {
 834                         compatible = "renesas,hscif-r8a7795",
 835                                      "renesas,rcar-gen3-hscif",
 836                                      "renesas,hscif";
 837                         reg = <0 0xe6550000 0 96>;
 838                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 839                         clocks = <&cpg CPG_MOD 519>,
 840                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 841                                  <&scif_clk>;
 842                         clock-names = "fck", "brg_int", "scif_clk";
 843                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 844                                <&dmac2 0x33>, <&dmac2 0x32>;
 845                         dma-names = "tx", "rx", "tx", "rx";
 846                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 847                         resets = <&cpg 519>;
 848                         status = "disabled";
 849                 };
 850
 851                 hscif2: serial@e6560000 {
 852                         compatible = "renesas,hscif-r8a7795",
 853                                      "renesas,rcar-gen3-hscif",
 854                                      "renesas,hscif";
 855                         reg = <0 0xe6560000 0 96>;
 856                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 857                         clocks = <&cpg CPG_MOD 518>,
 858                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 859                                  <&scif_clk>;
 860                         clock-names = "fck", "brg_int", "scif_clk";
 861                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 862                                <&dmac2 0x35>, <&dmac2 0x34>;
 863                         dma-names = "tx", "rx", "tx", "rx";
 864                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 865                         resets = <&cpg 518>;
 866                         status = "disabled";
 867                 };
 868
 869                 hscif3: serial@e66a0000 {
 870                         compatible = "renesas,hscif-r8a7795",
 871                                      "renesas,rcar-gen3-hscif",
 872                                      "renesas,hscif";
 873                         reg = <0 0xe66a0000 0 96>;
 874                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 875                         clocks = <&cpg CPG_MOD 517>,
 876                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 877                                  <&scif_clk>;
 878                         clock-names = "fck", "brg_int", "scif_clk";
 879                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 880                         dma-names = "tx", "rx";
 881                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 882                         resets = <&cpg 517>;
 883                         status = "disabled";
 884                 };
 885
 886                 hscif4: serial@e66b0000 {
 887                         compatible = "renesas,hscif-r8a7795",
 888                                      "renesas,rcar-gen3-hscif",
 889                                      "renesas,hscif";
 890                         reg = <0 0xe66b0000 0 96>;
 891                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 892                         clocks = <&cpg CPG_MOD 516>,
 893                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 894                                  <&scif_clk>;
 895                         clock-names = "fck", "brg_int", "scif_clk";
 896                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 897                         dma-names = "tx", "rx";
 898                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 899                         resets = <&cpg 516>;
 900                         status = "disabled";
 901                 };
 902
 903                 hsusb: usb@e6590000 {
 904                         compatible = "renesas,usbhs-r8a7795",
 905                                      "renesas,rcar-gen3-usbhs";
 906                         reg = <0 0xe6590000 0 0x200>;
 907                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 908                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 909                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 910                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 911                         dma-names = "ch0", "ch1", "ch2", "ch3";
 912                         renesas,buswait = <11>;
 913                         phys = <&usb2_phy0 3>;
 914                         phy-names = "usb";
 915                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 916                         resets = <&cpg 704>, <&cpg 703>;
 917                         status = "disabled";
 918                 };
 919
 920                 hsusb3: usb@e659c000 {
 921                         compatible = "renesas,usbhs-r8a7795",
 922                                      "renesas,rcar-gen3-usbhs";
 923                         reg = <0 0xe659c000 0 0x200>;
 924                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 925                         clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
 926                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
 927                                <&usb_dmac3 0>, <&usb_dmac3 1>;
 928                         dma-names = "ch0", "ch1", "ch2", "ch3";
 929                         renesas,buswait = <11>;
 930                         phys = <&usb2_phy3 3>;
 931                         phy-names = "usb";
 932                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 933                         resets = <&cpg 705>, <&cpg 700>;
 934                         status = "disabled";
 935                 };
 936
 937                 usb_dmac0: dma-controller@e65a0000 {
 938                         compatible = "renesas,r8a7795-usb-dmac",
 939                                      "renesas,usb-dmac";
 940                         reg = <0 0xe65a0000 0 0x100>;
 941                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 943                         interrupt-names = "ch0", "ch1";
 944                         clocks = <&cpg CPG_MOD 330>;
 945                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 946                         resets = <&cpg 330>;
 947                         #dma-cells = <1>;
 948                         dma-channels = <2>;
 949                 };
 950
 951                 usb_dmac1: dma-controller@e65b0000 {
 952                         compatible = "renesas,r8a7795-usb-dmac",
 953                                      "renesas,usb-dmac";
 954                         reg = <0 0xe65b0000 0 0x100>;
 955                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 957                         interrupt-names = "ch0", "ch1";
 958                         clocks = <&cpg CPG_MOD 331>;
 959                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 960                         resets = <&cpg 331>;
 961                         #dma-cells = <1>;
 962                         dma-channels = <2>;
 963                 };
 964
 965                 usb_dmac2: dma-controller@e6460000 {
 966                         compatible = "renesas,r8a7795-usb-dmac",
 967                                      "renesas,usb-dmac";
 968                         reg = <0 0xe6460000 0 0x100>;
 969                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 971                         interrupt-names = "ch0", "ch1";
 972                         clocks = <&cpg CPG_MOD 326>;
 973                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 974                         resets = <&cpg 326>;
 975                         #dma-cells = <1>;
 976                         dma-channels = <2>;
 977                 };
 978
 979                 usb_dmac3: dma-controller@e6470000 {
 980                         compatible = "renesas,r8a7795-usb-dmac",
 981                                      "renesas,usb-dmac";
 982                         reg = <0 0xe6470000 0 0x100>;
 983                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 985                         interrupt-names = "ch0", "ch1";
 986                         clocks = <&cpg CPG_MOD 329>;
 987                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 988                         resets = <&cpg 329>;
 989                         #dma-cells = <1>;
 990                         dma-channels = <2>;
 991                 };
 992
 993                 usb3_phy0: usb-phy@e65ee000 {
 994                         compatible = "renesas,r8a7795-usb3-phy",
 995                                      "renesas,rcar-gen3-usb3-phy";
 996                         reg = <0 0xe65ee000 0 0x90>;
 997                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 998                                  <&usb_extal_clk>;
 999                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1000                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1001                         resets = <&cpg 328>;
1002                         #phy-cells = <0>;
1003                         status = "disabled";
1004                 };
1005
1006                 arm_cc630p: crypto@e6601000 {
1007                         compatible = "arm,cryptocell-630p-ree";
1008                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1009                         reg = <0x0 0xe6601000 0 0x1000>;
1010                         clocks = <&cpg CPG_MOD 229>;
1011                         resets = <&cpg 229>;
1012                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1013                 };
1014
1015                 dmac0: dma-controller@e6700000 {
1016                         compatible = "renesas,dmac-r8a7795",
1017                                      "renesas,rcar-dmac";
1018                         reg = <0 0xe6700000 0 0x10000>;
1019                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
1020                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
1021                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
1022                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
1023                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
1024                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
1025                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
1026                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
1027                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
1028                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
1029                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
1030                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1031                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
1032                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
1033                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
1034                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
1035                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
1036                         interrupt-names = "error",
1037                                         "ch0", "ch1", "ch2", "ch3",
1038                                         "ch4", "ch5", "ch6", "ch7",
1039                                         "ch8", "ch9", "ch10", "ch11",
1040                                         "ch12", "ch13", "ch14", "ch15";
1041                         clocks = <&cpg CPG_MOD 219>;
1042                         clock-names = "fck";
1043                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1044                         resets = <&cpg 219>;
1045                         #dma-cells = <1>;
1046                         dma-channels = <16>;
1047                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1048                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1049                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1050                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1051                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1052                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1053                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1054                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1055                 };
1056
1057                 dmac1: dma-controller@e7300000 {
1058                         compatible = "renesas,dmac-r8a7795",
1059                                      "renesas,rcar-dmac";
1060                         reg = <0 0xe7300000 0 0x10000>;
1061                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1062                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1063                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1064                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1065                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1066                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1067                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1068                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1069                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1070                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1071                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1072                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1073                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1074                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1075                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1076                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1077                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1078                         interrupt-names = "error",
1079                                         "ch0", "ch1", "ch2", "ch3",
1080                                         "ch4", "ch5", "ch6", "ch7",
1081                                         "ch8", "ch9", "ch10", "ch11",
1082                                         "ch12", "ch13", "ch14", "ch15";
1083                         clocks = <&cpg CPG_MOD 218>;
1084                         clock-names = "fck";
1085                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1086                         resets = <&cpg 218>;
1087                         #dma-cells = <1>;
1088                         dma-channels = <16>;
1089                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1090                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1091                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1092                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1093                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1094                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1095                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1096                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1097                 };
1098
1099                 dmac2: dma-controller@e7310000 {
1100                         compatible = "renesas,dmac-r8a7795",
1101                                      "renesas,rcar-dmac";
1102                         reg = <0 0xe7310000 0 0x10000>;
1103                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1104                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1105                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1106                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1107                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1108                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1109                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1110                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1111                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1112                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1113                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1114                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1115                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1116                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1117                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1118                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1119                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1120                         interrupt-names = "error",
1121                                         "ch0", "ch1", "ch2", "ch3",
1122                                         "ch4", "ch5", "ch6", "ch7",
1123                                         "ch8", "ch9", "ch10", "ch11",
1124                                         "ch12", "ch13", "ch14", "ch15";
1125                         clocks = <&cpg CPG_MOD 217>;
1126                         clock-names = "fck";
1127                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1128                         resets = <&cpg 217>;
1129                         #dma-cells = <1>;
1130                         dma-channels = <16>;
1131                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1132                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1133                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1134                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1135                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1136                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1137                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1138                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1139                 };
1140
1141                 ipmmu_ds0: iommu@e6740000 {
1142                         compatible = "renesas,ipmmu-r8a7795";
1143                         reg = <0 0xe6740000 0 0x1000>;
1144                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1145                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1146                         #iommu-cells = <1>;
1147                 };
1148
1149                 ipmmu_ds1: iommu@e7740000 {
1150                         compatible = "renesas,ipmmu-r8a7795";
1151                         reg = <0 0xe7740000 0 0x1000>;
1152                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1153                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1154                         #iommu-cells = <1>;
1155                 };
1156
1157                 ipmmu_hc: iommu@e6570000 {
1158                         compatible = "renesas,ipmmu-r8a7795";
1159                         reg = <0 0xe6570000 0 0x1000>;
1160                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1161                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1162                         #iommu-cells = <1>;
1163                 };
1164
1165                 ipmmu_ir: iommu@ff8b0000 {
1166                         compatible = "renesas,ipmmu-r8a7795";
1167                         reg = <0 0xff8b0000 0 0x1000>;
1168                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1169                         power-domains = <&sysc R8A7795_PD_A3IR>;
1170                         #iommu-cells = <1>;
1171                 };
1172
1173                 ipmmu_mm: iommu@e67b0000 {
1174                         compatible = "renesas,ipmmu-r8a7795";
1175                         reg = <0 0xe67b0000 0 0x1000>;
1176                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1177                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1178                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1179                         #iommu-cells = <1>;
1180                 };
1181
1182                 ipmmu_mp0: iommu@ec670000 {
1183                         compatible = "renesas,ipmmu-r8a7795";
1184                         reg = <0 0xec670000 0 0x1000>;
1185                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1186                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1187                         #iommu-cells = <1>;
1188                 };
1189
1190                 ipmmu_pv0: iommu@fd800000 {
1191                         compatible = "renesas,ipmmu-r8a7795";
1192                         reg = <0 0xfd800000 0 0x1000>;
1193                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1194                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1195                         #iommu-cells = <1>;
1196                 };
1197
1198                 ipmmu_pv1: iommu@fd950000 {
1199                         compatible = "renesas,ipmmu-r8a7795";
1200                         reg = <0 0xfd950000 0 0x1000>;
1201                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1202                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1203                         #iommu-cells = <1>;
1204                 };
1205
1206                 ipmmu_pv2: iommu@fd960000 {
1207                         compatible = "renesas,ipmmu-r8a7795";
1208                         reg = <0 0xfd960000 0 0x1000>;
1209                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1210                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1211                         #iommu-cells = <1>;
1212                 };
1213
1214                 ipmmu_pv3: iommu@fd970000 {
1215                         compatible = "renesas,ipmmu-r8a7795";
1216                         reg = <0 0xfd970000 0 0x1000>;
1217                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1219                         #iommu-cells = <1>;
1220                 };
1221
1222                 ipmmu_rt: iommu@ffc80000 {
1223                         compatible = "renesas,ipmmu-r8a7795";
1224                         reg = <0 0xffc80000 0 0x1000>;
1225                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1226                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1227                         #iommu-cells = <1>;
1228                 };
1229
1230                 ipmmu_vc0: iommu@fe6b0000 {
1231                         compatible = "renesas,ipmmu-r8a7795";
1232                         reg = <0 0xfe6b0000 0 0x1000>;
1233                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1234                         power-domains = <&sysc R8A7795_PD_A3VC>;
1235                         #iommu-cells = <1>;
1236                 };
1237
1238                 ipmmu_vc1: iommu@fe6f0000 {
1239                         compatible = "renesas,ipmmu-r8a7795";
1240                         reg = <0 0xfe6f0000 0 0x1000>;
1241                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1242                         power-domains = <&sysc R8A7795_PD_A3VC>;
1243                         #iommu-cells = <1>;
1244                 };
1245
1246                 ipmmu_vi0: iommu@febd0000 {
1247                         compatible = "renesas,ipmmu-r8a7795";
1248                         reg = <0 0xfebd0000 0 0x1000>;
1249                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1250                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1251                         #iommu-cells = <1>;
1252                 };
1253
1254                 ipmmu_vi1: iommu@febe0000 {
1255                         compatible = "renesas,ipmmu-r8a7795";
1256                         reg = <0 0xfebe0000 0 0x1000>;
1257                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1258                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1259                         #iommu-cells = <1>;
1260                 };
1261
1262                 ipmmu_vp0: iommu@fe990000 {
1263                         compatible = "renesas,ipmmu-r8a7795";
1264                         reg = <0 0xfe990000 0 0x1000>;
1265                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1266                         power-domains = <&sysc R8A7795_PD_A3VP>;
1267                         #iommu-cells = <1>;
1268                 };
1269
1270                 ipmmu_vp1: iommu@fe980000 {
1271                         compatible = "renesas,ipmmu-r8a7795";
1272                         reg = <0 0xfe980000 0 0x1000>;
1273                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1274                         power-domains = <&sysc R8A7795_PD_A3VP>;
1275                         #iommu-cells = <1>;
1276                 };
1277
1278                 avb: ethernet@e6800000 {
1279                         compatible = "renesas,etheravb-r8a7795",
1280                                      "renesas,etheravb-rcar-gen3";
1281                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1282                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1283                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1284                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1285                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1286                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1287                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1288                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1289                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1290                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1291                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1292                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1293                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1294                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1295                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1296                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1297                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1298                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1299                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1300                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1301                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1302                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1303                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1304                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1305                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1306                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1307                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1308                                           "ch4", "ch5", "ch6", "ch7",
1309                                           "ch8", "ch9", "ch10", "ch11",
1310                                           "ch12", "ch13", "ch14", "ch15",
1311                                           "ch16", "ch17", "ch18", "ch19",
1312                                           "ch20", "ch21", "ch22", "ch23",
1313                                           "ch24";
1314                         clocks = <&cpg CPG_MOD 812>;
1315                         clock-names = "fck";
1316                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1317                         resets = <&cpg 812>;
1318                         phy-mode = "rgmii";
1319                         rx-internal-delay-ps = <0>;
1320                         tx-internal-delay-ps = <0>;
1321                         iommus = <&ipmmu_ds0 16>;
1322                         #address-cells = <1>;
1323                         #size-cells = <0>;
1324                         status = "disabled";
1325                 };
1326
1327                 can0: can@e6c30000 {
1328                         compatible = "renesas,can-r8a7795",
1329                                      "renesas,rcar-gen3-can";
1330                         reg = <0 0xe6c30000 0 0x1000>;
1331                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1332                         clocks = <&cpg CPG_MOD 916>,
1333                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1334                                <&can_clk>;
1335                         clock-names = "clkp1", "clkp2", "can_clk";
1336                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1337                         assigned-clock-rates = <40000000>;
1338                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1339                         resets = <&cpg 916>;
1340                         status = "disabled";
1341                 };
1342
1343                 can1: can@e6c38000 {
1344                         compatible = "renesas,can-r8a7795",
1345                                      "renesas,rcar-gen3-can";
1346                         reg = <0 0xe6c38000 0 0x1000>;
1347                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1348                         clocks = <&cpg CPG_MOD 915>,
1349                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1350                                <&can_clk>;
1351                         clock-names = "clkp1", "clkp2", "can_clk";
1352                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1353                         assigned-clock-rates = <40000000>;
1354                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1355                         resets = <&cpg 915>;
1356                         status = "disabled";
1357                 };
1358
1359                 canfd: can@e66c0000 {
1360                         compatible = "renesas,r8a7795-canfd",
1361                                      "renesas,rcar-gen3-canfd";
1362                         reg = <0 0xe66c0000 0 0x8000>;
1363                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1364                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1365                         clocks = <&cpg CPG_MOD 914>,
1366                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1367                                <&can_clk>;
1368                         clock-names = "fck", "canfd", "can_clk";
1369                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1370                         assigned-clock-rates = <40000000>;
1371                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1372                         resets = <&cpg 914>;
1373                         status = "disabled";
1374
1375                         channel0 {
1376                                 status = "disabled";
1377                         };
1378
1379                         channel1 {
1380                                 status = "disabled";
1381                         };
1382                 };
1383
1384                 pwm0: pwm@e6e30000 {
1385                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1386                         reg = <0 0xe6e30000 0 0x8>;
1387                         clocks = <&cpg CPG_MOD 523>;
1388                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1389                         resets = <&cpg 523>;
1390                         #pwm-cells = <2>;
1391                         status = "disabled";
1392                 };
1393
1394                 pwm1: pwm@e6e31000 {
1395                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1396                         reg = <0 0xe6e31000 0 0x8>;
1397                         clocks = <&cpg CPG_MOD 523>;
1398                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1399                         resets = <&cpg 523>;
1400                         #pwm-cells = <2>;
1401                         status = "disabled";
1402                 };
1403
1404                 pwm2: pwm@e6e32000 {
1405                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1406                         reg = <0 0xe6e32000 0 0x8>;
1407                         clocks = <&cpg CPG_MOD 523>;
1408                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1409                         resets = <&cpg 523>;
1410                         #pwm-cells = <2>;
1411                         status = "disabled";
1412                 };
1413
1414                 pwm3: pwm@e6e33000 {
1415                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1416                         reg = <0 0xe6e33000 0 0x8>;
1417                         clocks = <&cpg CPG_MOD 523>;
1418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1419                         resets = <&cpg 523>;
1420                         #pwm-cells = <2>;
1421                         status = "disabled";
1422                 };
1423
1424                 pwm4: pwm@e6e34000 {
1425                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1426                         reg = <0 0xe6e34000 0 0x8>;
1427                         clocks = <&cpg CPG_MOD 523>;
1428                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1429                         resets = <&cpg 523>;
1430                         #pwm-cells = <2>;
1431                         status = "disabled";
1432                 };
1433
1434                 pwm5: pwm@e6e35000 {
1435                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1436                         reg = <0 0xe6e35000 0 0x8>;
1437                         clocks = <&cpg CPG_MOD 523>;
1438                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1439                         resets = <&cpg 523>;
1440                         #pwm-cells = <2>;
1441                         status = "disabled";
1442                 };
1443
1444                 pwm6: pwm@e6e36000 {
1445                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1446                         reg = <0 0xe6e36000 0 0x8>;
1447                         clocks = <&cpg CPG_MOD 523>;
1448                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1449                         resets = <&cpg 523>;
1450                         #pwm-cells = <2>;
1451                         status = "disabled";
1452                 };
1453
1454                 scif0: serial@e6e60000 {
1455                         compatible = "renesas,scif-r8a7795",
1456                                      "renesas,rcar-gen3-scif", "renesas,scif";
1457                         reg = <0 0xe6e60000 0 64>;
1458                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1459                         clocks = <&cpg CPG_MOD 207>,
1460                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1461                                  <&scif_clk>;
1462                         clock-names = "fck", "brg_int", "scif_clk";
1463                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1464                                <&dmac2 0x51>, <&dmac2 0x50>;
1465                         dma-names = "tx", "rx", "tx", "rx";
1466                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1467                         resets = <&cpg 207>;
1468                         status = "disabled";
1469                 };
1470
1471                 scif1: serial@e6e68000 {
1472                         compatible = "renesas,scif-r8a7795",
1473                                      "renesas,rcar-gen3-scif", "renesas,scif";
1474                         reg = <0 0xe6e68000 0 64>;
1475                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1476                         clocks = <&cpg CPG_MOD 206>,
1477                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1478                                  <&scif_clk>;
1479                         clock-names = "fck", "brg_int", "scif_clk";
1480                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1481                                <&dmac2 0x53>, <&dmac2 0x52>;
1482                         dma-names = "tx", "rx", "tx", "rx";
1483                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1484                         resets = <&cpg 206>;
1485                         status = "disabled";
1486                 };
1487
1488                 scif2: serial@e6e88000 {
1489                         compatible = "renesas,scif-r8a7795",
1490                                      "renesas,rcar-gen3-scif", "renesas,scif";
1491                         reg = <0 0xe6e88000 0 64>;
1492                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1493                         clocks = <&cpg CPG_MOD 310>,
1494                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1495                                  <&scif_clk>;
1496                         clock-names = "fck", "brg_int", "scif_clk";
1497                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1498                                <&dmac2 0x13>, <&dmac2 0x12>;
1499                         dma-names = "tx", "rx", "tx", "rx";
1500                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1501                         resets = <&cpg 310>;
1502                         status = "disabled";
1503                 };
1504
1505                 scif3: serial@e6c50000 {
1506                         compatible = "renesas,scif-r8a7795",
1507                                      "renesas,rcar-gen3-scif", "renesas,scif";
1508                         reg = <0 0xe6c50000 0 64>;
1509                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1510                         clocks = <&cpg CPG_MOD 204>,
1511                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1512                                  <&scif_clk>;
1513                         clock-names = "fck", "brg_int", "scif_clk";
1514                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1515                         dma-names = "tx", "rx";
1516                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1517                         resets = <&cpg 204>;
1518                         status = "disabled";
1519                 };
1520
1521                 scif4: serial@e6c40000 {
1522                         compatible = "renesas,scif-r8a7795",
1523                                      "renesas,rcar-gen3-scif", "renesas,scif";
1524                         reg = <0 0xe6c40000 0 64>;
1525                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1526                         clocks = <&cpg CPG_MOD 203>,
1527                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1528                                  <&scif_clk>;
1529                         clock-names = "fck", "brg_int", "scif_clk";
1530                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1531                         dma-names = "tx", "rx";
1532                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1533                         resets = <&cpg 203>;
1534                         status = "disabled";
1535                 };
1536
1537                 scif5: serial@e6f30000 {
1538                         compatible = "renesas,scif-r8a7795",
1539                                      "renesas,rcar-gen3-scif", "renesas,scif";
1540                         reg = <0 0xe6f30000 0 64>;
1541                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1542                         clocks = <&cpg CPG_MOD 202>,
1543                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1544                                  <&scif_clk>;
1545                         clock-names = "fck", "brg_int", "scif_clk";
1546                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1547                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1548                         dma-names = "tx", "rx", "tx", "rx";
1549                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1550                         resets = <&cpg 202>;
1551                         status = "disabled";
1552                 };
1553
1554                 tpu: pwm@e6e80000 {
1555                         compatible = "renesas,tpu-r8a7795", "renesas,tpu";
1556                         reg = <0 0xe6e80000 0 0x148>;
1557                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1558                         clocks = <&cpg CPG_MOD 304>;
1559                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1560                         resets = <&cpg 304>;
1561                         #pwm-cells = <3>;
1562                         status = "disabled";
1563                 };
1564
1565                 msiof0: spi@e6e90000 {
1566                         compatible = "renesas,msiof-r8a7795",
1567                                      "renesas,rcar-gen3-msiof";
1568                         reg = <0 0xe6e90000 0 0x0064>;
1569                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1570                         clocks = <&cpg CPG_MOD 211>;
1571                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1572                                <&dmac2 0x41>, <&dmac2 0x40>;
1573                         dma-names = "tx", "rx", "tx", "rx";
1574                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1575                         resets = <&cpg 211>;
1576                         #address-cells = <1>;
1577                         #size-cells = <0>;
1578                         status = "disabled";
1579                 };
1580
1581                 msiof1: spi@e6ea0000 {
1582                         compatible = "renesas,msiof-r8a7795",
1583                                      "renesas,rcar-gen3-msiof";
1584                         reg = <0 0xe6ea0000 0 0x0064>;
1585                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1586                         clocks = <&cpg CPG_MOD 210>;
1587                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1588                                <&dmac2 0x43>, <&dmac2 0x42>;
1589                         dma-names = "tx", "rx", "tx", "rx";
1590                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1591                         resets = <&cpg 210>;
1592                         #address-cells = <1>;
1593                         #size-cells = <0>;
1594                         status = "disabled";
1595                 };
1596
1597                 msiof2: spi@e6c00000 {
1598                         compatible = "renesas,msiof-r8a7795",
1599                                      "renesas,rcar-gen3-msiof";
1600                         reg = <0 0xe6c00000 0 0x0064>;
1601                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1602                         clocks = <&cpg CPG_MOD 209>;
1603                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1604                         dma-names = "tx", "rx";
1605                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1606                         resets = <&cpg 209>;
1607                         #address-cells = <1>;
1608                         #size-cells = <0>;
1609                         status = "disabled";
1610                 };
1611
1612                 msiof3: spi@e6c10000 {
1613                         compatible = "renesas,msiof-r8a7795",
1614                                      "renesas,rcar-gen3-msiof";
1615                         reg = <0 0xe6c10000 0 0x0064>;
1616                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1617                         clocks = <&cpg CPG_MOD 208>;
1618                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1619                         dma-names = "tx", "rx";
1620                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1621                         resets = <&cpg 208>;
1622                         #address-cells = <1>;
1623                         #size-cells = <0>;
1624                         status = "disabled";
1625                 };
1626
1627                 vin0: video@e6ef0000 {
1628                         compatible = "renesas,vin-r8a7795";
1629                         reg = <0 0xe6ef0000 0 0x1000>;
1630                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1631                         clocks = <&cpg CPG_MOD 811>;
1632                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1633                         resets = <&cpg 811>;
1634                         renesas,id = <0>;
1635                         status = "disabled";
1636
1637                         ports {
1638                                 #address-cells = <1>;
1639                                 #size-cells = <0>;
1640
1641                                 port@1 {
1642                                         #address-cells = <1>;
1643                                         #size-cells = <0>;
1644
1645                                         reg = <1>;
1646
1647                                         vin0csi20: endpoint@0 {
1648                                                 reg = <0>;
1649                                                 remote-endpoint = <&csi20vin0>;
1650                                         };
1651                                         vin0csi40: endpoint@2 {
1652                                                 reg = <2>;
1653                                                 remote-endpoint = <&csi40vin0>;
1654                                         };
1655                                 };
1656                         };
1657                 };
1658
1659                 vin1: video@e6ef1000 {
1660                         compatible = "renesas,vin-r8a7795";
1661                         reg = <0 0xe6ef1000 0 0x1000>;
1662                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1663                         clocks = <&cpg CPG_MOD 810>;
1664                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1665                         resets = <&cpg 810>;
1666                         renesas,id = <1>;
1667                         status = "disabled";
1668
1669                         ports {
1670                                 #address-cells = <1>;
1671                                 #size-cells = <0>;
1672
1673                                 port@1 {
1674                                         #address-cells = <1>;
1675                                         #size-cells = <0>;
1676
1677                                         reg = <1>;
1678
1679                                         vin1csi20: endpoint@0 {
1680                                                 reg = <0>;
1681                                                 remote-endpoint = <&csi20vin1>;
1682                                         };
1683                                         vin1csi40: endpoint@2 {
1684                                                 reg = <2>;
1685                                                 remote-endpoint = <&csi40vin1>;
1686                                         };
1687                                 };
1688                         };
1689                 };
1690
1691                 vin2: video@e6ef2000 {
1692                         compatible = "renesas,vin-r8a7795";
1693                         reg = <0 0xe6ef2000 0 0x1000>;
1694                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1695                         clocks = <&cpg CPG_MOD 809>;
1696                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1697                         resets = <&cpg 809>;
1698                         renesas,id = <2>;
1699                         status = "disabled";
1700
1701                         ports {
1702                                 #address-cells = <1>;
1703                                 #size-cells = <0>;
1704
1705                                 port@1 {
1706                                         #address-cells = <1>;
1707                                         #size-cells = <0>;
1708
1709                                         reg = <1>;
1710
1711                                         vin2csi20: endpoint@0 {
1712                                                 reg = <0>;
1713                                                 remote-endpoint = <&csi20vin2>;
1714                                         };
1715                                         vin2csi40: endpoint@2 {
1716                                                 reg = <2>;
1717                                                 remote-endpoint = <&csi40vin2>;
1718                                         };
1719                                 };
1720                         };
1721                 };
1722
1723                 vin3: video@e6ef3000 {
1724                         compatible = "renesas,vin-r8a7795";
1725                         reg = <0 0xe6ef3000 0 0x1000>;
1726                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1727                         clocks = <&cpg CPG_MOD 808>;
1728                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1729                         resets = <&cpg 808>;
1730                         renesas,id = <3>;
1731                         status = "disabled";
1732
1733                         ports {
1734                                 #address-cells = <1>;
1735                                 #size-cells = <0>;
1736
1737                                 port@1 {
1738                                         #address-cells = <1>;
1739                                         #size-cells = <0>;
1740
1741                                         reg = <1>;
1742
1743                                         vin3csi20: endpoint@0 {
1744                                                 reg = <0>;
1745                                                 remote-endpoint = <&csi20vin3>;
1746                                         };
1747                                         vin3csi40: endpoint@2 {
1748                                                 reg = <2>;
1749                                                 remote-endpoint = <&csi40vin3>;
1750                                         };
1751                                 };
1752                         };
1753                 };
1754
1755                 vin4: video@e6ef4000 {
1756                         compatible = "renesas,vin-r8a7795";
1757                         reg = <0 0xe6ef4000 0 0x1000>;
1758                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1759                         clocks = <&cpg CPG_MOD 807>;
1760                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1761                         resets = <&cpg 807>;
1762                         renesas,id = <4>;
1763                         status = "disabled";
1764
1765                         ports {
1766                                 #address-cells = <1>;
1767                                 #size-cells = <0>;
1768
1769                                 port@1 {
1770                                         #address-cells = <1>;
1771                                         #size-cells = <0>;
1772
1773                                         reg = <1>;
1774
1775                                         vin4csi20: endpoint@0 {
1776                                                 reg = <0>;
1777                                                 remote-endpoint = <&csi20vin4>;
1778                                         };
1779                                         vin4csi41: endpoint@3 {
1780                                                 reg = <3>;
1781                                                 remote-endpoint = <&csi41vin4>;
1782                                         };
1783                                 };
1784                         };
1785                 };
1786
1787                 vin5: video@e6ef5000 {
1788                         compatible = "renesas,vin-r8a7795";
1789                         reg = <0 0xe6ef5000 0 0x1000>;
1790                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1791                         clocks = <&cpg CPG_MOD 806>;
1792                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1793                         resets = <&cpg 806>;
1794                         renesas,id = <5>;
1795                         status = "disabled";
1796
1797                         ports {
1798                                 #address-cells = <1>;
1799                                 #size-cells = <0>;
1800
1801                                 port@1 {
1802                                         #address-cells = <1>;
1803                                         #size-cells = <0>;
1804
1805                                         reg = <1>;
1806
1807                                         vin5csi20: endpoint@0 {
1808                                                 reg = <0>;
1809                                                 remote-endpoint = <&csi20vin5>;
1810                                         };
1811                                         vin5csi41: endpoint@3 {
1812                                                 reg = <3>;
1813                                                 remote-endpoint = <&csi41vin5>;
1814                                         };
1815                                 };
1816                         };
1817                 };
1818
1819                 vin6: video@e6ef6000 {
1820                         compatible = "renesas,vin-r8a7795";
1821                         reg = <0 0xe6ef6000 0 0x1000>;
1822                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1823                         clocks = <&cpg CPG_MOD 805>;
1824                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1825                         resets = <&cpg 805>;
1826                         renesas,id = <6>;
1827                         status = "disabled";
1828
1829                         ports {
1830                                 #address-cells = <1>;
1831                                 #size-cells = <0>;
1832
1833                                 port@1 {
1834                                         #address-cells = <1>;
1835                                         #size-cells = <0>;
1836
1837                                         reg = <1>;
1838
1839                                         vin6csi20: endpoint@0 {
1840                                                 reg = <0>;
1841                                                 remote-endpoint = <&csi20vin6>;
1842                                         };
1843                                         vin6csi41: endpoint@3 {
1844                                                 reg = <3>;
1845                                                 remote-endpoint = <&csi41vin6>;
1846                                         };
1847                                 };
1848                         };
1849                 };
1850
1851                 vin7: video@e6ef7000 {
1852                         compatible = "renesas,vin-r8a7795";
1853                         reg = <0 0xe6ef7000 0 0x1000>;
1854                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1855                         clocks = <&cpg CPG_MOD 804>;
1856                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1857                         resets = <&cpg 804>;
1858                         renesas,id = <7>;
1859                         status = "disabled";
1860
1861                         ports {
1862                                 #address-cells = <1>;
1863                                 #size-cells = <0>;
1864
1865                                 port@1 {
1866                                         #address-cells = <1>;
1867                                         #size-cells = <0>;
1868
1869                                         reg = <1>;
1870
1871                                         vin7csi20: endpoint@0 {
1872                                                 reg = <0>;
1873                                                 remote-endpoint = <&csi20vin7>;
1874                                         };
1875                                         vin7csi41: endpoint@3 {
1876                                                 reg = <3>;
1877                                                 remote-endpoint = <&csi41vin7>;
1878                                         };
1879                                 };
1880                         };
1881                 };
1882
1883                 drif00: rif@e6f40000 {
1884                         compatible = "renesas,r8a7795-drif",
1885                                      "renesas,rcar-gen3-drif";
1886                         reg = <0 0xe6f40000 0 0x64>;
1887                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1888                         clocks = <&cpg CPG_MOD 515>;
1889                         clock-names = "fck";
1890                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1891                         dma-names = "rx", "rx";
1892                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1893                         resets = <&cpg 515>;
1894                         renesas,bonding = <&drif01>;
1895                         status = "disabled";
1896                 };
1897
1898                 drif01: rif@e6f50000 {
1899                         compatible = "renesas,r8a7795-drif",
1900                                      "renesas,rcar-gen3-drif";
1901                         reg = <0 0xe6f50000 0 0x64>;
1902                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1903                         clocks = <&cpg CPG_MOD 514>;
1904                         clock-names = "fck";
1905                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1906                         dma-names = "rx", "rx";
1907                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1908                         resets = <&cpg 514>;
1909                         renesas,bonding = <&drif00>;
1910                         status = "disabled";
1911                 };
1912
1913                 drif10: rif@e6f60000 {
1914                         compatible = "renesas,r8a7795-drif",
1915                                      "renesas,rcar-gen3-drif";
1916                         reg = <0 0xe6f60000 0 0x64>;
1917                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1918                         clocks = <&cpg CPG_MOD 513>;
1919                         clock-names = "fck";
1920                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1921                         dma-names = "rx", "rx";
1922                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1923                         resets = <&cpg 513>;
1924                         renesas,bonding = <&drif11>;
1925                         status = "disabled";
1926                 };
1927
1928                 drif11: rif@e6f70000 {
1929                         compatible = "renesas,r8a7795-drif",
1930                                      "renesas,rcar-gen3-drif";
1931                         reg = <0 0xe6f70000 0 0x64>;
1932                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1933                         clocks = <&cpg CPG_MOD 512>;
1934                         clock-names = "fck";
1935                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1936                         dma-names = "rx", "rx";
1937                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1938                         resets = <&cpg 512>;
1939                         renesas,bonding = <&drif10>;
1940                         status = "disabled";
1941                 };
1942
1943                 drif20: rif@e6f80000 {
1944                         compatible = "renesas,r8a7795-drif",
1945                                      "renesas,rcar-gen3-drif";
1946                         reg = <0 0xe6f80000 0 0x64>;
1947                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1948                         clocks = <&cpg CPG_MOD 511>;
1949                         clock-names = "fck";
1950                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1951                         dma-names = "rx", "rx";
1952                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1953                         resets = <&cpg 511>;
1954                         renesas,bonding = <&drif21>;
1955                         status = "disabled";
1956                 };
1957
1958                 drif21: rif@e6f90000 {
1959                         compatible = "renesas,r8a7795-drif",
1960                                      "renesas,rcar-gen3-drif";
1961                         reg = <0 0xe6f90000 0 0x64>;
1962                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1963                         clocks = <&cpg CPG_MOD 510>;
1964                         clock-names = "fck";
1965                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1966                         dma-names = "rx", "rx";
1967                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1968                         resets = <&cpg 510>;
1969                         renesas,bonding = <&drif20>;
1970                         status = "disabled";
1971                 };
1972
1973                 drif30: rif@e6fa0000 {
1974                         compatible = "renesas,r8a7795-drif",
1975                                      "renesas,rcar-gen3-drif";
1976                         reg = <0 0xe6fa0000 0 0x64>;
1977                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1978                         clocks = <&cpg CPG_MOD 509>;
1979                         clock-names = "fck";
1980                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1981                         dma-names = "rx", "rx";
1982                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1983                         resets = <&cpg 509>;
1984                         renesas,bonding = <&drif31>;
1985                         status = "disabled";
1986                 };
1987
1988                 drif31: rif@e6fb0000 {
1989                         compatible = "renesas,r8a7795-drif",
1990                                      "renesas,rcar-gen3-drif";
1991                         reg = <0 0xe6fb0000 0 0x64>;
1992                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1993                         clocks = <&cpg CPG_MOD 508>;
1994                         clock-names = "fck";
1995                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1996                         dma-names = "rx", "rx";
1997                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1998                         resets = <&cpg 508>;
1999                         renesas,bonding = <&drif30>;
2000                         status = "disabled";
2001                 };
2002
2003                 rcar_sound: sound@ec500000 {
2004                         /*
2005                          * #sound-dai-cells is required
2006                          *
2007                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2008                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
2009                          */
2010                         /*
2011                          * #clock-cells is required for audio_clkout0/1/2/3
2012                          *
2013                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
2014                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
2015                          */
2016                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
2017                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
2018                                 <0 0xec5a0000 0 0x100>,  /* ADG */
2019                                 <0 0xec540000 0 0x1000>, /* SSIU */
2020                                 <0 0xec541000 0 0x280>,  /* SSI */
2021                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
2022                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
2023
2024                         clocks = <&cpg CPG_MOD 1005>,
2025                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
2026                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
2027                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
2028                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
2029                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
2030                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
2031                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
2032                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
2033                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
2034                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
2035                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
2036                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
2037                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
2038                                  <&audio_clk_a>, <&audio_clk_b>,
2039                                  <&audio_clk_c>,
2040                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
2041                         clock-names = "ssi-all",
2042                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
2043                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
2044                                       "ssi.1", "ssi.0",
2045                                       "src.9", "src.8", "src.7", "src.6",
2046                                       "src.5", "src.4", "src.3", "src.2",
2047                                       "src.1", "src.0",
2048                                       "mix.1", "mix.0",
2049                                       "ctu.1", "ctu.0",
2050                                       "dvc.0", "dvc.1",
2051                                       "clk_a", "clk_b", "clk_c", "clk_i";
2052                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2053                         resets = <&cpg 1005>,
2054                                  <&cpg 1006>, <&cpg 1007>,
2055                                  <&cpg 1008>, <&cpg 1009>,
2056                                  <&cpg 1010>, <&cpg 1011>,
2057                                  <&cpg 1012>, <&cpg 1013>,
2058                                  <&cpg 1014>, <&cpg 1015>;
2059                         reset-names = "ssi-all",
2060                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
2061                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
2062                                       "ssi.1", "ssi.0";
2063                         status = "disabled";
2064
2065                         rcar_sound,dvc {
2066                                 dvc0: dvc-0 {
2067                                         dmas = <&audma1 0xbc>;
2068                                         dma-names = "tx";
2069                                 };
2070                                 dvc1: dvc-1 {
2071                                         dmas = <&audma1 0xbe>;
2072                                         dma-names = "tx";
2073                                 };
2074                         };
2075
2076                         rcar_sound,mix {
2077                                 mix0: mix-0 { };
2078                                 mix1: mix-1 { };
2079                         };
2080
2081                         rcar_sound,ctu {
2082                                 ctu00: ctu-0 { };
2083                                 ctu01: ctu-1 { };
2084                                 ctu02: ctu-2 { };
2085                                 ctu03: ctu-3 { };
2086                                 ctu10: ctu-4 { };
2087                                 ctu11: ctu-5 { };
2088                                 ctu12: ctu-6 { };
2089                                 ctu13: ctu-7 { };
2090                         };
2091
2092                         rcar_sound,src {
2093                                 src0: src-0 {
2094                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
2095                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
2096                                         dma-names = "rx", "tx";
2097                                 };
2098                                 src1: src-1 {
2099                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
2100                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
2101                                         dma-names = "rx", "tx";
2102                                 };
2103                                 src2: src-2 {
2104                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
2105                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
2106                                         dma-names = "rx", "tx";
2107                                 };
2108                                 src3: src-3 {
2109                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
2110                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2111                                         dma-names = "rx", "tx";
2112                                 };
2113                                 src4: src-4 {
2114                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
2115                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2116                                         dma-names = "rx", "tx";
2117                                 };
2118                                 src5: src-5 {
2119                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
2120                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2121                                         dma-names = "rx", "tx";
2122                                 };
2123                                 src6: src-6 {
2124                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2125                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
2126                                         dma-names = "rx", "tx";
2127                                 };
2128                                 src7: src-7 {
2129                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2130                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
2131                                         dma-names = "rx", "tx";
2132                                 };
2133                                 src8: src-8 {
2134                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2135                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
2136                                         dma-names = "rx", "tx";
2137                                 };
2138                                 src9: src-9 {
2139                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2140                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
2141                                         dma-names = "rx", "tx";
2142                                 };
2143                         };
2144
2145                         rcar_sound,ssiu {
2146                                 ssiu00: ssiu-0 {
2147                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
2148                                         dma-names = "rx", "tx";
2149                                 };
2150                                 ssiu01: ssiu-1 {
2151                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
2152                                         dma-names = "rx", "tx";
2153                                 };
2154                                 ssiu02: ssiu-2 {
2155                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
2156                                         dma-names = "rx", "tx";
2157                                 };
2158                                 ssiu03: ssiu-3 {
2159                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
2160                                         dma-names = "rx", "tx";
2161                                 };
2162                                 ssiu04: ssiu-4 {
2163                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
2164                                         dma-names = "rx", "tx";
2165                                 };
2166                                 ssiu05: ssiu-5 {
2167                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
2168                                         dma-names = "rx", "tx";
2169                                 };
2170                                 ssiu06: ssiu-6 {
2171                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
2172                                         dma-names = "rx", "tx";
2173                                 };
2174                                 ssiu07: ssiu-7 {
2175                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
2176                                         dma-names = "rx", "tx";
2177                                 };
2178                                 ssiu10: ssiu-8 {
2179                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
2180                                         dma-names = "rx", "tx";
2181                                 };
2182                                 ssiu11: ssiu-9 {
2183                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2184                                         dma-names = "rx", "tx";
2185                                 };
2186                                 ssiu12: ssiu-10 {
2187                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
2188                                         dma-names = "rx", "tx";
2189                                 };
2190                                 ssiu13: ssiu-11 {
2191                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
2192                                         dma-names = "rx", "tx";
2193                                 };
2194                                 ssiu14: ssiu-12 {
2195                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
2196                                         dma-names = "rx", "tx";
2197                                 };
2198                                 ssiu15: ssiu-13 {
2199                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2200                                         dma-names = "rx", "tx";
2201                                 };
2202                                 ssiu16: ssiu-14 {
2203                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2204                                         dma-names = "rx", "tx";
2205                                 };
2206                                 ssiu17: ssiu-15 {
2207                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2208                                         dma-names = "rx", "tx";
2209                                 };
2210                                 ssiu20: ssiu-16 {
2211                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2212                                         dma-names = "rx", "tx";
2213                                 };
2214                                 ssiu21: ssiu-17 {
2215                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2216                                         dma-names = "rx", "tx";
2217                                 };
2218                                 ssiu22: ssiu-18 {
2219                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2220                                         dma-names = "rx", "tx";
2221                                 };
2222                                 ssiu23: ssiu-19 {
2223                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2224                                         dma-names = "rx", "tx";
2225                                 };
2226                                 ssiu24: ssiu-20 {
2227                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2228                                         dma-names = "rx", "tx";
2229                                 };
2230                                 ssiu25: ssiu-21 {
2231                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2232                                         dma-names = "rx", "tx";
2233                                 };
2234                                 ssiu26: ssiu-22 {
2235                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2236                                         dma-names = "rx", "tx";
2237                                 };
2238                                 ssiu27: ssiu-23 {
2239                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2240                                         dma-names = "rx", "tx";
2241                                 };
2242                                 ssiu30: ssiu-24 {
2243                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2244                                         dma-names = "rx", "tx";
2245                                 };
2246                                 ssiu31: ssiu-25 {
2247                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2248                                         dma-names = "rx", "tx";
2249                                 };
2250                                 ssiu32: ssiu-26 {
2251                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2252                                         dma-names = "rx", "tx";
2253                                 };
2254                                 ssiu33: ssiu-27 {
2255                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2256                                         dma-names = "rx", "tx";
2257                                 };
2258                                 ssiu34: ssiu-28 {
2259                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2260                                         dma-names = "rx", "tx";
2261                                 };
2262                                 ssiu35: ssiu-29 {
2263                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2264                                         dma-names = "rx", "tx";
2265                                 };
2266                                 ssiu36: ssiu-30 {
2267                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2268                                         dma-names = "rx", "tx";
2269                                 };
2270                                 ssiu37: ssiu-31 {
2271                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2272                                         dma-names = "rx", "tx";
2273                                 };
2274                                 ssiu40: ssiu-32 {
2275                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
2276                                         dma-names = "rx", "tx";
2277                                 };
2278                                 ssiu41: ssiu-33 {
2279                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2280                                         dma-names = "rx", "tx";
2281                                 };
2282                                 ssiu42: ssiu-34 {
2283                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2284                                         dma-names = "rx", "tx";
2285                                 };
2286                                 ssiu43: ssiu-35 {
2287                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2288                                         dma-names = "rx", "tx";
2289                                 };
2290                                 ssiu44: ssiu-36 {
2291                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2292                                         dma-names = "rx", "tx";
2293                                 };
2294                                 ssiu45: ssiu-37 {
2295                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2296                                         dma-names = "rx", "tx";
2297                                 };
2298                                 ssiu46: ssiu-38 {
2299                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2300                                         dma-names = "rx", "tx";
2301                                 };
2302                                 ssiu47: ssiu-39 {
2303                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2304                                         dma-names = "rx", "tx";
2305                                 };
2306                                 ssiu50: ssiu-40 {
2307                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2308                                         dma-names = "rx", "tx";
2309                                 };
2310                                 ssiu60: ssiu-41 {
2311                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2312                                         dma-names = "rx", "tx";
2313                                 };
2314                                 ssiu70: ssiu-42 {
2315                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2316                                         dma-names = "rx", "tx";
2317                                 };
2318                                 ssiu80: ssiu-43 {
2319                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2320                                         dma-names = "rx", "tx";
2321                                 };
2322                                 ssiu90: ssiu-44 {
2323                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2324                                         dma-names = "rx", "tx";
2325                                 };
2326                                 ssiu91: ssiu-45 {
2327                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2328                                         dma-names = "rx", "tx";
2329                                 };
2330                                 ssiu92: ssiu-46 {
2331                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2332                                         dma-names = "rx", "tx";
2333                                 };
2334                                 ssiu93: ssiu-47 {
2335                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2336                                         dma-names = "rx", "tx";
2337                                 };
2338                                 ssiu94: ssiu-48 {
2339                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2340                                         dma-names = "rx", "tx";
2341                                 };
2342                                 ssiu95: ssiu-49 {
2343                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2344                                         dma-names = "rx", "tx";
2345                                 };
2346                                 ssiu96: ssiu-50 {
2347                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2348                                         dma-names = "rx", "tx";
2349                                 };
2350                                 ssiu97: ssiu-51 {
2351                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2352                                         dma-names = "rx", "tx";
2353                                 };
2354                         };
2355
2356                         rcar_sound,ssi {
2357                                 ssi0: ssi-0 {
2358                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2359                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2360                                         dma-names = "rx", "tx";
2361                                 };
2362                                 ssi1: ssi-1 {
2363                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2364                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2365                                         dma-names = "rx", "tx";
2366                                 };
2367                                 ssi2: ssi-2 {
2368                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2369                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2370                                         dma-names = "rx", "tx";
2371                                 };
2372                                 ssi3: ssi-3 {
2373                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2374                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2375                                         dma-names = "rx", "tx";
2376                                 };
2377                                 ssi4: ssi-4 {
2378                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2379                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2380                                         dma-names = "rx", "tx";
2381                                 };
2382                                 ssi5: ssi-5 {
2383                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2384                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2385                                         dma-names = "rx", "tx";
2386                                 };
2387                                 ssi6: ssi-6 {
2388                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2389                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2390                                         dma-names = "rx", "tx";
2391                                 };
2392                                 ssi7: ssi-7 {
2393                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2394                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2395                                         dma-names = "rx", "tx";
2396                                 };
2397                                 ssi8: ssi-8 {
2398                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2399                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2400                                         dma-names = "rx", "tx";
2401                                 };
2402                                 ssi9: ssi-9 {
2403                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2404                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2405                                         dma-names = "rx", "tx";
2406                                 };
2407                         };
2408                 };
2409
2410                 audma0: dma-controller@ec700000 {
2411                         compatible = "renesas,dmac-r8a7795",
2412                                      "renesas,rcar-dmac";
2413                         reg = <0 0xec700000 0 0x10000>;
2414                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2415                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2416                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2417                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2418                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2419                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2420                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2421                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2422                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2423                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2424                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2425                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2426                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2427                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2428                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2429                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2430                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2431                         interrupt-names = "error",
2432                                         "ch0", "ch1", "ch2", "ch3",
2433                                         "ch4", "ch5", "ch6", "ch7",
2434                                         "ch8", "ch9", "ch10", "ch11",
2435                                         "ch12", "ch13", "ch14", "ch15";
2436                         clocks = <&cpg CPG_MOD 502>;
2437                         clock-names = "fck";
2438                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2439                         resets = <&cpg 502>;
2440                         #dma-cells = <1>;
2441                         dma-channels = <16>;
2442                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2443                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2444                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2445                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2446                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2447                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2448                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2449                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2450                 };
2451
2452                 audma1: dma-controller@ec720000 {
2453                         compatible = "renesas,dmac-r8a7795",
2454                                      "renesas,rcar-dmac";
2455                         reg = <0 0xec720000 0 0x10000>;
2456                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2457                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2458                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2459                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2460                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2461                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2462                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2463                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2464                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2465                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2466                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2467                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2468                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2469                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2470                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2471                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2472                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2473                         interrupt-names = "error",
2474                                         "ch0", "ch1", "ch2", "ch3",
2475                                         "ch4", "ch5", "ch6", "ch7",
2476                                         "ch8", "ch9", "ch10", "ch11",
2477                                         "ch12", "ch13", "ch14", "ch15";
2478                         clocks = <&cpg CPG_MOD 501>;
2479                         clock-names = "fck";
2480                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2481                         resets = <&cpg 501>;
2482                         #dma-cells = <1>;
2483                         dma-channels = <16>;
2484                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2485                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2486                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2487                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2488                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2489                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2490                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2491                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2492                 };
2493
2494                 xhci0: usb@ee000000 {
2495                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2496                         reg = <0 0xee000000 0 0xc00>;
2497                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2498                         clocks = <&cpg CPG_MOD 328>;
2499                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2500                         resets = <&cpg 328>;
2501                         status = "disabled";
2502                 };
2503
2504                 usb3_peri0: usb@ee020000 {
2505                         compatible = "renesas,r8a7795-usb3-peri",
2506                                      "renesas,rcar-gen3-usb3-peri";
2507                         reg = <0 0xee020000 0 0x400>;
2508                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2509                         clocks = <&cpg CPG_MOD 328>;
2510                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2511                         resets = <&cpg 328>;
2512                         status = "disabled";
2513                 };
2514
2515                 ohci0: usb@ee080000 {
2516                         compatible = "generic-ohci";
2517                         reg = <0 0xee080000 0 0x100>;
2518                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2519                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2520                         phys = <&usb2_phy0 1>;
2521                         phy-names = "usb";
2522                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2523                         resets = <&cpg 703>, <&cpg 704>;
2524                         status = "disabled";
2525                 };
2526
2527                 ohci1: usb@ee0a0000 {
2528                         compatible = "generic-ohci";
2529                         reg = <0 0xee0a0000 0 0x100>;
2530                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2531                         clocks = <&cpg CPG_MOD 702>;
2532                         phys = <&usb2_phy1 1>;
2533                         phy-names = "usb";
2534                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2535                         resets = <&cpg 702>;
2536                         status = "disabled";
2537                 };
2538
2539                 ohci2: usb@ee0c0000 {
2540                         compatible = "generic-ohci";
2541                         reg = <0 0xee0c0000 0 0x100>;
2542                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2543                         clocks = <&cpg CPG_MOD 701>;
2544                         phys = <&usb2_phy2 1>;
2545                         phy-names = "usb";
2546                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2547                         resets = <&cpg 701>;
2548                         status = "disabled";
2549                 };
2550
2551                 ohci3: usb@ee0e0000 {
2552                         compatible = "generic-ohci";
2553                         reg = <0 0xee0e0000 0 0x100>;
2554                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2555                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2556                         phys = <&usb2_phy3 1>;
2557                         phy-names = "usb";
2558                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2559                         resets = <&cpg 700>, <&cpg 705>;
2560                         status = "disabled";
2561                 };
2562
2563                 ehci0: usb@ee080100 {
2564                         compatible = "generic-ehci";
2565                         reg = <0 0xee080100 0 0x100>;
2566                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2567                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2568                         phys = <&usb2_phy0 2>;
2569                         phy-names = "usb";
2570                         companion = <&ohci0>;
2571                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2572                         resets = <&cpg 703>, <&cpg 704>;
2573                         status = "disabled";
2574                 };
2575
2576                 ehci1: usb@ee0a0100 {
2577                         compatible = "generic-ehci";
2578                         reg = <0 0xee0a0100 0 0x100>;
2579                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2580                         clocks = <&cpg CPG_MOD 702>;
2581                         phys = <&usb2_phy1 2>;
2582                         phy-names = "usb";
2583                         companion = <&ohci1>;
2584                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2585                         resets = <&cpg 702>;
2586                         status = "disabled";
2587                 };
2588
2589                 ehci2: usb@ee0c0100 {
2590                         compatible = "generic-ehci";
2591                         reg = <0 0xee0c0100 0 0x100>;
2592                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2593                         clocks = <&cpg CPG_MOD 701>;
2594                         phys = <&usb2_phy2 2>;
2595                         phy-names = "usb";
2596                         companion = <&ohci2>;
2597                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2598                         resets = <&cpg 701>;
2599                         status = "disabled";
2600                 };
2601
2602                 ehci3: usb@ee0e0100 {
2603                         compatible = "generic-ehci";
2604                         reg = <0 0xee0e0100 0 0x100>;
2605                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2606                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2607                         phys = <&usb2_phy3 2>;
2608                         phy-names = "usb";
2609                         companion = <&ohci3>;
2610                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2611                         resets = <&cpg 700>, <&cpg 705>;
2612                         status = "disabled";
2613                 };
2614
2615                 usb2_phy0: usb-phy@ee080200 {
2616                         compatible = "renesas,usb2-phy-r8a7795",
2617                                      "renesas,rcar-gen3-usb2-phy";
2618                         reg = <0 0xee080200 0 0x700>;
2619                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2620                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2621                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2622                         resets = <&cpg 703>, <&cpg 704>;
2623                         #phy-cells = <1>;
2624                         status = "disabled";
2625                 };
2626
2627                 usb2_phy1: usb-phy@ee0a0200 {
2628                         compatible = "renesas,usb2-phy-r8a7795",
2629                                      "renesas,rcar-gen3-usb2-phy";
2630                         reg = <0 0xee0a0200 0 0x700>;
2631                         clocks = <&cpg CPG_MOD 702>;
2632                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2633                         resets = <&cpg 702>;
2634                         #phy-cells = <1>;
2635                         status = "disabled";
2636                 };
2637
2638                 usb2_phy2: usb-phy@ee0c0200 {
2639                         compatible = "renesas,usb2-phy-r8a7795",
2640                                      "renesas,rcar-gen3-usb2-phy";
2641                         reg = <0 0xee0c0200 0 0x700>;
2642                         clocks = <&cpg CPG_MOD 701>;
2643                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2644                         resets = <&cpg 701>;
2645                         #phy-cells = <1>;
2646                         status = "disabled";
2647                 };
2648
2649                 usb2_phy3: usb-phy@ee0e0200 {
2650                         compatible = "renesas,usb2-phy-r8a7795",
2651                                      "renesas,rcar-gen3-usb2-phy";
2652                         reg = <0 0xee0e0200 0 0x700>;
2653                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2654                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2655                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2656                         resets = <&cpg 700>, <&cpg 705>;
2657                         #phy-cells = <1>;
2658                         status = "disabled";
2659                 };
2660
2661                 sdhi0: mmc@ee100000 {
2662                         compatible = "renesas,sdhi-r8a7795",
2663                                      "renesas,rcar-gen3-sdhi";
2664                         reg = <0 0xee100000 0 0x2000>;
2665                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2666                         clocks = <&cpg CPG_MOD 314>;
2667                         max-frequency = <200000000>;
2668                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2669                         resets = <&cpg 314>;
2670                         iommus = <&ipmmu_ds1 32>;
2671                         status = "disabled";
2672                 };
2673
2674                 sdhi1: mmc@ee120000 {
2675                         compatible = "renesas,sdhi-r8a7795",
2676                                      "renesas,rcar-gen3-sdhi";
2677                         reg = <0 0xee120000 0 0x2000>;
2678                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2679                         clocks = <&cpg CPG_MOD 313>;
2680                         max-frequency = <200000000>;
2681                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2682                         resets = <&cpg 313>;
2683                         iommus = <&ipmmu_ds1 33>;
2684                         status = "disabled";
2685                 };
2686
2687                 sdhi2: mmc@ee140000 {
2688                         compatible = "renesas,sdhi-r8a7795",
2689                                      "renesas,rcar-gen3-sdhi";
2690                         reg = <0 0xee140000 0 0x2000>;
2691                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2692                         clocks = <&cpg CPG_MOD 312>;
2693                         max-frequency = <200000000>;
2694                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2695                         resets = <&cpg 312>;
2696                         iommus = <&ipmmu_ds1 34>;
2697                         status = "disabled";
2698                 };
2699
2700                 sdhi3: mmc@ee160000 {
2701                         compatible = "renesas,sdhi-r8a7795",
2702                                      "renesas,rcar-gen3-sdhi";
2703                         reg = <0 0xee160000 0 0x2000>;
2704                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2705                         clocks = <&cpg CPG_MOD 311>;
2706                         max-frequency = <200000000>;
2707                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2708                         resets = <&cpg 311>;
2709                         iommus = <&ipmmu_ds1 35>;
2710                         status = "disabled";
2711                 };
2712
2713                 sata: sata@ee300000 {
2714                         compatible = "renesas,sata-r8a7795",
2715                                      "renesas,rcar-gen3-sata";
2716                         reg = <0 0xee300000 0 0x200000>;
2717                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2718                         clocks = <&cpg CPG_MOD 815>;
2719                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2720                         resets = <&cpg 815>;
2721                         status = "disabled";
2722                         iommus = <&ipmmu_hc 2>;
2723                 };
2724
2725                 gic: interrupt-controller@f1010000 {
2726                         compatible = "arm,gic-400";
2727                         #interrupt-cells = <3>;
2728                         #address-cells = <0>;
2729                         interrupt-controller;
2730                         reg = <0x0 0xf1010000 0 0x1000>,
2731                               <0x0 0xf1020000 0 0x20000>,
2732                               <0x0 0xf1040000 0 0x20000>,
2733                               <0x0 0xf1060000 0 0x20000>;
2734                         interrupts = <GIC_PPI 9
2735                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2736                         clocks = <&cpg CPG_MOD 408>;
2737                         clock-names = "clk";
2738                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2739                         resets = <&cpg 408>;
2740                 };
2741
2742                 pciec0: pcie@fe000000 {
2743                         compatible = "renesas,pcie-r8a7795",
2744                                      "renesas,pcie-rcar-gen3";
2745                         reg = <0 0xfe000000 0 0x80000>;
2746                         #address-cells = <3>;
2747                         #size-cells = <2>;
2748                         bus-range = <0x00 0xff>;
2749                         device_type = "pci";
2750                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2751                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2752                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2753                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2754                         /* Map all possible DDR as inbound ranges */
2755                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2756                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2757                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2758                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2759                         #interrupt-cells = <1>;
2760                         interrupt-map-mask = <0 0 0 0>;
2761                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2762                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2763                         clock-names = "pcie", "pcie_bus";
2764                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2765                         resets = <&cpg 319>;
2766                         status = "disabled";
2767                 };
2768
2769                 pciec1: pcie@ee800000 {
2770                         compatible = "renesas,pcie-r8a7795",
2771                                      "renesas,pcie-rcar-gen3";
2772                         reg = <0 0xee800000 0 0x80000>;
2773                         #address-cells = <3>;
2774                         #size-cells = <2>;
2775                         bus-range = <0x00 0xff>;
2776                         device_type = "pci";
2777                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2778                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2779                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2780                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2781                         /* Map all possible DDR as inbound ranges */
2782                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2783                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2784                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2785                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2786                         #interrupt-cells = <1>;
2787                         interrupt-map-mask = <0 0 0 0>;
2788                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2789                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2790                         clock-names = "pcie", "pcie_bus";
2791                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2792                         resets = <&cpg 318>;
2793                         status = "disabled";
2794                 };
2795
2796                 pciec0_ep: pcie-ep@fe000000 {
2797                         compatible = "renesas,r8a7795-pcie-ep",
2798                                      "renesas,rcar-gen3-pcie-ep";
2799                         reg = <0x0 0xfe000000 0 0x80000>,
2800                               <0x0 0xfe100000 0 0x100000>,
2801                               <0x0 0xfe200000 0 0x200000>,
2802                               <0x0 0x30000000 0 0x8000000>,
2803                               <0x0 0x38000000 0 0x8000000>;
2804                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2805                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2806                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2807                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2808                         clocks = <&cpg CPG_MOD 319>;
2809                         clock-names = "pcie";
2810                         resets = <&cpg 319>;
2811                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2812                         status = "disabled";
2813                 };
2814
2815                 pciec1_ep: pcie-ep@ee800000 {
2816                         compatible = "renesas,r8a7795-pcie-ep",
2817                                      "renesas,rcar-gen3-pcie-ep";
2818                         reg = <0x0 0xee800000 0 0x80000>,
2819                               <0x0 0xee900000 0 0x100000>,
2820                               <0x0 0xeea00000 0 0x200000>,
2821                               <0x0 0xc0000000 0 0x8000000>,
2822                               <0x0 0xc8000000 0 0x8000000>;
2823                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2824                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2825                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2826                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2827                         clocks = <&cpg CPG_MOD 318>;
2828                         clock-names = "pcie";
2829                         resets = <&cpg 318>;
2830                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2831                         status = "disabled";
2832                 };
2833
2834                 imr-lx4@fe860000 {
2835                         compatible = "renesas,r8a7795-imr-lx4",
2836                                      "renesas,imr-lx4";
2837                         reg = <0 0xfe860000 0 0x2000>;
2838                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2839                         clocks = <&cpg CPG_MOD 823>;
2840                         power-domains = <&sysc R8A7795_PD_A3VC>;
2841                         resets = <&cpg 823>;
2842                 };
2843
2844                 imr-lx4@fe870000 {
2845                         compatible = "renesas,r8a7795-imr-lx4",
2846                                      "renesas,imr-lx4";
2847                         reg = <0 0xfe870000 0 0x2000>;
2848                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2849                         clocks = <&cpg CPG_MOD 822>;
2850                         power-domains = <&sysc R8A7795_PD_A3VC>;
2851                         resets = <&cpg 822>;
2852                 };
2853
2854                 imr-lx4@fe880000 {
2855                         compatible = "renesas,r8a7795-imr-lx4",
2856                                      "renesas,imr-lx4";
2857                         reg = <0 0xfe880000 0 0x2000>;
2858                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2859                         clocks = <&cpg CPG_MOD 821>;
2860                         power-domains = <&sysc R8A7795_PD_A3VC>;
2861                         resets = <&cpg 821>;
2862                 };
2863
2864                 imr-lx4@fe890000 {
2865                         compatible = "renesas,r8a7795-imr-lx4",
2866                                      "renesas,imr-lx4";
2867                         reg = <0 0xfe890000 0 0x2000>;
2868                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2869                         clocks = <&cpg CPG_MOD 820>;
2870                         power-domains = <&sysc R8A7795_PD_A3VC>;
2871                         resets = <&cpg 820>;
2872                 };
2873
2874                 vspbc: vsp@fe920000 {
2875                         compatible = "renesas,vsp2";
2876                         reg = <0 0xfe920000 0 0x8000>;
2877                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2878                         clocks = <&cpg CPG_MOD 624>;
2879                         power-domains = <&sysc R8A7795_PD_A3VP>;
2880                         resets = <&cpg 624>;
2881
2882                         renesas,fcp = <&fcpvb1>;
2883                 };
2884
2885                 vspbd: vsp@fe960000 {
2886                         compatible = "renesas,vsp2";
2887                         reg = <0 0xfe960000 0 0x8000>;
2888                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2889                         clocks = <&cpg CPG_MOD 626>;
2890                         power-domains = <&sysc R8A7795_PD_A3VP>;
2891                         resets = <&cpg 626>;
2892
2893                         renesas,fcp = <&fcpvb0>;
2894                 };
2895
2896                 vspd0: vsp@fea20000 {
2897                         compatible = "renesas,vsp2";
2898                         reg = <0 0xfea20000 0 0x5000>;
2899                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2900                         clocks = <&cpg CPG_MOD 623>;
2901                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2902                         resets = <&cpg 623>;
2903
2904                         renesas,fcp = <&fcpvd0>;
2905                 };
2906
2907                 vspd1: vsp@fea28000 {
2908                         compatible = "renesas,vsp2";
2909                         reg = <0 0xfea28000 0 0x5000>;
2910                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2911                         clocks = <&cpg CPG_MOD 622>;
2912                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2913                         resets = <&cpg 622>;
2914
2915                         renesas,fcp = <&fcpvd1>;
2916                 };
2917
2918                 vspd2: vsp@fea30000 {
2919                         compatible = "renesas,vsp2";
2920                         reg = <0 0xfea30000 0 0x5000>;
2921                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2922                         clocks = <&cpg CPG_MOD 621>;
2923                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2924                         resets = <&cpg 621>;
2925
2926                         renesas,fcp = <&fcpvd2>;
2927                 };
2928
2929                 vspi0: vsp@fe9a0000 {
2930                         compatible = "renesas,vsp2";
2931                         reg = <0 0xfe9a0000 0 0x8000>;
2932                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2933                         clocks = <&cpg CPG_MOD 631>;
2934                         power-domains = <&sysc R8A7795_PD_A3VP>;
2935                         resets = <&cpg 631>;
2936
2937                         renesas,fcp = <&fcpvi0>;
2938                 };
2939
2940                 vspi1: vsp@fe9b0000 {
2941                         compatible = "renesas,vsp2";
2942                         reg = <0 0xfe9b0000 0 0x8000>;
2943                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2944                         clocks = <&cpg CPG_MOD 630>;
2945                         power-domains = <&sysc R8A7795_PD_A3VP>;
2946                         resets = <&cpg 630>;
2947
2948                         renesas,fcp = <&fcpvi1>;
2949                 };
2950
2951                 fdp1@fe940000 {
2952                         compatible = "renesas,fdp1";
2953                         reg = <0 0xfe940000 0 0x2400>;
2954                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2955                         clocks = <&cpg CPG_MOD 119>;
2956                         power-domains = <&sysc R8A7795_PD_A3VP>;
2957                         resets = <&cpg 119>;
2958                         renesas,fcp = <&fcpf0>;
2959                 };
2960
2961                 fdp1@fe944000 {
2962                         compatible = "renesas,fdp1";
2963                         reg = <0 0xfe944000 0 0x2400>;
2964                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2965                         clocks = <&cpg CPG_MOD 118>;
2966                         power-domains = <&sysc R8A7795_PD_A3VP>;
2967                         resets = <&cpg 118>;
2968                         renesas,fcp = <&fcpf1>;
2969                 };
2970
2971                 fcpf0: fcp@fe950000 {
2972                         compatible = "renesas,fcpf";
2973                         reg = <0 0xfe950000 0 0x200>;
2974                         clocks = <&cpg CPG_MOD 615>;
2975                         power-domains = <&sysc R8A7795_PD_A3VP>;
2976                         resets = <&cpg 615>;
2977                         iommus = <&ipmmu_vp0 0>;
2978                 };
2979
2980                 fcpf1: fcp@fe951000 {
2981                         compatible = "renesas,fcpf";
2982                         reg = <0 0xfe951000 0 0x200>;
2983                         clocks = <&cpg CPG_MOD 614>;
2984                         power-domains = <&sysc R8A7795_PD_A3VP>;
2985                         resets = <&cpg 614>;
2986                         iommus = <&ipmmu_vp1 1>;
2987                 };
2988
2989                 fcpvb0: fcp@fe96f000 {
2990                         compatible = "renesas,fcpv";
2991                         reg = <0 0xfe96f000 0 0x200>;
2992                         clocks = <&cpg CPG_MOD 607>;
2993                         power-domains = <&sysc R8A7795_PD_A3VP>;
2994                         resets = <&cpg 607>;
2995                         iommus = <&ipmmu_vp0 5>;
2996                 };
2997
2998                 fcpvb1: fcp@fe92f000 {
2999                         compatible = "renesas,fcpv";
3000                         reg = <0 0xfe92f000 0 0x200>;
3001                         clocks = <&cpg CPG_MOD 606>;
3002                         power-domains = <&sysc R8A7795_PD_A3VP>;
3003                         resets = <&cpg 606>;
3004                         iommus = <&ipmmu_vp1 7>;
3005                 };
3006
3007                 fcpvi0: fcp@fe9af000 {
3008                         compatible = "renesas,fcpv";
3009                         reg = <0 0xfe9af000 0 0x200>;
3010                         clocks = <&cpg CPG_MOD 611>;
3011                         power-domains = <&sysc R8A7795_PD_A3VP>;
3012                         resets = <&cpg 611>;
3013                         iommus = <&ipmmu_vp0 8>;
3014                 };
3015
3016                 fcpvi1: fcp@fe9bf000 {
3017                         compatible = "renesas,fcpv";
3018                         reg = <0 0xfe9bf000 0 0x200>;
3019                         clocks = <&cpg CPG_MOD 610>;
3020                         power-domains = <&sysc R8A7795_PD_A3VP>;
3021                         resets = <&cpg 610>;
3022                         iommus = <&ipmmu_vp1 9>;
3023                 };
3024
3025                 fcpvd0: fcp@fea27000 {
3026                         compatible = "renesas,fcpv";
3027                         reg = <0 0xfea27000 0 0x200>;
3028                         clocks = <&cpg CPG_MOD 603>;
3029                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3030                         resets = <&cpg 603>;
3031                         iommus = <&ipmmu_vi0 8>;
3032                 };
3033
3034                 fcpvd1: fcp@fea2f000 {
3035                         compatible = "renesas,fcpv";
3036                         reg = <0 0xfea2f000 0 0x200>;
3037                         clocks = <&cpg CPG_MOD 602>;
3038                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3039                         resets = <&cpg 602>;
3040                         iommus = <&ipmmu_vi0 9>;
3041                 };
3042
3043                 fcpvd2: fcp@fea37000 {
3044                         compatible = "renesas,fcpv";
3045                         reg = <0 0xfea37000 0 0x200>;
3046                         clocks = <&cpg CPG_MOD 601>;
3047                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3048                         resets = <&cpg 601>;
3049                         iommus = <&ipmmu_vi1 10>;
3050                 };
3051
3052                 cmm0: cmm@fea40000 {
3053                         compatible = "renesas,r8a7795-cmm",
3054                                      "renesas,rcar-gen3-cmm";
3055                         reg = <0 0xfea40000 0 0x1000>;
3056                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3057                         clocks = <&cpg CPG_MOD 711>;
3058                         resets = <&cpg 711>;
3059                 };
3060
3061                 cmm1: cmm@fea50000 {
3062                         compatible = "renesas,r8a7795-cmm",
3063                                      "renesas,rcar-gen3-cmm";
3064                         reg = <0 0xfea50000 0 0x1000>;
3065                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3066                         clocks = <&cpg CPG_MOD 710>;
3067                         resets = <&cpg 710>;
3068                 };
3069
3070                 cmm2: cmm@fea60000 {
3071                         compatible = "renesas,r8a7795-cmm",
3072                                      "renesas,rcar-gen3-cmm";
3073                         reg = <0 0xfea60000 0 0x1000>;
3074                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3075                         clocks = <&cpg CPG_MOD 709>;
3076                         resets = <&cpg 709>;
3077                 };
3078
3079                 cmm3: cmm@fea70000 {
3080                         compatible = "renesas,r8a7795-cmm",
3081                                      "renesas,rcar-gen3-cmm";
3082                         reg = <0 0xfea70000 0 0x1000>;
3083                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3084                         clocks = <&cpg CPG_MOD 708>;
3085                         resets = <&cpg 708>;
3086                 };
3087
3088                 csi20: csi2@fea80000 {
3089                         compatible = "renesas,r8a7795-csi2";
3090                         reg = <0 0xfea80000 0 0x10000>;
3091                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
3092                         clocks = <&cpg CPG_MOD 714>;
3093                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3094                         resets = <&cpg 714>;
3095                         status = "disabled";
3096
3097                         ports {
3098                                 #address-cells = <1>;
3099                                 #size-cells = <0>;
3100
3101                                 port@0 {
3102                                         reg = <0>;
3103                                 };
3104
3105                                 port@1 {
3106                                         #address-cells = <1>;
3107                                         #size-cells = <0>;
3108
3109                                         reg = <1>;
3110
3111                                         csi20vin0: endpoint@0 {
3112                                                 reg = <0>;
3113                                                 remote-endpoint = <&vin0csi20>;
3114                                         };
3115                                         csi20vin1: endpoint@1 {
3116                                                 reg = <1>;
3117                                                 remote-endpoint = <&vin1csi20>;
3118                                         };
3119                                         csi20vin2: endpoint@2 {
3120                                                 reg = <2>;
3121                                                 remote-endpoint = <&vin2csi20>;
3122                                         };
3123                                         csi20vin3: endpoint@3 {
3124                                                 reg = <3>;
3125                                                 remote-endpoint = <&vin3csi20>;
3126                                         };
3127                                         csi20vin4: endpoint@4 {
3128                                                 reg = <4>;
3129                                                 remote-endpoint = <&vin4csi20>;
3130                                         };
3131                                         csi20vin5: endpoint@5 {
3132                                                 reg = <5>;
3133                                                 remote-endpoint = <&vin5csi20>;
3134                                         };
3135                                         csi20vin6: endpoint@6 {
3136                                                 reg = <6>;
3137                                                 remote-endpoint = <&vin6csi20>;
3138                                         };
3139                                         csi20vin7: endpoint@7 {
3140                                                 reg = <7>;
3141                                                 remote-endpoint = <&vin7csi20>;
3142                                         };
3143                                 };
3144                         };
3145                 };
3146
3147                 csi40: csi2@feaa0000 {
3148                         compatible = "renesas,r8a7795-csi2";
3149                         reg = <0 0xfeaa0000 0 0x10000>;
3150                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
3151                         clocks = <&cpg CPG_MOD 716>;
3152                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3153                         resets = <&cpg 716>;
3154                         status = "disabled";
3155
3156                         ports {
3157                                 #address-cells = <1>;
3158                                 #size-cells = <0>;
3159
3160                                 port@0 {
3161                                         reg = <0>;
3162                                 };
3163
3164                                 port@1 {
3165                                         #address-cells = <1>;
3166                                         #size-cells = <0>;
3167
3168                                         reg = <1>;
3169
3170                                         csi40vin0: endpoint@0 {
3171                                                 reg = <0>;
3172                                                 remote-endpoint = <&vin0csi40>;
3173                                         };
3174                                         csi40vin1: endpoint@1 {
3175                                                 reg = <1>;
3176                                                 remote-endpoint = <&vin1csi40>;
3177                                         };
3178                                         csi40vin2: endpoint@2 {
3179                                                 reg = <2>;
3180                                                 remote-endpoint = <&vin2csi40>;
3181                                         };
3182                                         csi40vin3: endpoint@3 {
3183                                                 reg = <3>;
3184                                                 remote-endpoint = <&vin3csi40>;
3185                                         };
3186                                 };
3187                         };
3188                 };
3189
3190                 csi41: csi2@feab0000 {
3191                         compatible = "renesas,r8a7795-csi2";
3192                         reg = <0 0xfeab0000 0 0x10000>;
3193                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
3194                         clocks = <&cpg CPG_MOD 715>;
3195                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3196                         resets = <&cpg 715>;
3197                         status = "disabled";
3198
3199                         ports {
3200                                 #address-cells = <1>;
3201                                 #size-cells = <0>;
3202
3203                                 port@0 {
3204                                         reg = <0>;
3205                                 };
3206
3207                                 port@1 {
3208                                         #address-cells = <1>;
3209                                         #size-cells = <0>;
3210
3211                                         reg = <1>;
3212
3213                                         csi41vin4: endpoint@0 {
3214                                                 reg = <0>;
3215                                                 remote-endpoint = <&vin4csi41>;
3216                                         };
3217                                         csi41vin5: endpoint@1 {
3218                                                 reg = <1>;
3219                                                 remote-endpoint = <&vin5csi41>;
3220                                         };
3221                                         csi41vin6: endpoint@2 {
3222                                                 reg = <2>;
3223                                                 remote-endpoint = <&vin6csi41>;
3224                                         };
3225                                         csi41vin7: endpoint@3 {
3226                                                 reg = <3>;
3227                                                 remote-endpoint = <&vin7csi41>;
3228                                         };
3229                                 };
3230                         };
3231                 };
3232
3233                 hdmi0: hdmi@fead0000 {
3234                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3235                         reg = <0 0xfead0000 0 0x10000>;
3236                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
3237                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3238                         clock-names = "iahb", "isfr";
3239                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3240                         resets = <&cpg 729>;
3241                         status = "disabled";
3242
3243                         ports {
3244                                 #address-cells = <1>;
3245                                 #size-cells = <0>;
3246                                 port@0 {
3247                                         reg = <0>;
3248                                         dw_hdmi0_in: endpoint {
3249                                                 remote-endpoint = <&du_out_hdmi0>;
3250                                         };
3251                                 };
3252                                 port@1 {
3253                                         reg = <1>;
3254                                 };
3255                                 port@2 {
3256                                         /* HDMI sound */
3257                                         reg = <2>;
3258                                 };
3259                         };
3260                 };
3261
3262                 hdmi1: hdmi@feae0000 {
3263                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3264                         reg = <0 0xfeae0000 0 0x10000>;
3265                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
3266                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3267                         clock-names = "iahb", "isfr";
3268                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3269                         resets = <&cpg 728>;
3270                         status = "disabled";
3271
3272                         ports {
3273                                 #address-cells = <1>;
3274                                 #size-cells = <0>;
3275                                 port@0 {
3276                                         reg = <0>;
3277                                         dw_hdmi1_in: endpoint {
3278                                                 remote-endpoint = <&du_out_hdmi1>;
3279                                         };
3280                                 };
3281                                 port@1 {
3282                                         reg = <1>;
3283                                 };
3284                                 port@2 {
3285                                         /* HDMI sound */
3286                                         reg = <2>;
3287                                 };
3288                         };
3289                 };
3290
3291                 du: display@feb00000 {
3292                         compatible = "renesas,du-r8a7795";
3293                         reg = <0 0xfeb00000 0 0x80000>;
3294                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3295                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3296                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3297                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
3298                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
3299                                  <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
3300                         clock-names = "du.0", "du.1", "du.2", "du.3";
3301                         resets = <&cpg 724>, <&cpg 722>;
3302                         reset-names = "du.0", "du.2";
3303
3304                         renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
3305                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3306                                        <&vspd0 1>;
3307
3308                         status = "disabled";
3309
3310                         ports {
3311                                 #address-cells = <1>;
3312                                 #size-cells = <0>;
3313
3314                                 port@0 {
3315                                         reg = <0>;
3316                                         du_out_rgb: endpoint {
3317                                         };
3318                                 };
3319                                 port@1 {
3320                                         reg = <1>;
3321                                         du_out_hdmi0: endpoint {
3322                                                 remote-endpoint = <&dw_hdmi0_in>;
3323                                         };
3324                                 };
3325                                 port@2 {
3326                                         reg = <2>;
3327                                         du_out_hdmi1: endpoint {
3328                                                 remote-endpoint = <&dw_hdmi1_in>;
3329                                         };
3330                                 };
3331                                 port@3 {
3332                                         reg = <3>;
3333                                         du_out_lvds0: endpoint {
3334                                                 remote-endpoint = <&lvds0_in>;
3335                                         };
3336                                 };
3337                         };
3338                 };
3339
3340                 lvds0: lvds@feb90000 {
3341                         compatible = "renesas,r8a7795-lvds";
3342                         reg = <0 0xfeb90000 0 0x14>;
3343                         clocks = <&cpg CPG_MOD 727>;
3344                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3345                         resets = <&cpg 727>;
3346                         status = "disabled";
3347
3348                         ports {
3349                                 #address-cells = <1>;
3350                                 #size-cells = <0>;
3351
3352                                 port@0 {
3353                                         reg = <0>;
3354                                         lvds0_in: endpoint {
3355                                                 remote-endpoint = <&du_out_lvds0>;
3356                                         };
3357                                 };
3358                                 port@1 {
3359                                         reg = <1>;
3360                                         lvds0_out: endpoint {
3361                                         };
3362                                 };
3363                         };
3364                 };
3365
3366                 prr: chipid@fff00044 {
3367                         compatible = "renesas,prr";
3368                         reg = <0 0xfff00044 0 4>;
3369                 };
3370         };
3371
3372         thermal-zones {
3373                 sensor_thermal1: sensor-thermal1 {
3374                         polling-delay-passive = <250>;
3375                         polling-delay = <1000>;
3376                         thermal-sensors = <&tsc 0>;
3377                         sustainable-power = <6313>;
3378
3379                         trips {
3380                                 sensor1_crit: sensor1-crit {
3381                                         temperature = <120000>;
3382                                         hysteresis = <1000>;
3383                                         type = "critical";
3384                                 };
3385                         };
3386                 };
3387
3388                 sensor_thermal2: sensor-thermal2 {
3389                         polling-delay-passive = <250>;
3390                         polling-delay = <1000>;
3391                         thermal-sensors = <&tsc 1>;
3392                         sustainable-power = <6313>;
3393
3394                         trips {
3395                                 sensor2_crit: sensor2-crit {
3396                                         temperature = <120000>;
3397                                         hysteresis = <1000>;
3398                                         type = "critical";
3399                                 };
3400                         };
3401                 };
3402
3403                 sensor_thermal3: sensor-thermal3 {
3404                         polling-delay-passive = <250>;
3405                         polling-delay = <1000>;
3406                         thermal-sensors = <&tsc 2>;
3407
3408                         trips {
3409                                 target: trip-point1 {
3410                                         temperature = <100000>;
3411                                         hysteresis = <1000>;
3412                                         type = "passive";
3413                                 };
3414
3415                                 sensor3_crit: sensor3-crit {
3416                                         temperature = <120000>;
3417                                         hysteresis = <1000>;
3418                                         type = "critical";
3419                                 };
3420                         };
3421
3422                         cooling-maps {
3423                                 map0 {
3424                                         trip = <&target>;
3425                                         cooling-device = <&a57_0 2 4>;
3426                                         contribution = <1024>;
3427                                 };
3428
3429                                 map1 {
3430                                         trip = <&target>;
3431                                         cooling-device = <&a53_0 0 2>;
3432                                         contribution = <1024>;
3433                                 };
3434                         };
3435                 };
3436         };
3437
3438         timer {
3439                 compatible = "arm,armv8-timer";
3440                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3441                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3442                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3443                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3444         };
3445
3446         /* External USB clocks - can be overridden by the board */
3447         usb3s0_clk: usb3s0 {
3448                 compatible = "fixed-clock";
3449                 #clock-cells = <0>;
3450                 clock-frequency = <0>;
3451         };
3452
3453         usb_extal_clk: usb_extal {
3454                 compatible = "fixed-clock";
3455                 #clock-cells = <0>;
3456                 clock-frequency = <0>;
3457         };
3458 };