arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts

   1 // SPDX-License-Identifier: BSD-3-Clause
   2 /*
   3  * Lenovo Yoga C630
   4  *
   5  * Copyright (c) 2019, Linaro Ltd.
   6  */
   7
   8 /dts-v1/;
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/input/gpio-keys.h>
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  14 #include <dt-bindings/sound/qcom,q6afe.h>
  15 #include <dt-bindings/sound/qcom,q6asm.h>
  16 #include "sdm850.dtsi"
  17 #include "pm8998.dtsi"
  18
  19 / {
  20         model = "Lenovo Yoga C630";
  21         compatible = "lenovo,yoga-c630", "qcom,sdm845";
  22
  23         aliases {
  24                 hsuart0 = &uart6;
  25         };
  26
  27         gpio-keys {
  28                 compatible = "gpio-keys";
  29
  30                 pinctrl-names = "default";
  31                 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
  32
  33                 lid {
  34                         gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
  35                         linux,input-type = <EV_SW>;
  36                         linux,code = <SW_LID>;
  37                         wakeup-source;
  38                         wakeup-event-action = <EV_ACT_DEASSERTED>;
  39                 };
  40
  41                 mode {
  42                         gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
  43                         linux,input-type = <EV_SW>;
  44                         linux,code = <SW_TABLET_MODE>;
  45                 };
  46         };
  47
  48         panel {
  49                 compatible = "boe,nv133fhm-n61";
  50                 no-hpd;
  51
  52                 ports {
  53                         port {
  54                                 panel_in_edp: endpoint {
  55                                         remote-endpoint = <&sn65dsi86_out>;
  56                                 };
  57                         };
  58                 };
  59         };
  60
  61         sn65dsi86_refclk: sn65dsi86-refclk {
  62                 compatible = "fixed-clock";
  63                 #clock-cells = <0>;
  64
  65                 clock-frequency = <19200000>;
  66         };
  67 };
  68
  69 &adsp_pas {
  70         firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
  71         status = "okay";
  72 };
  73
  74 &apps_rsc {
  75         pm8998-rpmh-regulators {
  76                 compatible = "qcom,pm8998-rpmh-regulators";
  77                 qcom,pmic-id = "a";
  78
  79                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
  80                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
  81
  82                 vreg_s2a_1p125: smps2 {
  83                 };
  84
  85                 vreg_s3a_1p35: smps3 {
  86                         regulator-min-microvolt = <1352000>;
  87                         regulator-max-microvolt = <1352000>;
  88                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  89                 };
  90
  91                 vreg_s4a_1p8: smps4 {
  92                         regulator-min-microvolt = <1800000>;
  93                         regulator-max-microvolt = <1800000>;
  94                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  95                 };
  96
  97                 vreg_s5a_2p04: smps5 {
  98                         regulator-min-microvolt = <2040000>;
  99                         regulator-max-microvolt = <2040000>;
 100                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 101                 };
 102
 103                 vreg_s7a_1p025: smps7 {
 104                 };
 105
 106                 vdd_qusb_hs0:
 107                 vdda_hp_pcie_core:
 108                 vdda_mipi_csi0_0p9:
 109                 vdda_mipi_csi1_0p9:
 110                 vdda_mipi_csi2_0p9:
 111                 vdda_mipi_dsi0_pll:
 112                 vdda_mipi_dsi1_pll:
 113                 vdda_qlink_lv:
 114                 vdda_qlink_lv_ck:
 115                 vdda_qrefs_0p875:
 116                 vdda_pcie_core:
 117                 vdda_pll_cc_ebi01:
 118                 vdda_pll_cc_ebi23:
 119                 vdda_sp_sensor:
 120                 vdda_ufs1_core:
 121                 vdda_ufs2_core:
 122                 vdda_usb1_ss_core:
 123                 vdda_usb2_ss_core:
 124                 vreg_l1a_0p875: ldo1 {
 125                         regulator-min-microvolt = <880000>;
 126                         regulator-max-microvolt = <880000>;
 127                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 128                 };
 129
 130                 vddpx_10:
 131                 vreg_l2a_1p2: ldo2 {
 132                         regulator-min-microvolt = <1200000>;
 133                         regulator-max-microvolt = <1200000>;
 134                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 135                         regulator-always-on;
 136                 };
 137
 138                 vreg_l3a_1p0: ldo3 {
 139                 };
 140
 141                 vdd_wcss_cx:
 142                 vdd_wcss_mx:
 143                 vdda_wcss_pll:
 144                 vreg_l5a_0p8: ldo5 {
 145                         regulator-min-microvolt = <800000>;
 146                         regulator-max-microvolt = <800000>;
 147                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 148                 };
 149
 150                 vddpx_13:
 151                 vreg_l6a_1p8: ldo6 {
 152                         regulator-min-microvolt = <1800000>;
 153                         regulator-max-microvolt = <1800000>;
 154                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 155                 };
 156
 157                 vreg_l7a_1p8: ldo7 {
 158                         regulator-min-microvolt = <1800000>;
 159                         regulator-max-microvolt = <1800000>;
 160                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 161                 };
 162
 163                 vreg_l8a_1p2: ldo8 {
 164                 };
 165
 166                 vreg_l9a_1p8: ldo9 {
 167                 };
 168
 169                 vreg_l10a_1p8: ldo10 {
 170                 };
 171
 172                 vreg_l11a_1p0: ldo11 {
 173                 };
 174
 175                 vdd_qfprom:
 176                 vdd_qfprom_sp:
 177                 vdda_apc1_cs_1p8:
 178                 vdda_gfx_cs_1p8:
 179                 vdda_qrefs_1p8:
 180                 vdda_qusb_hs0_1p8:
 181                 vddpx_11:
 182                 vreg_l12a_1p8: ldo12 {
 183                         regulator-min-microvolt = <1800000>;
 184                         regulator-max-microvolt = <1800000>;
 185                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 186                 };
 187
 188                 vddpx_2:
 189                 vreg_l13a_2p95: ldo13 {
 190                 };
 191
 192                 vreg_l14a_1p88: ldo14 {
 193                         regulator-min-microvolt = <1880000>;
 194                         regulator-max-microvolt = <1880000>;
 195                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 196                         regulator-always-on;
 197                 };
 198
 199                 vreg_l15a_1p8: ldo15 {
 200                 };
 201
 202                 vreg_l16a_2p7: ldo16 {
 203                 };
 204
 205                 vreg_l17a_1p3: ldo17 {
 206                         regulator-min-microvolt = <1304000>;
 207                         regulator-max-microvolt = <1304000>;
 208                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 209                 };
 210
 211                 vreg_l18a_2p7: ldo18 {
 212                 };
 213
 214                 vreg_l19a_3p0: ldo19 {
 215                         regulator-min-microvolt = <3100000>;
 216                         regulator-max-microvolt = <3108000>;
 217                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 218                 };
 219
 220                 vreg_l20a_2p95: ldo20 {
 221                         regulator-min-microvolt = <2960000>;
 222                         regulator-max-microvolt = <2960000>;
 223                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 224                 };
 225
 226                 vreg_l21a_2p95: ldo21 {
 227                 };
 228
 229                 vreg_l22a_2p85: ldo22 {
 230                 };
 231
 232                 vreg_l23a_3p3: ldo23 {
 233                 };
 234
 235                 vdda_qusb_hs0_3p1:
 236                 vreg_l24a_3p075: ldo24 {
 237                         regulator-min-microvolt = <3075000>;
 238                         regulator-max-microvolt = <3083000>;
 239                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 240                 };
 241
 242                 vreg_l25a_3p3: ldo25 {
 243                         regulator-min-microvolt = <3104000>;
 244                         regulator-max-microvolt = <3112000>;
 245                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 246                 };
 247
 248                 vdda_hp_pcie_1p2:
 249                 vdda_hv_ebi0:
 250                 vdda_hv_ebi1:
 251                 vdda_hv_ebi2:
 252                 vdda_hv_ebi3:
 253                 vdda_mipi_csi_1p25:
 254                 vdda_mipi_dsi0_1p2:
 255                 vdda_mipi_dsi1_1p2:
 256                 vdda_pcie_1p2:
 257                 vdda_ufs1_1p2:
 258                 vdda_ufs2_1p2:
 259                 vdda_usb1_ss_1p2:
 260                 vdda_usb2_ss_1p2:
 261                 vreg_l26a_1p2: ldo26 {
 262                         regulator-min-microvolt = <1200000>;
 263                         regulator-max-microvolt = <1208000>;
 264                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 265                 };
 266
 267                 vreg_l28a_3p0: ldo28 {
 268                 };
 269
 270                 vreg_lvs1a_1p8: lvs1 {
 271                 };
 272
 273                 vreg_lvs2a_1p8: lvs2 {
 274                 };
 275         };
 276 };
 277
 278 &cdsp_pas {
 279         firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
 280         status = "okay";
 281 };
 282
 283 &dsi0 {
 284         status = "okay";
 285         vdda-supply = <&vreg_l26a_1p2>;
 286
 287         ports {
 288                 port@1 {
 289                         endpoint {
 290                                 remote-endpoint = <&sn65dsi86_in_a>;
 291                                 data-lanes = <0 1 2 3>;
 292                         };
 293                 };
 294         };
 295 };
 296
 297 &dsi0_phy {
 298         status = "okay";
 299         vdds-supply = <&vreg_l1a_0p875>;
 300 };
 301
 302 &gcc {
 303         protected-clocks = <GCC_QSPI_CORE_CLK>,
 304                            <GCC_QSPI_CORE_CLK_SRC>,
 305                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
 306                            <GCC_LPASS_Q6_AXI_CLK>,
 307                            <GCC_LPASS_SWAY_CLK>;
 308 };
 309
 310 &gpu {
 311         zap-shader {
 312                 memory-region = <&gpu_mem>;
 313                 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
 314         };
 315 };
 316
 317 &i2c1 {
 318         status = "okay";
 319         clock-frequency = <400000>;
 320 };
 321
 322 &i2c3 {
 323         status = "okay";
 324         clock-frequency = <400000>;
 325         /* Overwrite pinctrl-0 from sdm845.dtsi */
 326         pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
 327
 328         tsel: hid@15 {
 329                 compatible = "hid-over-i2c";
 330                 reg = <0x15>;
 331                 hid-descr-addr = <0x1>;
 332
 333                 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
 334         };
 335
 336         tsc2: hid@2c {
 337                 compatible = "hid-over-i2c";
 338                 reg = <0x2c>;
 339                 hid-descr-addr = <0x20>;
 340
 341                 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
 342         };
 343 };
 344
 345 &i2c5 {
 346         status = "okay";
 347         clock-frequency = <400000>;
 348
 349         tsc1: hid@10 {
 350                 compatible = "hid-over-i2c";
 351                 reg = <0x10>;
 352                 hid-descr-addr = <0x1>;
 353
 354                 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
 355
 356                 pinctrl-names = "default";
 357                 pinctrl-0 = <&i2c5_hid_active>;
 358         };
 359 };
 360
 361 &i2c10 {
 362         status = "okay";
 363         clock-frequency = <400000>;
 364
 365         sn65dsi86: bridge@2c {
 366                 compatible = "ti,sn65dsi86";
 367                 reg = <0x2c>;
 368                 pinctrl-names = "default";
 369                 pinctrl-0 = <&sn65dsi86_pin_active>;
 370
 371                 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
 372
 373                 vpll-supply = <&vreg_l14a_1p88>;
 374                 vccio-supply = <&vreg_l14a_1p88>;
 375
 376                 clocks = <&sn65dsi86_refclk>;
 377                 clock-names = "refclk";
 378
 379                 no-hpd;
 380
 381                 ports {
 382                         #address-cells = <1>;
 383                         #size-cells = <0>;
 384
 385                         port@0 {
 386                                 reg = <0>;
 387                                 sn65dsi86_in_a: endpoint {
 388                                         remote-endpoint = <&dsi0_out>;
 389                                 };
 390                         };
 391
 392                         port@1 {
 393                                 reg = <1>;
 394                                 sn65dsi86_out: endpoint {
 395                                         remote-endpoint = <&panel_in_edp>;
 396                                 };
 397                         };
 398                 };
 399         };
 400 };
 401
 402 &i2c11 {
 403         status = "okay";
 404         clock-frequency = <400000>;
 405
 406         ecsh: hid@5c {
 407                 compatible = "hid-over-i2c";
 408                 reg = <0x5c>;
 409                 hid-descr-addr = <0x1>;
 410
 411                 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
 412
 413                 pinctrl-names = "default";
 414                 pinctrl-0 = <&i2c11_hid_active>;
 415         };
 416 };
 417
 418 &ipa {
 419         status = "okay";
 420         memory-region = <&ipa_fw_mem>;
 421 };
 422
 423 &mdss {
 424         status = "okay";
 425 };
 426
 427 &mdss_mdp {
 428         status = "okay";
 429 };
 430
 431 &mss_pil {
 432         firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
 433 };
 434
 435 &qup_i2c10_default {
 436         pinconf {
 437                 pins = "gpio55", "gpio56";
 438                 drive-strength = <2>;
 439                 bias-disable;
 440         };
 441 };
 442
 443 &qup_i2c12_default {
 444         drive-strength = <2>;
 445         bias-disable;
 446 };
 447
 448 &qup_uart6_default {
 449         pinmux {
 450                  pins = "gpio45", "gpio46", "gpio47", "gpio48";
 451                  function = "qup6";
 452         };
 453
 454         cts {
 455                 pins = "gpio45";
 456                 bias-pull-down;
 457         };
 458
 459         rts-tx {
 460                 pins = "gpio46", "gpio47";
 461                 drive-strength = <2>;
 462                 bias-disable;
 463         };
 464
 465         rx {
 466                 pins = "gpio48";
 467                 bias-pull-up;
 468         };
 469 };
 470
 471 &qupv3_id_0 {
 472         status = "okay";
 473 };
 474
 475 &qupv3_id_1 {
 476         status = "okay";
 477 };
 478
 479 &q6asmdai {
 480         dai@0 {
 481                 reg = <0>;
 482         };
 483
 484         dai@1 {
 485                 reg = <1>;
 486         };
 487 };
 488
 489 &sound {
 490         compatible = "qcom,db845c-sndcard";
 491         model = "Lenovo-YOGA-C630-13Q50";
 492
 493         audio-routing =
 494                 "RX_BIAS", "MCLK",
 495                 "AMIC2", "MIC BIAS2",
 496                 "SpkrLeft IN", "SPK1 OUT",
 497                 "SpkrRight IN", "SPK2 OUT",
 498                 "MM_DL1",  "MultiMedia1 Playback",
 499                 "MultiMedia2 Capture", "MM_UL2";
 500
 501         mm1-dai-link {
 502                 link-name = "MultiMedia1";
 503                 cpu {
 504                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
 505                 };
 506         };
 507
 508         mm2-dai-link {
 509                 link-name = "MultiMedia2";
 510                 cpu {
 511                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
 512                 };
 513         };
 514
 515         slim-dai-link {
 516                 link-name = "SLIM Playback";
 517                 cpu {
 518                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
 519                 };
 520
 521                 platform {
 522                         sound-dai = <&q6routing>;
 523                 };
 524
 525                 codec {
 526                         sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
 527                 };
 528         };
 529
 530         slimcap-dai-link {
 531                 link-name = "SLIM Capture";
 532                 cpu {
 533                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
 534                 };
 535
 536                 platform {
 537                         sound-dai = <&q6routing>;
 538                 };
 539
 540                 codec {
 541                         sound-dai = <&wcd9340 1>;
 542                 };
 543         };
 544 };
 545
 546 &tlmm {
 547         gpio-reserved-ranges = <0 4>, <81 4>;
 548
 549         sn65dsi86_pin_active: sn65dsi86-enable {
 550                 pins = "gpio96";
 551                 drive-strength = <2>;
 552                 bias-disable;
 553         };
 554
 555         i2c3_hid_active: i2c2-hid-active {
 556                 pins = "gpio37";
 557                 function = "gpio";
 558
 559                 input-enable;
 560                 bias-pull-up;
 561                 drive-strength = <2>;
 562         };
 563
 564         i2c5_hid_active: i2c5-hid-active {
 565                 pins = "gpio125";
 566                 function = "gpio";
 567
 568                 input-enable;
 569                 bias-pull-up;
 570                 drive-strength = <2>;
 571         };
 572
 573         i2c11_hid_active: i2c11-hid-active {
 574                 pins = "gpio92";
 575                 function = "gpio";
 576
 577                 input-enable;
 578                 bias-pull-up;
 579                 drive-strength = <2>;
 580         };
 581
 582         wcd_intr_default: wcd_intr_default {
 583                 pins = "gpio54";
 584                 function = "gpio";
 585
 586                 input-enable;
 587                 bias-pull-down;
 588                 drive-strength = <2>;
 589         };
 590
 591         lid_pin_active: lid-pin {
 592                 pins = "gpio124";
 593                 function = "gpio";
 594
 595                 input-enable;
 596                 bias-disable;
 597         };
 598
 599         mode_pin_active: mode-pin {
 600                 pins = "gpio95";
 601                 function = "gpio";
 602
 603                 input-enable;
 604                 bias-disable;
 605         };
 606 };
 607
 608 &uart6 {
 609         status = "okay";
 610
 611         bluetooth {
 612                 compatible = "qcom,wcn3990-bt";
 613
 614                 vddio-supply = <&vreg_s4a_1p8>;
 615                 vddxo-supply = <&vreg_l7a_1p8>;
 616                 vddrf-supply = <&vreg_l17a_1p3>;
 617                 vddch0-supply = <&vreg_l25a_3p3>;
 618                 max-speed = <3200000>;
 619         };
 620 };
 621
 622 &ufs_mem_hc {
 623         status = "okay";
 624
 625         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
 626
 627         vcc-supply = <&vreg_l20a_2p95>;
 628         vcc-max-microamp = <600000>;
 629 };
 630
 631 &ufs_mem_phy {
 632         status = "okay";
 633
 634         vdda-phy-supply = <&vdda_ufs1_core>;
 635         vdda-pll-supply = <&vdda_ufs1_1p2>;
 636 };
 637
 638 &usb_1 {
 639         status = "okay";
 640 };
 641
 642 &usb_1_dwc3 {
 643         dr_mode = "host";
 644 };
 645
 646 &usb_1_hsphy {
 647         status = "okay";
 648
 649         vdd-supply = <&vdda_usb1_ss_core>;
 650         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 651         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 652
 653         qcom,imp-res-offset-value = <8>;
 654         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
 655         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
 656         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
 657 };
 658
 659 &usb_1_qmpphy {
 660         status = "okay";
 661
 662         vdda-phy-supply = <&vdda_usb1_ss_1p2>;
 663         vdda-pll-supply = <&vdda_usb1_ss_core>;
 664 };
 665
 666 &usb_2 {
 667         status = "okay";
 668 };
 669
 670 &usb_2_dwc3 {
 671         dr_mode = "host";
 672 };
 673
 674 &usb_2_hsphy {
 675         status = "okay";
 676
 677         vdd-supply = <&vdda_usb2_ss_core>;
 678         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 679         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 680
 681         qcom,imp-res-offset-value = <8>;
 682         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
 683 };
 684
 685 &usb_2_qmpphy {
 686         status = "okay";
 687
 688         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
 689         vdda-pll-supply = <&vdda_usb2_ss_core>;
 690 };
 691
 692 &wcd9340{
 693         pinctrl-0 = <&wcd_intr_default>;
 694         pinctrl-names = "default";
 695         clock-names = "extclk";
 696         clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
 697         reset-gpios = <&tlmm 64 0>;
 698         vdd-buck-supply = <&vreg_s4a_1p8>;
 699         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 700         vdd-tx-supply = <&vreg_s4a_1p8>;
 701         vdd-rx-supply = <&vreg_s4a_1p8>;
 702         vdd-io-supply = <&vreg_s4a_1p8>;
 703
 704         swm: swm@c85 {
 705                 left_spkr: wsa8810-left{
 706                         compatible = "sdw10217211000";
 707                         reg = <0 3>;
 708                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
 709                         #thermal-sensor-cells = <0>;
 710                         sound-name-prefix = "SpkrLeft";
 711                         #sound-dai-cells = <0>;
 712                 };
 713
 714                 right_spkr: wsa8810-right{
 715                         compatible = "sdw10217211000";
 716                         powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
 717                         reg = <0 4>;
 718                         #thermal-sensor-cells = <0>;
 719                         sound-name-prefix = "SpkrRight";
 720                         #sound-dai-cells = <0>;
 721                 };
 722         };
 723 };
 724
 725 &wifi {
 726         status = "okay";
 727
 728         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
 729         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
 730         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
 731         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
 732
 733         qcom,snoc-host-cap-8bit-quirk;
 734 };