Merge tag 'docs-5.15' of git://git.lwn.net/linux
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / qcom / sdm845-oneplus-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * SDM845 OnePlus 6(T) (enchilada / fajita) common device tree source
4  *
5  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
6  */
7
8 /dts-v1/;
9
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/linux-event-codes.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13
14 #include "sdm845.dtsi"
15 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi"
17
18 /delete-node/ &rmtfs_mem;
19
20 / {
21         aliases {
22                 serial0 = &uart9;
23                 hsuart0 = &uart6;
24         };
25
26         chosen {
27                 stdout-path = "serial0:115200n8";
28         };
29
30         gpio-keys {
31                 compatible = "gpio-keys";
32                 label = "Volume keys";
33                 autorepeat;
34
35                 pinctrl-names = "default";
36                 pinctrl-0 = <&volume_down_gpio &volume_up_gpio>;
37
38                 vol-down {
39                         label = "Volume down";
40                         linux,code = <KEY_VOLUMEDOWN>;
41                         gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
42                         debounce-interval = <15>;
43                 };
44
45                 vol-up {
46                         label = "Volume up";
47                         linux,code = <KEY_VOLUMEUP>;
48                         gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
49                         debounce-interval = <15>;
50                 };
51         };
52
53         reserved-memory {
54                 /* The rmtfs_mem needs to be guarded due to "XPU limitations"
55                  * it is otherwise possible for an allocation adjacent to the
56                  * rmtfs_mem region to trigger an XPU violation, causing a crash.
57                  */
58                 rmtfs_lower_guard: memory@f5b00000 {
59                         no-map;
60                         reg = <0 0xf5b00000 0 0x1000>;
61                 };
62                 /*
63                  * The rmtfs memory region in downstream is 'dynamically allocated'
64                  * but given the same address every time. Hard code it as this address is
65                  * where the modem firmware expects it to be.
66                  */
67                 rmtfs_mem: memory@f5b01000 {
68                         compatible = "qcom,rmtfs-mem";
69                         reg = <0 0xf5b01000 0 0x200000>;
70                         no-map;
71
72                         qcom,client-id = <1>;
73                         qcom,vmid = <15>;
74                 };
75                 rmtfs_upper_guard: memory@f5d01000 {
76                         no-map;
77                         reg = <0 0xf5d01000 0 0x1000>;
78                 };
79
80                 /*
81                  * It seems like reserving the old rmtfs_mem region is also needed to prevent
82                  * random crashes which are most likely modem related, more testing needed.
83                  */
84                 removed_region: memory@88f00000 {
85                         no-map;
86                         reg = <0 0x88f00000 0 0x1c00000>;
87                 };
88
89                 ramoops: ramoops@ac300000 {
90                         compatible = "ramoops";
91                         reg = <0 0xac300000 0 0x400000>;
92                         record-size = <0x40000>;
93                         console-size = <0x40000>;
94                         ftrace-size = <0x40000>;
95                         pmsg-size = <0x200000>;
96                         devinfo-size = <0x1000>;
97                         ecc-size = <16>;
98                 };
99         };
100
101         vph_pwr: vph-pwr-regulator {
102                 compatible = "regulator-fixed";
103                 regulator-name = "vph_pwr";
104                 regulator-min-microvolt = <3700000>;
105                 regulator-max-microvolt = <3700000>;
106         };
107
108         /*
109          * Apparently RPMh does not provide support for PM8998 S4 because it
110          * is always-on; model it as a fixed regulator.
111          */
112         vreg_s4a_1p8: pm8998-smps4 {
113                 compatible = "regulator-fixed";
114                 regulator-name = "vreg_s4a_1p8";
115
116                 regulator-min-microvolt = <1800000>;
117                 regulator-max-microvolt = <1800000>;
118
119                 regulator-always-on;
120                 regulator-boot-on;
121
122                 vin-supply = <&vph_pwr>;
123         };
124
125         /*
126          * The touchscreen regulator seems to be controlled somehow by a gpio.
127          * Model it as a fixed regulator and keep it on. Without schematics we
128          * don't know how this is actually wired up...
129          */
130         ts_1p8_supply: ts-1p8-regulator {
131                 compatible = "regulator-fixed";
132                 regulator-name = "ts_1p8_supply";
133
134                 regulator-min-microvolt = <1800000>;
135                 regulator-max-microvolt = <1800000>;
136
137                 gpio = <&tlmm 88 0>;
138                 enable-active-high;
139                 regulator-boot-on;
140         };
141 };
142
143 &adsp_pas {
144         status = "okay";
145         firmware-name = "qcom/sdm845/oneplus6/adsp.mbn";
146 };
147
148 &apps_rsc {
149         pm8998-rpmh-regulators {
150                 compatible = "qcom,pm8998-rpmh-regulators";
151                 qcom,pmic-id = "a";
152
153                 vdd-s1-supply = <&vph_pwr>;
154                 vdd-s2-supply = <&vph_pwr>;
155                 vdd-s3-supply = <&vph_pwr>;
156                 vdd-s4-supply = <&vph_pwr>;
157                 vdd-s5-supply = <&vph_pwr>;
158                 vdd-s6-supply = <&vph_pwr>;
159                 vdd-s7-supply = <&vph_pwr>;
160                 vdd-s8-supply = <&vph_pwr>;
161                 vdd-s9-supply = <&vph_pwr>;
162                 vdd-s10-supply = <&vph_pwr>;
163                 vdd-s11-supply = <&vph_pwr>;
164                 vdd-s12-supply = <&vph_pwr>;
165                 vdd-s13-supply = <&vph_pwr>;
166                 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
167                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
168                 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
169                 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
170                 vdd-l6-supply = <&vph_pwr>;
171                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
172                 vdd-l9-supply = <&vreg_bob>;
173                 vdd-l10-l23-l25-supply = <&vreg_bob>;
174                 vdd-l13-l19-l21-supply = <&vreg_bob>;
175                 vdd-l16-l28-supply = <&vreg_bob>;
176                 vdd-l18-l22-supply = <&vreg_bob>;
177                 vdd-l20-l24-supply = <&vreg_bob>;
178                 vdd-l26-supply = <&vreg_s3a_1p35>;
179                 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
180
181                 vreg_s3a_1p35: smps3 {
182                         regulator-min-microvolt = <1352000>;
183                         regulator-max-microvolt = <1352000>;
184                 };
185
186                 vreg_s5a_2p04: smps5 {
187                         regulator-min-microvolt = <1904000>;
188                         regulator-max-microvolt = <2040000>;
189                 };
190
191                 vreg_s7a_1p025: smps7 {
192                         regulator-min-microvolt = <900000>;
193                         regulator-max-microvolt = <1028000>;
194                 };
195
196                 vdda_mipi_dsi0_pll:
197                 vdda_qlink_lv:
198                 vdda_ufs1_core:
199                 vdda_usb1_ss_core:
200                 vreg_l1a_0p875: ldo1 {
201                         regulator-min-microvolt = <880000>;
202                         regulator-max-microvolt = <880000>;
203                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
204                 };
205
206                 vreg_l2a_1p2: ldo2 {
207                         regulator-min-microvolt = <1200000>;
208                         regulator-max-microvolt = <1200000>;
209                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
210                         regulator-always-on;
211                 };
212
213                 vreg_l5a_0p8: ldo5 {
214                         regulator-min-microvolt = <800000>;
215                         regulator-max-microvolt = <800000>;
216                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
217                 };
218
219                 vreg_l7a_1p8: ldo7 {
220                         regulator-min-microvolt = <1800000>;
221                         regulator-max-microvolt = <1800000>;
222                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223                 };
224
225                 vdda_qusb_hs0_1p8:
226                 vreg_l12a_1p8: ldo12 {
227                         regulator-min-microvolt = <1800000>;
228                         regulator-max-microvolt = <1800000>;
229                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
230                 };
231
232                 vreg_l14a_1p88: ldo14 {
233                         regulator-min-microvolt = <1800000>;
234                         regulator-max-microvolt = <1800000>;
235                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
236                         regulator-always-on;
237                 };
238
239                 vreg_l17a_1p3: ldo17 {
240                         regulator-min-microvolt = <1304000>;
241                         regulator-max-microvolt = <1304000>;
242                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243                 };
244
245                 vreg_l20a_2p95: ldo20 {
246                         regulator-min-microvolt = <2704000>;
247                         regulator-max-microvolt = <2960000>;
248                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
249                 };
250
251                 vdda_qusb_hs0_3p1:
252                 vreg_l24a_3p075: ldo24 {
253                         regulator-min-microvolt = <3088000>;
254                         regulator-max-microvolt = <3088000>;
255                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256                 };
257
258                 vreg_l25a_3p3: ldo25 {
259                         regulator-min-microvolt = <3300000>;
260                         regulator-max-microvolt = <3312000>;
261                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
262                 };
263
264                 vdda_mipi_dsi0_1p2:
265                 vdda_ufs1_1p2:
266                 vreg_l26a_1p2: ldo26 {
267                         regulator-min-microvolt = <1200000>;
268                         regulator-max-microvolt = <1200000>;
269                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
270                 };
271
272                 vreg_l28a_3p0: ldo28 {
273                         regulator-min-microvolt = <2856000>;
274                         regulator-max-microvolt = <3008000>;
275                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
276                 };
277         };
278
279         pmi8998-rpmh-regulators {
280                 compatible = "qcom,pmi8998-rpmh-regulators";
281                 qcom,pmic-id = "b";
282
283                 vdd-bob-supply = <&vph_pwr>;
284
285                 vreg_bob: bob {
286                         regulator-min-microvolt = <3312000>;
287                         regulator-max-microvolt = <3600000>;
288                         regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
289                         regulator-allow-bypass;
290                 };
291         };
292
293         pm8005-rpmh-regulators {
294                 compatible = "qcom,pm8005-rpmh-regulators";
295                 qcom,pmic-id = "c";
296
297                 vdd-s1-supply = <&vph_pwr>;
298                 vdd-s2-supply = <&vph_pwr>;
299                 vdd-s3-supply = <&vph_pwr>;
300                 vdd-s4-supply = <&vph_pwr>;
301
302                 vreg_s3c_0p6: smps3 {
303                         regulator-min-microvolt = <600000>;
304                         regulator-max-microvolt = <600000>;
305                 };
306         };
307 };
308
309 &cdsp_pas {
310         status = "okay";
311         firmware-name = "qcom/sdm845/oneplus6/cdsp.mbn";
312 };
313
314 &dsi0 {
315         status = "okay";
316         vdda-supply = <&vdda_mipi_dsi0_1p2>;
317
318         #address-cells = <1>;
319         #size-cells = <0>;
320
321         /*
322          * Both devices use different panels but all other properties
323          * are common. Compatible line is declared in device dts.
324          */
325         display_panel: panel@0 {
326                 status = "disabled";
327
328                 #address-cells = <1>;
329                 #size-cells = <0>;
330                 reg = <0>;
331
332                 vddio-supply = <&vreg_l14a_1p88>;
333
334                 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
335
336                 pinctrl-names = "default";
337                 pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;
338
339                 port {
340                         panel_in: endpoint {
341                                 remote-endpoint = <&dsi0_out>;
342                         };
343                 };
344         };
345 };
346
347 &dsi0_out {
348         remote-endpoint = <&panel_in>;
349         data-lanes = <0 1 2 3>;
350 };
351
352 &dsi0_phy {
353         status = "okay";
354         vdds-supply = <&vdda_mipi_dsi0_pll>;
355 };
356
357 &gcc {
358         protected-clocks = <GCC_QSPI_CORE_CLK>,
359                                 <GCC_QSPI_CORE_CLK_SRC>,
360                                 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
361                                 <GCC_LPASS_Q6_AXI_CLK>,
362                                 <GCC_LPASS_SWAY_CLK>;
363 };
364
365 &gpu {
366         zap-shader {
367                 memory-region = <&gpu_mem>;
368                 firmware-name = "qcom/sdm845/oneplus6/a630_zap.mbn";
369         };
370 };
371
372 &i2c12 {
373         status = "okay";
374         clock-frequency = <400000>;
375
376         synaptics-rmi4-i2c@20 {
377                 compatible = "syna,rmi4-i2c";
378                 reg = <0x20>;
379                 #address-cells = <1>;
380                 #size-cells = <0>;
381                 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
382
383                 pinctrl-names = "default";
384                 pinctrl-0 = <&ts_default_pins>;
385
386                 vdd-supply = <&vreg_l28a_3p0>;
387                 vio-supply = <&ts_1p8_supply>;
388
389                 syna,reset-delay-ms = <200>;
390                 syna,startup-delay-ms = <200>;
391
392                 rmi4-f01@1 {
393                         reg = <0x01>;
394                         syna,nosleep-mode = <1>;
395                 };
396
397                 rmi4_f12: rmi4-f12@12 {
398                         reg = <0x12>;
399                         touchscreen-x-mm = <68>;
400                         touchscreen-y-mm = <144>;
401                         syna,sensor-type = <1>;
402                         syna,rezero-wait-ms = <200>;
403                 };
404         };
405 };
406
407 &ipa {
408         status = "okay";
409
410         memory-region = <&ipa_fw_mem>;
411         firmware-name = "qcom/sdm845/oneplus6/ipa_fws.mbn";
412 };
413
414 &mdss {
415         status = "okay";
416 };
417
418 &mdss_mdp {
419         status = "okay";
420 };
421
422 /* Modem/wifi*/
423 &mss_pil {
424         status = "okay";
425         firmware-name = "qcom/sdm845/oneplus6/mba.mbn", "qcom/sdm845/oneplus6/modem.mbn";
426 };
427
428 &pm8998_gpio {
429         volume_down_gpio: pm8998_gpio5 {
430                 pinconf {
431                         pins = "gpio5";
432                         function = "normal";
433                         input-enable;
434                         bias-pull-up;
435                         qcom,drive-strength = <0>;
436                 };
437         };
438
439         volume_up_gpio: pm8998_gpio6 {
440                 pinconf {
441                         pins = "gpio6";
442                         function = "normal";
443                         input-enable;
444                         bias-pull-up;
445                         qcom,drive-strength = <0>;
446                 };
447         };
448 };
449
450 &qupv3_id_1 {
451         status = "okay";
452 };
453
454 &qupv3_id_0 {
455         status = "okay";
456 };
457
458 &qup_i2c12_default {
459         mux {
460                 pins = "gpio49", "gpio50";
461                 function = "qup12";
462                 drive-strength = <2>;
463                 bias-disable;
464         };
465 };
466
467 &qup_i2c10_default {
468         pinconf {
469                 pins = "gpio55", "gpio56";
470                 drive-strength = <2>;
471                 bias-disable;
472         };
473 };
474
475 &qup_uart9_default {
476         pinconf-tx {
477                 pins = "gpio4";
478                 drive-strength = <2>;
479                 bias-disable;
480         };
481
482         pinconf-rx {
483                 pins = "gpio5";
484                 drive-strength = <2>;
485                 bias-pull-up;
486         };
487 };
488
489 /*
490  * Prevent garbage data on bluetooth UART lines
491  */
492 &qup_uart6_default {
493         pinmux {
494                 pins = "gpio45", "gpio46", "gpio47", "gpio48";
495                 function = "qup6";
496         };
497
498         cts {
499                 pins = "gpio45";
500                 bias-pull-down;
501         };
502
503         rts-tx {
504                 pins = "gpio46", "gpio47";
505                 drive-strength = <2>;
506                 bias-disable;
507         };
508
509         rx {
510                 pins = "gpio48";
511                 bias-pull-up;
512         };
513 };
514
515 &uart6 {
516         status = "okay";
517
518         bluetooth {
519                 compatible = "qcom,wcn3990-bt";
520
521                 /*
522                  * This path is relative to the qca/
523                  * subdir under lib/firmware.
524                  */
525                 firmware-name = "oneplus6/crnv21.bin";
526
527                 vddio-supply = <&vreg_s4a_1p8>;
528                 vddxo-supply = <&vreg_l7a_1p8>;
529                 vddrf-supply = <&vreg_l17a_1p3>;
530                 vddch0-supply = <&vreg_l25a_3p3>;
531                 max-speed = <3200000>;
532         };
533 };
534
535 &uart9 {
536         label = "LS-UART1";
537         status = "okay";
538 };
539
540 &ufs_mem_hc {
541         status = "okay";
542
543         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
544
545         vcc-supply = <&vreg_l20a_2p95>;
546         vcc-max-microamp = <600000>;
547 };
548
549 &ufs_mem_phy {
550         status = "okay";
551
552         vdda-phy-supply = <&vdda_ufs1_core>;
553         vdda-pll-supply = <&vdda_ufs1_1p2>;
554 };
555
556 &usb_1 {
557         status = "okay";
558
559         /*
560          * disable USB3 clock requirement as the device only supports
561          * USB2.
562          */
563         qcom,select-utmi-as-pipe-clk;
564 };
565
566 &usb_1_dwc3 {
567         /*
568          * We don't have the capability to switch modes yet.
569          */
570         dr_mode = "peripheral";
571
572         /* fastest mode for USB 2 */
573         maximum-speed = "high-speed";
574
575         /* Remove USB3 phy as it's unused on this device. */
576         phys = <&usb_1_hsphy>;
577         phy-names = "usb2-phy";
578 };
579
580 &usb_1_hsphy {
581         status = "okay";
582
583         vdd-supply = <&vdda_usb1_ss_core>;
584         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
585         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
586
587         qcom,imp-res-offset-value = <8>;
588         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
589         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
590         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
591 };
592
593 &tlmm {
594         gpio-reserved-ranges = <0 4>, <81 4>;
595
596         tri_state_key_default: tri_state_key_default {
597                 mux {
598                         pins = "gpio40", "gpio42", "gpio26";
599                         function = "gpio";
600                         drive-strength = <2>;
601                         bias-disable;
602                 };
603         };
604
605         ts_default_pins: ts-int {
606                 mux {
607                         pins = "gpio99", "gpio125";
608                         function = "gpio";
609                         drive-strength = <16>;
610                         bias-pull-up;
611                 };
612         };
613
614         panel_reset_pins: panel-reset {
615                 mux {
616                         pins = "gpio6", "gpio25", "gpio26";
617                         function = "gpio";
618                         drive-strength = <8>;
619                         bias-disable = <0>;
620                 };
621         };
622
623         panel_te_pin: panel-te {
624                 mux {
625                         pins = "gpio10";
626                         function = "mdp_vsync";
627                         drive-strength = <2>;
628                         bias-disable;
629                         input-enable;
630                 };
631         };
632
633         panel_esd_pin: panel-esd {
634                 mux {
635                         pins = "gpio30";
636                         function = "gpio";
637                         drive-strength = <2>;
638                         bias-pull-down;
639                         input-enable;
640                 };
641         };
642 };
643
644 &wifi {
645         status = "okay";
646         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
647         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
648         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
649         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
650
651         qcom,snoc-host-cap-8bit-quirk;
652 };