Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / qcom / sdm845-db845c.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2019, Linaro Ltd.
4  */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi"
14 #include "pm8998.dtsi"
15 #include "pmi8998.dtsi"
16
17 / {
18         model = "Thundercomm Dragonboard 845c";
19         compatible = "thundercomm,db845c", "qcom,sdm845";
20
21         aliases {
22                 serial0 = &uart9;
23                 hsuart0 = &uart6;
24         };
25
26         chosen {
27                 stdout-path = "serial0:115200n8";
28         };
29
30         dc12v: dc12v-regulator {
31                 compatible = "regulator-fixed";
32                 regulator-name = "DC12V";
33                 regulator-min-microvolt = <12000000>;
34                 regulator-max-microvolt = <12000000>;
35                 regulator-always-on;
36         };
37
38         gpio_keys {
39                 compatible = "gpio-keys";
40                 autorepeat;
41
42                 pinctrl-names = "default";
43                 pinctrl-0 = <&vol_up_pin_a>;
44
45                 vol-up {
46                         label = "Volume Up";
47                         linux,code = <KEY_VOLUMEUP>;
48                         gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
49                 };
50         };
51
52         leds {
53                 compatible = "gpio-leds";
54
55                 user4 {
56                         label = "green:user4";
57                         gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
58                         linux,default-trigger = "panic-indicator";
59                         default-state = "off";
60                 };
61
62                 wlan {
63                         label = "yellow:wlan";
64                         gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
65                         linux,default-trigger = "phy0tx";
66                         default-state = "off";
67                 };
68
69                 bt {
70                         label = "blue:bt";
71                         gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
72                         linux,default-trigger = "bluetooth-power";
73                         default-state = "off";
74                 };
75         };
76
77         hdmi-out {
78                 compatible = "hdmi-connector";
79                 type = "a";
80
81                 port {
82                         hdmi_con: endpoint {
83                                 remote-endpoint = <&lt9611_out>;
84                         };
85                 };
86         };
87
88         lt9611_1v8: lt9611-vdd18-regulator {
89                 compatible = "regulator-fixed";
90                 regulator-name = "LT9611_1V8";
91
92                 vin-supply = <&vdc_5v>;
93                 regulator-min-microvolt = <1800000>;
94                 regulator-max-microvolt = <1800000>;
95
96                 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
97                 enable-active-high;
98         };
99
100         lt9611_3v3: lt9611-3v3 {
101                 compatible = "regulator-fixed";
102                 regulator-name = "LT9611_3V3";
103
104                 vin-supply = <&vdc_3v3>;
105                 regulator-min-microvolt = <3300000>;
106                 regulator-max-microvolt = <3300000>;
107
108                 // TODO: make it possible to drive same GPIO from two clients
109                 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
110                 // enable-active-high;
111         };
112
113         pcie0_1p05v: pcie-0-1p05v-regulator {
114                 compatible = "regulator-fixed";
115                 regulator-name = "PCIE0_1.05V";
116
117                 vin-supply = <&vbat>;
118                 regulator-min-microvolt = <1050000>;
119                 regulator-max-microvolt = <1050000>;
120
121                 // TODO: make it possible to drive same GPIO from two clients
122                 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
123                 // enable-active-high;
124         };
125
126         cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
127                 compatible = "regulator-fixed";
128                 regulator-name = "CAM0_DVDD_1V2";
129                 regulator-min-microvolt = <1200000>;
130                 regulator-max-microvolt = <1200000>;
131                 enable-active-high;
132                 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
133                 pinctrl-names = "default";
134                 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
135                 vin-supply = <&vbat>;
136         };
137
138         cam0_avdd_2v8: reg_cam0_avdd_2v8 {
139                 compatible = "regulator-fixed";
140                 regulator-name = "CAM0_AVDD_2V8";
141                 regulator-min-microvolt = <2800000>;
142                 regulator-max-microvolt = <2800000>;
143                 enable-active-high;
144                 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
145                 pinctrl-names = "default";
146                 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
147                 vin-supply = <&vbat>;
148         };
149
150         /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
151         cam3_avdd_2v8: reg_cam3_avdd_2v8 {
152                 compatible = "regulator-fixed";
153                 regulator-name = "CAM3_AVDD_2V8";
154                 regulator-min-microvolt = <2800000>;
155                 regulator-max-microvolt = <2800000>;
156                 regulator-always-on;
157                 vin-supply = <&vbat>;
158         };
159
160         pcie0_3p3v_dual: vldo-3v3-regulator {
161                 compatible = "regulator-fixed";
162                 regulator-name = "VLDO_3V3";
163
164                 vin-supply = <&vbat>;
165                 regulator-min-microvolt = <3300000>;
166                 regulator-max-microvolt = <3300000>;
167
168                 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
169                 enable-active-high;
170
171                 pinctrl-names = "default";
172                 pinctrl-0 = <&pcie0_pwren_state>;
173         };
174
175         v5p0_hdmiout: v5p0-hdmiout-regulator {
176                 compatible = "regulator-fixed";
177                 regulator-name = "V5P0_HDMIOUT";
178
179                 vin-supply = <&vdc_5v>;
180                 regulator-min-microvolt = <500000>;
181                 regulator-max-microvolt = <500000>;
182
183                 // TODO: make it possible to drive same GPIO from two clients
184                 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
185                 // enable-active-high;
186         };
187
188         vbat: vbat-regulator {
189                 compatible = "regulator-fixed";
190                 regulator-name = "VBAT";
191
192                 vin-supply = <&dc12v>;
193                 regulator-min-microvolt = <4200000>;
194                 regulator-max-microvolt = <4200000>;
195                 regulator-always-on;
196         };
197
198         vbat_som: vbat-som-regulator {
199                 compatible = "regulator-fixed";
200                 regulator-name = "VBAT_SOM";
201
202                 vin-supply = <&dc12v>;
203                 regulator-min-microvolt = <4200000>;
204                 regulator-max-microvolt = <4200000>;
205                 regulator-always-on;
206         };
207
208         vdc_3v3: vdc-3v3-regulator {
209                 compatible = "regulator-fixed";
210                 regulator-name = "VDC_3V3";
211                 vin-supply = <&dc12v>;
212                 regulator-min-microvolt = <3300000>;
213                 regulator-max-microvolt = <3300000>;
214                 regulator-always-on;
215         };
216
217         vdc_5v: vdc-5v-regulator {
218                 compatible = "regulator-fixed";
219                 regulator-name = "VDC_5V";
220
221                 vin-supply = <&dc12v>;
222                 regulator-min-microvolt = <500000>;
223                 regulator-max-microvolt = <500000>;
224                 regulator-always-on;
225         };
226
227         vreg_s4a_1p8: vreg-s4a-1p8 {
228                 compatible = "regulator-fixed";
229                 regulator-name = "vreg_s4a_1p8";
230
231                 regulator-min-microvolt = <1800000>;
232                 regulator-max-microvolt = <1800000>;
233                 regulator-always-on;
234         };
235
236         vph_pwr: vph-pwr-regulator {
237                 compatible = "regulator-fixed";
238                 regulator-name = "vph_pwr";
239
240                 vin-supply = <&vbat_som>;
241         };
242 };
243
244 &adsp_pas {
245         status = "okay";
246
247         firmware-name = "qcom/sdm845/adsp.mbn";
248 };
249
250 &apps_rsc {
251         pm8998-rpmh-regulators {
252                 compatible = "qcom,pm8998-rpmh-regulators";
253                 qcom,pmic-id = "a";
254                 vdd-s1-supply = <&vph_pwr>;
255                 vdd-s2-supply = <&vph_pwr>;
256                 vdd-s3-supply = <&vph_pwr>;
257                 vdd-s4-supply = <&vph_pwr>;
258                 vdd-s5-supply = <&vph_pwr>;
259                 vdd-s6-supply = <&vph_pwr>;
260                 vdd-s7-supply = <&vph_pwr>;
261                 vdd-s8-supply = <&vph_pwr>;
262                 vdd-s9-supply = <&vph_pwr>;
263                 vdd-s10-supply = <&vph_pwr>;
264                 vdd-s11-supply = <&vph_pwr>;
265                 vdd-s12-supply = <&vph_pwr>;
266                 vdd-s13-supply = <&vph_pwr>;
267                 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
268                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
269                 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
270                 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
271                 vdd-l6-supply = <&vph_pwr>;
272                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
273                 vdd-l9-supply = <&vreg_bob>;
274                 vdd-l10-l23-l25-supply = <&vreg_bob>;
275                 vdd-l13-l19-l21-supply = <&vreg_bob>;
276                 vdd-l16-l28-supply = <&vreg_bob>;
277                 vdd-l18-l22-supply = <&vreg_bob>;
278                 vdd-l20-l24-supply = <&vreg_bob>;
279                 vdd-l26-supply = <&vreg_s3a_1p35>;
280                 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
281
282                 vreg_s3a_1p35: smps3 {
283                         regulator-min-microvolt = <1352000>;
284                         regulator-max-microvolt = <1352000>;
285                 };
286
287                 vreg_s5a_2p04: smps5 {
288                         regulator-min-microvolt = <1904000>;
289                         regulator-max-microvolt = <2040000>;
290                 };
291
292                 vreg_s7a_1p025: smps7 {
293                         regulator-min-microvolt = <900000>;
294                         regulator-max-microvolt = <1028000>;
295                 };
296
297                 vreg_l1a_0p875: ldo1 {
298                         regulator-min-microvolt = <880000>;
299                         regulator-max-microvolt = <880000>;
300                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301                 };
302
303                 vreg_l5a_0p8: ldo5 {
304                         regulator-min-microvolt = <800000>;
305                         regulator-max-microvolt = <800000>;
306                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
307                 };
308
309                 vreg_l12a_1p8: ldo12 {
310                         regulator-min-microvolt = <1800000>;
311                         regulator-max-microvolt = <1800000>;
312                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313                 };
314
315                 vreg_l7a_1p8: ldo7 {
316                         regulator-min-microvolt = <1800000>;
317                         regulator-max-microvolt = <1800000>;
318                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
319                 };
320
321                 vreg_l13a_2p95: ldo13 {
322                         regulator-min-microvolt = <1800000>;
323                         regulator-max-microvolt = <2960000>;
324                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
325                 };
326
327                 vreg_l17a_1p3: ldo17 {
328                         regulator-min-microvolt = <1304000>;
329                         regulator-max-microvolt = <1304000>;
330                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
331                 };
332
333                 vreg_l20a_2p95: ldo20 {
334                         regulator-min-microvolt = <2960000>;
335                         regulator-max-microvolt = <2968000>;
336                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337                 };
338
339                 vreg_l21a_2p95: ldo21 {
340                         regulator-min-microvolt = <2960000>;
341                         regulator-max-microvolt = <2968000>;
342                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343                 };
344
345                 vreg_l24a_3p075: ldo24 {
346                         regulator-min-microvolt = <3088000>;
347                         regulator-max-microvolt = <3088000>;
348                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349                 };
350
351                 vreg_l25a_3p3: ldo25 {
352                         regulator-min-microvolt = <3300000>;
353                         regulator-max-microvolt = <3312000>;
354                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355                 };
356
357                 vreg_l26a_1p2: ldo26 {
358                         regulator-min-microvolt = <1200000>;
359                         regulator-max-microvolt = <1200000>;
360                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361                 };
362
363                 vreg_lvs1a_1p8: lvs1 {
364                         regulator-min-microvolt = <1800000>;
365                         regulator-max-microvolt = <1800000>;
366                         regulator-always-on;
367                 };
368
369                 vreg_lvs2a_1p8: lvs2 {
370                         regulator-min-microvolt = <1800000>;
371                         regulator-max-microvolt = <1800000>;
372                         regulator-always-on;
373                 };
374         };
375
376         pmi8998-rpmh-regulators {
377                 compatible = "qcom,pmi8998-rpmh-regulators";
378                 qcom,pmic-id = "b";
379
380                 vdd-bob-supply = <&vph_pwr>;
381
382                 vreg_bob: bob {
383                         regulator-min-microvolt = <3312000>;
384                         regulator-max-microvolt = <3600000>;
385                         regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
386                         regulator-allow-bypass;
387                 };
388         };
389 };
390
391 &cdsp_pas {
392         status = "okay";
393         firmware-name = "qcom/sdm845/cdsp.mbn";
394 };
395
396 &dsi0 {
397         status = "okay";
398         vdda-supply = <&vreg_l26a_1p2>;
399
400         ports {
401                 port@1 {
402                         endpoint {
403                                 remote-endpoint = <&lt9611_a>;
404                                 data-lanes = <0 1 2 3>;
405                         };
406                 };
407         };
408 };
409
410 &dsi0_phy {
411         status = "okay";
412         vdds-supply = <&vreg_l1a_0p875>;
413 };
414
415 &gcc {
416         protected-clocks = <GCC_QSPI_CORE_CLK>,
417                            <GCC_QSPI_CORE_CLK_SRC>,
418                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
419                            <GCC_LPASS_Q6_AXI_CLK>,
420                            <GCC_LPASS_SWAY_CLK>;
421 };
422
423 &gpu {
424         zap-shader {
425                 memory-region = <&gpu_mem>;
426                 firmware-name = "qcom/sdm845/a630_zap.mbn";
427         };
428 };
429
430 &i2c10 {
431         status = "okay";
432         clock-frequency = <400000>;
433
434         lt9611_codec: hdmi-bridge@3b {
435                 compatible = "lontium,lt9611";
436                 reg = <0x3b>;
437                 #sound-dai-cells = <1>;
438
439                 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
440
441                 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
442
443                 vdd-supply = <&lt9611_1v8>;
444                 vcc-supply = <&lt9611_3v3>;
445
446                 pinctrl-names = "default";
447                 pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
448
449                 ports {
450                         #address-cells = <1>;
451                         #size-cells = <0>;
452
453                         port@0 {
454                                 reg = <0>;
455
456                                 lt9611_a: endpoint {
457                                         remote-endpoint = <&dsi0_out>;
458                                 };
459                         };
460
461                         port@2 {
462                                 reg = <2>;
463
464                                 lt9611_out: endpoint {
465                                         remote-endpoint = <&hdmi_con>;
466                                 };
467                         };
468                 };
469         };
470 };
471
472 &i2c11 {
473         /* On Low speed expansion */
474         label = "LS-I2C1";
475         status = "okay";
476 };
477
478 &i2c14 {
479         /* On Low speed expansion */
480         label = "LS-I2C0";
481         status = "okay";
482 };
483
484 &mdss {
485         status = "okay";
486 };
487
488 &mdss_mdp {
489         status = "okay";
490 };
491
492 &mss_pil {
493         status = "okay";
494         firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
495 };
496
497 &pcie0 {
498         status = "okay";
499         perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
500         enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
501
502         vddpe-3v3-supply = <&pcie0_3p3v_dual>;
503
504         pinctrl-names = "default";
505         pinctrl-0 = <&pcie0_default_state>;
506 };
507
508 &pcie0_phy {
509         status = "okay";
510
511         vdda-phy-supply = <&vreg_l1a_0p875>;
512         vdda-pll-supply = <&vreg_l26a_1p2>;
513 };
514
515 &pcie1 {
516         status = "okay";
517         perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
518
519         pinctrl-names = "default";
520         pinctrl-0 = <&pcie1_default_state>;
521 };
522
523 &pcie1_phy {
524         status = "okay";
525
526         vdda-phy-supply = <&vreg_l1a_0p875>;
527         vdda-pll-supply = <&vreg_l26a_1p2>;
528 };
529
530 &pm8998_gpio {
531         gpio-line-names =
532                 "NC",
533                 "NC",
534                 "WLAN_SW_CTRL",
535                 "NC",
536                 "PM_GPIO5_BLUE_BT_LED",
537                 "VOL_UP_N",
538                 "NC",
539                 "ADC_IN1",
540                 "PM_GPIO9_YEL_WIFI_LED",
541                 "CAM0_AVDD_EN",
542                 "NC",
543                 "CAM0_DVDD_EN",
544                 "PM_GPIO13_GREEN_U4_LED",
545                 "DIV_CLK2",
546                 "NC",
547                 "NC",
548                 "NC",
549                 "SMB_STAT",
550                 "NC",
551                 "NC",
552                 "ADC_IN2",
553                 "OPTION1",
554                 "WCSS_PWR_REQ",
555                 "PM845_GPIO24",
556                 "OPTION2",
557                 "PM845_SLB";
558
559         cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
560                 pins = "gpio12";
561                 function = "normal";
562
563                 bias-pull-up;
564                 drive-push-pull;
565                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
566         };
567
568         cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
569                 pins = "gpio10";
570                 function = "normal";
571
572                 bias-pull-up;
573                 drive-push-pull;
574                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
575         };
576
577         vol_up_pin_a: vol-up-active {
578                 pins = "gpio6";
579                 function = "normal";
580                 input-enable;
581                 bias-pull-up;
582                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
583         };
584 };
585
586 &pm8998_pon {
587         resin {
588                 compatible = "qcom,pm8941-resin";
589                 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
590                 debounce = <15625>;
591                 bias-pull-up;
592                 linux,code = <KEY_VOLUMEDOWN>;
593         };
594 };
595
596 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
597 &q6afedai {
598         qi2s@22 {
599                 reg = <22>;
600                 qcom,sd-lines = <0 1 2 3>;
601         };
602 };
603
604 &q6asmdai {
605         dai@0 {
606                 reg = <0>;
607         };
608
609         dai@1 {
610                 reg = <1>;
611         };
612
613         dai@2 {
614                 reg = <2>;
615         };
616
617         dai@3 {
618                 reg = <3>;
619                 direction = <2>;
620                 is-compress-dai;
621         };
622 };
623
624 &qupv3_id_0 {
625         status = "okay";
626 };
627
628 &qupv3_id_1 {
629         status = "okay";
630 };
631
632 &sdhc_2 {
633         status = "okay";
634
635         pinctrl-names = "default";
636         pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
637
638         vmmc-supply = <&vreg_l21a_2p95>;
639         vqmmc-supply = <&vreg_l13a_2p95>;
640
641         bus-width = <4>;
642         cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
643 };
644
645 &sound {
646         compatible = "qcom,db845c-sndcard";
647         pinctrl-0 = <&quat_mi2s_active
648                          &quat_mi2s_sd0_active
649                          &quat_mi2s_sd1_active
650                          &quat_mi2s_sd2_active
651                          &quat_mi2s_sd3_active>;
652         pinctrl-names = "default";
653         model = "DB845c";
654         audio-routing =
655                 "RX_BIAS", "MCLK",
656                 "AMIC1", "MIC BIAS1",
657                 "AMIC2", "MIC BIAS2",
658                 "DMIC0", "MIC BIAS1",
659                 "DMIC1", "MIC BIAS1",
660                 "DMIC2", "MIC BIAS3",
661                 "DMIC3", "MIC BIAS3",
662                 "SpkrLeft IN", "SPK1 OUT",
663                 "SpkrRight IN", "SPK2 OUT",
664                 "MM_DL1",  "MultiMedia1 Playback",
665                 "MM_DL2",  "MultiMedia2 Playback",
666                 "MM_DL4",  "MultiMedia4 Playback",
667                 "MultiMedia3 Capture", "MM_UL3";
668
669         mm1-dai-link {
670                 link-name = "MultiMedia1";
671                 cpu {
672                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
673                 };
674         };
675
676         mm2-dai-link {
677                 link-name = "MultiMedia2";
678                 cpu {
679                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
680                 };
681         };
682
683         mm3-dai-link {
684                 link-name = "MultiMedia3";
685                 cpu {
686                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
687                 };
688         };
689
690         mm4-dai-link {
691                 link-name = "MultiMedia4";
692                 cpu {
693                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA4>;
694                 };
695         };
696
697         hdmi-dai-link {
698                 link-name = "HDMI Playback";
699                 cpu {
700                         sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
701                 };
702
703                 platform {
704                         sound-dai = <&q6routing>;
705                 };
706
707                 codec {
708                         sound-dai =  <&lt9611_codec 0>;
709                 };
710         };
711
712         slim-dai-link {
713                 link-name = "SLIM Playback";
714                 cpu {
715                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
716                 };
717
718                 platform {
719                         sound-dai = <&q6routing>;
720                 };
721
722                 codec {
723                         sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
724                 };
725         };
726
727         slimcap-dai-link {
728                 link-name = "SLIM Capture";
729                 cpu {
730                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
731                 };
732
733                 platform {
734                         sound-dai = <&q6routing>;
735                 };
736
737                 codec {
738                         sound-dai = <&wcd9340 1>;
739                 };
740         };
741 };
742
743 &spi2 {
744         /* On Low speed expansion */
745         label = "LS-SPI0";
746         status = "okay";
747 };
748
749 &tlmm {
750         cam0_default: cam0_default {
751                 rst {
752                         pins = "gpio9";
753                         function = "gpio";
754
755                         drive-strength = <16>;
756                         bias-disable;
757                 };
758
759                 mclk0 {
760                         pins = "gpio13";
761                         function = "cam_mclk";
762
763                         drive-strength = <16>;
764                         bias-disable;
765                 };
766         };
767
768         cam3_default: cam3_default {
769                 rst {
770                         function = "gpio";
771                         pins = "gpio21";
772
773                         drive-strength = <16>;
774                         bias-disable;
775                 };
776
777                 mclk3 {
778                         function = "cam_mclk";
779                         pins = "gpio16";
780
781                         drive-strength = <16>;
782                         bias-disable;
783                 };
784         };
785
786         dsi_sw_sel: dsi-sw-sel {
787                 pins = "gpio120";
788                 function = "gpio";
789
790                 drive-strength = <2>;
791                 bias-disable;
792                 output-high;
793         };
794
795         lt9611_irq_pin: lt9611-irq {
796                 pins = "gpio84";
797                 function = "gpio";
798                 bias-disable;
799         };
800
801         pcie0_default_state: pcie0-default {
802                 clkreq {
803                         pins = "gpio36";
804                         function = "pci_e0";
805                         bias-pull-up;
806                 };
807
808                 reset-n {
809                         pins = "gpio35";
810                         function = "gpio";
811
812                         drive-strength = <2>;
813                         output-low;
814                         bias-pull-down;
815                 };
816
817                 wake-n {
818                         pins = "gpio37";
819                         function = "gpio";
820
821                         drive-strength = <2>;
822                         bias-pull-up;
823                 };
824         };
825
826         pcie0_pwren_state: pcie0-pwren {
827                 pins = "gpio90";
828                 function = "gpio";
829
830                 drive-strength = <2>;
831                 bias-disable;
832         };
833
834         pcie1_default_state: pcie1-default {
835                 perst-n {
836                         pins = "gpio102";
837                         function = "gpio";
838
839                         drive-strength = <16>;
840                         bias-disable;
841                 };
842
843                 clkreq {
844                         pins = "gpio103";
845                         function = "pci_e1";
846                         bias-pull-up;
847                 };
848
849                 wake-n {
850                         pins = "gpio11";
851                         function = "gpio";
852
853                         drive-strength = <2>;
854                         bias-pull-up;
855                 };
856
857                 reset-n {
858                         pins = "gpio75";
859                         function = "gpio";
860
861                         drive-strength = <16>;
862                         bias-pull-up;
863                         output-high;
864                 };
865         };
866
867         sdc2_default_state: sdc2-default {
868                 clk {
869                         pins = "sdc2_clk";
870                         bias-disable;
871
872                         /*
873                          * It seems that mmc_test reports errors if drive
874                          * strength is not 16 on clk, cmd, and data pins.
875                          */
876                         drive-strength = <16>;
877                 };
878
879                 cmd {
880                         pins = "sdc2_cmd";
881                         bias-pull-up;
882                         drive-strength = <10>;
883                 };
884
885                 data {
886                         pins = "sdc2_data";
887                         bias-pull-up;
888                         drive-strength = <10>;
889                 };
890         };
891
892         sdc2_card_det_n: sd-card-det-n {
893                 pins = "gpio126";
894                 function = "gpio";
895                 bias-pull-up;
896         };
897
898         wcd_intr_default: wcd_intr_default {
899                 pins = <54>;
900                 function = "gpio";
901
902                 input-enable;
903                 bias-pull-down;
904                 drive-strength = <2>;
905         };
906 };
907
908 &uart3 {
909         label = "LS-UART0";
910         status = "disabled";
911 };
912
913 &uart6 {
914         status = "okay";
915
916         bluetooth {
917                 compatible = "qcom,wcn3990-bt";
918
919                 vddio-supply = <&vreg_s4a_1p8>;
920                 vddxo-supply = <&vreg_l7a_1p8>;
921                 vddrf-supply = <&vreg_l17a_1p3>;
922                 vddch0-supply = <&vreg_l25a_3p3>;
923                 max-speed = <3200000>;
924         };
925 };
926
927 &uart9 {
928         label = "LS-UART1";
929         status = "okay";
930 };
931
932 &usb_1 {
933         status = "okay";
934 };
935
936 &usb_1_dwc3 {
937         dr_mode = "peripheral";
938 };
939
940 &usb_1_hsphy {
941         status = "okay";
942
943         vdd-supply = <&vreg_l1a_0p875>;
944         vdda-pll-supply = <&vreg_l12a_1p8>;
945         vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
946
947         qcom,imp-res-offset-value = <8>;
948         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
949         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
950         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
951 };
952
953 &usb_1_qmpphy {
954         status = "okay";
955
956         vdda-phy-supply = <&vreg_l26a_1p2>;
957         vdda-pll-supply = <&vreg_l1a_0p875>;
958 };
959
960 &usb_2 {
961         status = "okay";
962 };
963
964 &usb_2_dwc3 {
965         dr_mode = "host";
966 };
967
968 &usb_2_hsphy {
969         status = "okay";
970
971         vdd-supply = <&vreg_l1a_0p875>;
972         vdda-pll-supply = <&vreg_l12a_1p8>;
973         vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
974
975         qcom,imp-res-offset-value = <8>;
976         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
977 };
978
979 &usb_2_qmpphy {
980         status = "okay";
981
982         vdda-phy-supply = <&vreg_l26a_1p2>;
983         vdda-pll-supply = <&vreg_l1a_0p875>;
984 };
985
986 &ufs_mem_hc {
987         status = "okay";
988
989         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
990
991         vcc-supply = <&vreg_l20a_2p95>;
992         vcc-max-microamp = <800000>;
993 };
994
995 &ufs_mem_phy {
996         status = "okay";
997
998         vdda-phy-supply = <&vreg_l1a_0p875>;
999         vdda-pll-supply = <&vreg_l26a_1p2>;
1000 };
1001
1002 &wcd9340{
1003         pinctrl-0 = <&wcd_intr_default>;
1004         pinctrl-names = "default";
1005         clock-names = "extclk";
1006         clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1007         reset-gpios = <&tlmm 64 0>;
1008         vdd-buck-supply = <&vreg_s4a_1p8>;
1009         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1010         vdd-tx-supply = <&vreg_s4a_1p8>;
1011         vdd-rx-supply = <&vreg_s4a_1p8>;
1012         vdd-io-supply = <&vreg_s4a_1p8>;
1013
1014         swm: swm@c85 {
1015                 left_spkr: wsa8810-left{
1016                         compatible = "sdw10217201000";
1017                         reg = <0 1>;
1018                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1019                         #thermal-sensor-cells = <0>;
1020                         sound-name-prefix = "SpkrLeft";
1021                         #sound-dai-cells = <0>;
1022                 };
1023
1024                 right_spkr: wsa8810-right{
1025                         compatible = "sdw10217201000";
1026                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1027                         reg = <0 2>;
1028                         #thermal-sensor-cells = <0>;
1029                         sound-name-prefix = "SpkrRight";
1030                         #sound-dai-cells = <0>;
1031                 };
1032         };
1033 };
1034
1035 &wifi {
1036         status = "okay";
1037
1038         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1039         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1040         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1041         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1042
1043         qcom,snoc-host-cap-8bit-quirk;
1044 };
1045
1046 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1047 &qup_spi2_default {
1048         drive-strength = <16>;
1049 };
1050
1051 &qup_uart3_default{
1052         pinmux {
1053                 pins = "gpio41", "gpio42", "gpio43", "gpio44";
1054                 function = "qup3";
1055         };
1056 };
1057
1058 &qup_i2c10_default {
1059         pinconf {
1060                 pins = "gpio55", "gpio56";
1061                 drive-strength = <2>;
1062                 bias-disable;
1063         };
1064 };
1065
1066 &qup_uart6_default {
1067         pinmux {
1068                 pins = "gpio45", "gpio46", "gpio47", "gpio48";
1069                 function = "qup6";
1070         };
1071
1072         cts {
1073                 pins = "gpio45";
1074                 bias-disable;
1075         };
1076
1077         rts-tx {
1078                 pins = "gpio46", "gpio47";
1079                 drive-strength = <2>;
1080                 bias-disable;
1081         };
1082
1083         rx {
1084                 pins = "gpio48";
1085                 bias-pull-up;
1086         };
1087 };
1088
1089 &qup_uart9_default {
1090         pinconf-tx {
1091                 pins = "gpio4";
1092                 drive-strength = <2>;
1093                 bias-disable;
1094         };
1095
1096         pinconf-rx {
1097                 pins = "gpio5";
1098                 drive-strength = <2>;
1099                 bias-pull-up;
1100         };
1101 };
1102
1103 &pm8998_gpio {
1104
1105 };
1106
1107 &cci {
1108         status = "okay";
1109 };
1110
1111 &camss {
1112         vdda-supply = <&vreg_l1a_0p875>;
1113
1114         status = "ok";
1115
1116         ports {
1117                 #address-cells = <1>;
1118                 #size-cells = <0>;
1119                 port@0 {
1120                         reg = <0>;
1121                         csiphy0_ep: endpoint {
1122                                 clock-lanes = <7>;
1123                                 data-lanes = <0 1 2 3>;
1124                                 remote-endpoint = <&ov8856_ep>;
1125                         };
1126                 };
1127         };
1128 };
1129
1130 &cci_i2c0 {
1131         camera@10 {
1132                 compatible = "ovti,ov8856";
1133                 reg = <0x10>;
1134
1135                 // CAM0_RST_N
1136                 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
1137                 pinctrl-names = "default";
1138                 pinctrl-0 = <&cam0_default>;
1139                 gpios = <&tlmm 13 0>,
1140                         <&tlmm 9 GPIO_ACTIVE_LOW>;
1141
1142                 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
1143                 clock-names = "xvclk";
1144                 clock-frequency = <19200000>;
1145
1146                 /* The &vreg_s4a_1p8 trace is powered on as a,
1147                  * so it is represented by a fixed regulator.
1148                  *
1149                  * The 2.8V vdda-supply and 1.2V vddd-supply regulators
1150                  * both have to be enabled through the power management
1151                  * gpios.
1152                  */
1153                 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
1154
1155                 dovdd-supply = <&vreg_lvs1a_1p8>;
1156                 avdd-supply = <&cam0_avdd_2v8>;
1157                 dvdd-supply = <&cam0_dvdd_1v2>;
1158
1159                 status = "ok";
1160
1161                 port {
1162                         ov8856_ep: endpoint {
1163                                 clock-lanes = <1>;
1164                                 link-frequencies = /bits/ 64
1165                                         <360000000 180000000>;
1166                                 data-lanes = <1 2 3 4>;
1167                                 remote-endpoint = <&csiphy0_ep>;
1168                         };
1169                 };
1170         };
1171 };
1172
1173 &cci_i2c1 {
1174         camera@60 {
1175                 compatible = "ovti,ov7251";
1176
1177                 // I2C address as per ov7251.txt linux documentation
1178                 reg = <0x60>;
1179
1180                 // CAM3_RST_N
1181                 enable-gpios = <&tlmm 21 0>;
1182                 pinctrl-names = "default";
1183                 pinctrl-0 = <&cam3_default>;
1184                 gpios = <&tlmm 16 0>,
1185                         <&tlmm 21 0>;
1186
1187                 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
1188                 clock-names = "xclk";
1189                 clock-frequency = <24000000>;
1190
1191                 /* The &vreg_s4a_1p8 trace always powered on.
1192                  *
1193                  * The 2.8V vdda-supply regulator is enabled when the
1194                  * vreg_s4a_1p8 trace is pulled high.
1195                  * It too is represented by a fixed regulator.
1196                  *
1197                  * No 1.2V vddd-supply regulator is used.
1198                  */
1199                 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
1200
1201                 vdddo-supply = <&vreg_lvs1a_1p8>;
1202                 vdda-supply = <&cam3_avdd_2v8>;
1203
1204                 status = "disable";
1205
1206                 port {
1207                         ov7251_ep: endpoint {
1208                                 clock-lanes = <1>;
1209                                 data-lanes = <0 1>;
1210 //                              remote-endpoint = <&csiphy3_ep>;
1211                         };
1212                 };
1213         };
1214 };