arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Cheza device tree source (common between revisions)
   4  *
   5  * Copyright 2018 Google LLC.
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  11 #include "sdm845.dtsi"
  12
  13 /* PMICs depend on spmi_bus label and so must come after SoC */
  14 #include "pm8005.dtsi"
  15 #include "pm8998.dtsi"
  16
  17 / {
  18         aliases {
  19                 bluetooth0 = &bluetooth;
  20                 hsuart0 = &uart6;
  21                 serial0 = &uart9;
  22                 wifi0 = &wifi;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         backlight: backlight {
  30                 compatible = "pwm-backlight";
  31                 pwms = <&cros_ec_pwm 0>;
  32                 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  33                 power-supply = <&ppvar_sys>;
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&ap_edp_bklten>;
  36         };
  37
  38         /* FIXED REGULATORS - parents above children */
  39
  40         /* This is the top level supply and variable voltage */
  41         ppvar_sys: ppvar-sys-regulator {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "ppvar_sys";
  44                 regulator-always-on;
  45                 regulator-boot-on;
  46         };
  47
  48         /* This divides ppvar_sys by 2, so voltage is variable */
  49         src_vph_pwr: src-vph-pwr-regulator {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "src_vph_pwr";
  52
  53                 /* EC turns on with switchcap_on_l; always on for AP */
  54                 regulator-always-on;
  55                 regulator-boot-on;
  56
  57                 vin-supply = <&ppvar_sys>;
  58         };
  59
  60         pp5000_a: pp5000-a-regulator {
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "pp5000_a";
  63
  64                 /* EC turns on with en_pp5000_a; always on for AP */
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <5000000>;
  68                 regulator-max-microvolt = <5000000>;
  69
  70                 vin-supply = <&ppvar_sys>;
  71         };
  72
  73         src_vreg_bob: src-vreg-bob-regulator {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "src_vreg_bob";
  76
  77                 /* EC turns on with vbob_en; always on for AP */
  78                 regulator-always-on;
  79                 regulator-boot-on;
  80                 regulator-min-microvolt = <3600000>;
  81                 regulator-max-microvolt = <3600000>;
  82
  83                 vin-supply = <&ppvar_sys>;
  84         };
  85
  86         pp3300_dx_edp: pp3300-dx-edp-regulator {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "pp3300_dx_edp";
  89
  90                 regulator-min-microvolt = <3300000>;
  91                 regulator-max-microvolt = <3300000>;
  92
  93                 gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
  94                 enable-active-high;
  95                 pinctrl-names = "default";
  96                 pinctrl-0 = <&en_pp3300_dx_edp>;
  97         };
  98
  99         /*
 100          * Apparently RPMh does not provide support for PM8998 S4 because it
 101          * is always-on; model it as a fixed regulator.
 102          */
 103         src_pp1800_s4a: pm8998-smps4 {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "src_pp1800_s4a";
 106
 107                 regulator-min-microvolt = <1800000>;
 108                 regulator-max-microvolt = <1800000>;
 109
 110                 regulator-always-on;
 111                 regulator-boot-on;
 112
 113                 vin-supply = <&src_vph_pwr>;
 114         };
 115
 116         /* BOARD-SPECIFIC TOP LEVEL NODES */
 117
 118         gpio-keys {
 119                 compatible = "gpio-keys";
 120                 pinctrl-names = "default";
 121                 pinctrl-0 = <&pen_eject_odl>;
 122
 123                 pen-insert {
 124                         label = "Pen Insert";
 125                         /* Insert = low, eject = high */
 126                         gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
 127                         linux,code = <SW_PEN_INSERTED>;
 128                         linux,input-type = <EV_SW>;
 129                         wakeup-source;
 130                 };
 131         };
 132
 133         panel: panel {
 134                 compatible ="innolux,p120zdg-bf1";
 135                 power-supply = <&pp3300_dx_edp>;
 136                 backlight = <&backlight>;
 137                 no-hpd;
 138
 139                 ports {
 140                         panel_in: port {
 141                                 panel_in_edp: endpoint {
 142                                         remote-endpoint = <&sn65dsi86_out>;
 143                                 };
 144                         };
 145                 };
 146         };
 147 };
 148
 149 /*
 150  * Reserved memory changes
 151  *
 152  * Putting this all together (out of order with the rest of the file) to keep
 153  * all modifications to the memory map (from sdm845.dtsi) in one place.
 154  */
 155
 156 /*
 157  * Our mpss_region is 8MB bigger than the default one and that conflicts
 158  * with venus_mem and cdsp_mem.
 159  *
 160  * For venus_mem we'll delete and re-create at a different address.
 161  *
 162  * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
 163  * that also means we need to delete cdsp_pas.
 164  */
 165 /delete-node/ &venus_mem;
 166 /delete-node/ &cdsp_mem;
 167 /delete-node/ &cdsp_pas;
 168 /delete-node/ &gpu_mem;
 169
 170 /* Increase the size from 120 MB to 128 MB */
 171 &mpss_region {
 172         reg = <0 0x8e000000 0 0x8000000>;
 173 };
 174
 175 /* Increase the size from 2MB to 8MB */
 176 &rmtfs_mem {
 177         reg = <0 0x88f00000 0 0x800000>;
 178 };
 179
 180 / {
 181         reserved-memory {
 182                 venus_mem: memory@96000000 {
 183                         reg = <0 0x96000000 0 0x500000>;
 184                         no-map;
 185                 };
 186         };
 187 };
 188
 189 &qspi {
 190         status = "okay";
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
 193
 194         flash@0 {
 195                 compatible = "jedec,spi-nor";
 196                 reg = <0>;
 197
 198                 /*
 199                  * In theory chip supports up to 104 MHz and controller up
 200                  * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
 201                  * that for now.  b:117440651
 202                  */
 203                 spi-max-frequency = <25000000>;
 204                 spi-tx-bus-width = <2>;
 205                 spi-rx-bus-width = <2>;
 206         };
 207 };
 208
 209
 210 &apps_rsc {
 211         pm8998-rpmh-regulators {
 212                 compatible = "qcom,pm8998-rpmh-regulators";
 213                 qcom,pmic-id = "a";
 214
 215                 vdd-s1-supply = <&src_vph_pwr>;
 216                 vdd-s2-supply = <&src_vph_pwr>;
 217                 vdd-s3-supply = <&src_vph_pwr>;
 218                 vdd-s4-supply = <&src_vph_pwr>;
 219                 vdd-s5-supply = <&src_vph_pwr>;
 220                 vdd-s6-supply = <&src_vph_pwr>;
 221                 vdd-s7-supply = <&src_vph_pwr>;
 222                 vdd-s8-supply = <&src_vph_pwr>;
 223                 vdd-s9-supply = <&src_vph_pwr>;
 224                 vdd-s10-supply = <&src_vph_pwr>;
 225                 vdd-s11-supply = <&src_vph_pwr>;
 226                 vdd-s12-supply = <&src_vph_pwr>;
 227                 vdd-s13-supply = <&src_vph_pwr>;
 228                 vdd-l1-l27-supply = <&src_pp1025_s7a>;
 229                 vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
 230                 vdd-l3-l11-supply = <&src_pp1025_s7a>;
 231                 vdd-l4-l5-supply = <&src_pp1025_s7a>;
 232                 vdd-l6-supply = <&src_vph_pwr>;
 233                 vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
 234                 vdd-l9-supply = <&src_pp2040_s5a>;
 235                 vdd-l10-l23-l25-supply = <&src_vreg_bob>;
 236                 vdd-l13-l19-l21-supply = <&src_vreg_bob>;
 237                 vdd-l16-l28-supply = <&src_vreg_bob>;
 238                 vdd-l18-l22-supply = <&src_vreg_bob>;
 239                 vdd-l20-l24-supply = <&src_vreg_bob>;
 240                 vdd-l26-supply = <&src_pp1350_s3a>;
 241                 vin-lvs-1-2-supply = <&src_pp1800_s4a>;
 242
 243                 src_pp1125_s2a: smps2 {
 244                         regulator-min-microvolt = <1100000>;
 245                         regulator-max-microvolt = <1100000>;
 246                 };
 247
 248                 src_pp1350_s3a: smps3 {
 249                         regulator-min-microvolt = <1352000>;
 250                         regulator-max-microvolt = <1352000>;
 251                 };
 252
 253                 src_pp2040_s5a: smps5 {
 254                         regulator-min-microvolt = <1904000>;
 255                         regulator-max-microvolt = <2040000>;
 256                 };
 257
 258                 src_pp1025_s7a: smps7 {
 259                         regulator-min-microvolt = <900000>;
 260                         regulator-max-microvolt = <1028000>;
 261                 };
 262
 263                 vdd_qusb_hs0:
 264                 vdda_hp_pcie_core:
 265                 vdda_mipi_csi0_0p9:
 266                 vdda_mipi_csi1_0p9:
 267                 vdda_mipi_csi2_0p9:
 268                 vdda_mipi_dsi0_pll:
 269                 vdda_mipi_dsi1_pll:
 270                 vdda_qlink_lv:
 271                 vdda_qlink_lv_ck:
 272                 vdda_qrefs_0p875:
 273                 vdda_pcie_core:
 274                 vdda_pll_cc_ebi01:
 275                 vdda_pll_cc_ebi23:
 276                 vdda_sp_sensor:
 277                 vdda_ufs1_core:
 278                 vdda_ufs2_core:
 279                 vdda_usb1_ss_core:
 280                 vdda_usb2_ss_core:
 281                 src_pp875_l1a: ldo1 {
 282                         regulator-min-microvolt = <880000>;
 283                         regulator-max-microvolt = <880000>;
 284                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 285                 };
 286
 287                 vddpx_10:
 288                 src_pp1200_l2a: ldo2 {
 289                         regulator-min-microvolt = <1200000>;
 290                         regulator-max-microvolt = <1200000>;
 291                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 292
 293                         /* TODO: why??? */
 294                         regulator-always-on;
 295                 };
 296
 297                 pp1000_l3a_sdr845: ldo3 {
 298                         regulator-min-microvolt = <1000000>;
 299                         regulator-max-microvolt = <1000000>;
 300                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 301                 };
 302
 303                 vdd_wcss_cx:
 304                 vdd_wcss_mx:
 305                 vdda_wcss_pll:
 306                 src_pp800_l5a: ldo5 {
 307                         regulator-min-microvolt = <800000>;
 308                         regulator-max-microvolt = <800000>;
 309                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 310                 };
 311
 312                 vddpx_13:
 313                 src_pp1800_l6a: ldo6 {
 314                         regulator-min-microvolt = <1856000>;
 315                         regulator-max-microvolt = <1856000>;
 316                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 317                 };
 318
 319                 pp1800_l7a_wcn3990: ldo7 {
 320                         regulator-min-microvolt = <1800000>;
 321                         regulator-max-microvolt = <1800000>;
 322                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 323                 };
 324
 325                 src_pp1200_l8a: ldo8 {
 326                         regulator-min-microvolt = <1200000>;
 327                         regulator-max-microvolt = <1248000>;
 328                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 329                 };
 330
 331                 pp1800_dx_pen:
 332                 src_pp1800_l9a: ldo9 {
 333                         regulator-min-microvolt = <1800000>;
 334                         regulator-max-microvolt = <1800000>;
 335                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 336                 };
 337
 338                 src_pp1800_l10a: ldo10 {
 339                         regulator-min-microvolt = <1800000>;
 340                         regulator-max-microvolt = <1800000>;
 341                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 342                 };
 343
 344                 pp1000_l11a_sdr845: ldo11 {
 345                         regulator-min-microvolt = <1000000>;
 346                         regulator-max-microvolt = <1048000>;
 347                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 348                 };
 349
 350                 vdd_qfprom:
 351                 vdd_qfprom_sp:
 352                 vdda_apc1_cs_1p8:
 353                 vdda_gfx_cs_1p8:
 354                 vdda_qrefs_1p8:
 355                 vdda_qusb_hs0_1p8:
 356                 vddpx_11:
 357                 src_pp1800_l12a: ldo12 {
 358                         regulator-min-microvolt = <1800000>;
 359                         regulator-max-microvolt = <1800000>;
 360                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 361                 };
 362
 363                 vddpx_2:
 364                 src_pp2950_l13a: ldo13 {
 365                         regulator-min-microvolt = <1800000>;
 366                         regulator-max-microvolt = <2960000>;
 367                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 368                 };
 369
 370                 src_pp1800_l14a: ldo14 {
 371                         regulator-min-microvolt = <1800000>;
 372                         regulator-max-microvolt = <1800000>;
 373                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 374                 };
 375
 376                 src_pp1800_l15a: ldo15 {
 377                         regulator-min-microvolt = <1800000>;
 378                         regulator-max-microvolt = <1800000>;
 379                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 380                 };
 381
 382                 pp2700_l16a: ldo16 {
 383                         regulator-min-microvolt = <2704000>;
 384                         regulator-max-microvolt = <2704000>;
 385                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 386                 };
 387
 388                 src_pp1300_l17a: ldo17 {
 389                         regulator-min-microvolt = <1304000>;
 390                         regulator-max-microvolt = <1304000>;
 391                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 392                 };
 393
 394                 pp2700_l18a: ldo18 {
 395                         regulator-min-microvolt = <2704000>;
 396                         regulator-max-microvolt = <2960000>;
 397                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 398                 };
 399
 400                 /*
 401                  * NOTE: this rail should have been called
 402                  * src_pp3300_l19a in the schematic
 403                  */
 404                 src_pp3000_l19a: ldo19 {
 405                         regulator-min-microvolt = <3304000>;
 406                         regulator-max-microvolt = <3304000>;
 407
 408                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 409                 };
 410
 411                 src_pp2950_l20a: ldo20 {
 412                         regulator-min-microvolt = <2704000>;
 413                         regulator-max-microvolt = <2960000>;
 414                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 415                 };
 416
 417                 src_pp2950_l21a: ldo21 {
 418                         regulator-min-microvolt = <2704000>;
 419                         regulator-max-microvolt = <2960000>;
 420                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 421                 };
 422
 423                 pp3300_hub:
 424                 src_pp3300_l22a: ldo22 {
 425                         regulator-min-microvolt = <3304000>;
 426                         regulator-max-microvolt = <3304000>;
 427                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 428                         /*
 429                          * HACK: Should add a usb hub node and driver
 430                          * to turn this on and off at suspend/resume time
 431                          */
 432                         regulator-boot-on;
 433                         regulator-always-on;
 434                 };
 435
 436                 pp3300_l23a_ch1_wcn3990: ldo23 {
 437                         regulator-min-microvolt = <3000000>;
 438                         regulator-max-microvolt = <3312000>;
 439                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 440                 };
 441
 442                 vdda_qusb_hs0_3p1:
 443                 src_pp3075_l24a: ldo24 {
 444                         regulator-min-microvolt = <3088000>;
 445                         regulator-max-microvolt = <3088000>;
 446                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 447                 };
 448
 449                 pp3300_l25a_ch0_wcn3990: ldo25 {
 450                         regulator-min-microvolt = <3304000>;
 451                         regulator-max-microvolt = <3304000>;
 452                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 453                 };
 454
 455                 pp1200_hub:
 456                 vdda_hp_pcie_1p2:
 457                 vdda_hv_ebi0:
 458                 vdda_hv_ebi1:
 459                 vdda_hv_ebi2:
 460                 vdda_hv_ebi3:
 461                 vdda_mipi_csi_1p25:
 462                 vdda_mipi_dsi0_1p2:
 463                 vdda_mipi_dsi1_1p2:
 464                 vdda_pcie_1p2:
 465                 vdda_ufs1_1p2:
 466                 vdda_ufs2_1p2:
 467                 vdda_usb1_ss_1p2:
 468                 vdda_usb2_ss_1p2:
 469                 src_pp1200_l26a: ldo26 {
 470                         regulator-min-microvolt = <1200000>;
 471                         regulator-max-microvolt = <1200000>;
 472                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 473                 };
 474
 475                 pp3300_dx_pen:
 476                 src_pp3300_l28a: ldo28 {
 477                         regulator-min-microvolt = <3304000>;
 478                         regulator-max-microvolt = <3304000>;
 479                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 480                 };
 481
 482                 src_pp1800_lvs1: lvs1 {
 483                         regulator-min-microvolt = <1800000>;
 484                         regulator-max-microvolt = <1800000>;
 485                 };
 486
 487                 src_pp1800_lvs2: lvs2 {
 488                         regulator-min-microvolt = <1800000>;
 489                         regulator-max-microvolt = <1800000>;
 490                 };
 491         };
 492
 493         pm8005-rpmh-regulators {
 494                 compatible = "qcom,pm8005-rpmh-regulators";
 495                 qcom,pmic-id = "c";
 496
 497                 vdd-s1-supply = <&src_vph_pwr>;
 498                 vdd-s2-supply = <&src_vph_pwr>;
 499                 vdd-s3-supply = <&src_vph_pwr>;
 500                 vdd-s4-supply = <&src_vph_pwr>;
 501
 502                 src_pp600_s3c: smps3 {
 503                         regulator-min-microvolt = <600000>;
 504                         regulator-max-microvolt = <600000>;
 505                 };
 506         };
 507 };
 508
 509 &dsi0 {
 510         status = "okay";
 511         vdda-supply = <&vdda_mipi_dsi0_1p2>;
 512
 513         ports {
 514                 port@1 {
 515                         endpoint {
 516                                 remote-endpoint = <&sn65dsi86_in>;
 517                                 data-lanes = <0 1 2 3>;
 518                         };
 519                 };
 520         };
 521 };
 522
 523 &dsi0_phy {
 524         status = "okay";
 525         vdds-supply = <&vdda_mipi_dsi0_pll>;
 526 };
 527
 528 edp_brij_i2c: &i2c3 {
 529         status = "okay";
 530         clock-frequency = <400000>;
 531
 532         sn65dsi86_bridge: bridge@2d {
 533                 compatible = "ti,sn65dsi86";
 534                 reg = <0x2d>;
 535                 pinctrl-names = "default";
 536                 pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
 537
 538                 interrupt-parent = <&tlmm>;
 539                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 540
 541                 enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
 542
 543                 vpll-supply = <&src_pp1800_s4a>;
 544                 vccio-supply = <&src_pp1800_s4a>;
 545                 vcca-supply = <&src_pp1200_l2a>;
 546                 vcc-supply = <&src_pp1200_l2a>;
 547
 548                 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
 549                 clock-names = "refclk";
 550
 551                 no-hpd;
 552
 553                 ports {
 554                         #address-cells = <1>;
 555                         #size-cells = <0>;
 556
 557                         port@0 {
 558                                 reg = <0>;
 559                                 sn65dsi86_in: endpoint {
 560                                         remote-endpoint = <&dsi0_out>;
 561                                 };
 562                         };
 563
 564                         port@1 {
 565                                 reg = <1>;
 566                                 sn65dsi86_out: endpoint {
 567                                         remote-endpoint = <&panel_in_edp>;
 568                                 };
 569                         };
 570                 };
 571         };
 572 };
 573
 574 ap_pen_1v8: &i2c11 {
 575         status = "okay";
 576         clock-frequency = <400000>;
 577
 578         digitizer@9 {
 579                 compatible = "wacom,w9013", "hid-over-i2c";
 580                 reg = <0x9>;
 581                 pinctrl-names = "default";
 582                 pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
 583
 584                 vdd-supply = <&pp3300_dx_pen>;
 585                 vddl-supply = <&pp1800_dx_pen>;
 586                 post-power-on-delay-ms = <100>;
 587
 588                 interrupt-parent = <&tlmm>;
 589                 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 590
 591                 hid-descr-addr = <0x1>;
 592         };
 593 };
 594
 595 amp_i2c: &i2c12 {
 596         status = "okay";
 597         clock-frequency = <400000>;
 598 };
 599
 600 ap_ts_i2c: &i2c14 {
 601         status = "okay";
 602         clock-frequency = <400000>;
 603
 604         touchscreen@10 {
 605                 compatible = "elan,ekth3500";
 606                 reg = <0x10>;
 607                 pinctrl-names = "default";
 608                 pinctrl-0 = <&ts_int_l &ts_reset_l>;
 609
 610                 interrupt-parent = <&tlmm>;
 611                 interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
 612
 613                 vcc33-supply = <&src_pp3300_l28a>;
 614
 615                 reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
 616         };
 617 };
 618
 619 &ipa {
 620         status = "okay";
 621         modem-init;
 622 };
 623
 624 &lpasscc {
 625         status = "okay";
 626 };
 627
 628 &mdss {
 629         status = "okay";
 630 };
 631
 632 &mdss_mdp {
 633         status = "okay";
 634 };
 635
 636 /*
 637  * Cheza fw does not properly program the GPU aperture to allow the
 638  * GPU to update the SMMU pagetables for context switches.  Work
 639  * around this by dropping the "qcom,adreno-smmu" compat string.
 640  */
 641 &adreno_smmu {
 642         compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
 643 };
 644
 645 &mss_pil {
 646         iommus = <&apps_smmu 0x781 0x0>,
 647                  <&apps_smmu 0x724 0x3>;
 648 };
 649
 650 &pm8998_pwrkey {
 651         status = "disabled";
 652 };
 653
 654 &qupv3_id_0 {
 655         status = "okay";
 656         iommus = <&apps_smmu 0x0 0x3>;
 657 };
 658
 659 &qupv3_id_1 {
 660         status = "okay";
 661         iommus = <&apps_smmu 0x6c0 0x3>;
 662 };
 663
 664 &sdhc_2 {
 665         status = "okay";
 666
 667         pinctrl-names = "default";
 668         pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
 669
 670         vmmc-supply = <&src_pp2950_l21a>;
 671         vqmmc-supply = <&vddpx_2>;
 672
 673         cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 674 };
 675
 676 &spi0 {
 677         status = "okay";
 678 };
 679
 680 &spi5 {
 681         status = "okay";
 682
 683         tpm@0 {
 684                 compatible = "google,cr50";
 685                 reg = <0>;
 686                 pinctrl-names = "default";
 687                 pinctrl-0 = <&h1_ap_int_odl>;
 688                 spi-max-frequency = <800000>;
 689                 interrupt-parent = <&tlmm>;
 690                 interrupts = <129 IRQ_TYPE_EDGE_RISING>;
 691         };
 692 };
 693
 694 &spi10 {
 695         status = "okay";
 696
 697         cros_ec: ec@0 {
 698                 compatible = "google,cros-ec-spi";
 699                 reg = <0>;
 700                 interrupt-parent = <&tlmm>;
 701                 interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
 702                 pinctrl-names = "default";
 703                 pinctrl-0 = <&ec_ap_int_l>;
 704                 spi-max-frequency = <3000000>;
 705
 706                 cros_ec_pwm: ec-pwm {
 707                         compatible = "google,cros-ec-pwm";
 708                         #pwm-cells = <1>;
 709                 };
 710
 711                 i2c_tunnel: i2c-tunnel {
 712                         compatible = "google,cros-ec-i2c-tunnel";
 713                         google,remote-bus = <0>;
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                 };
 717         };
 718 };
 719
 720 #include <arm/cros-ec-keyboard.dtsi>
 721 #include <arm/cros-ec-sbs.dtsi>
 722
 723 &uart6 {
 724         status = "okay";
 725
 726         bluetooth: wcn3990-bt {
 727                 compatible = "qcom,wcn3990-bt";
 728                 vddio-supply = <&src_pp1800_s4a>;
 729                 vddxo-supply = <&pp1800_l7a_wcn3990>;
 730                 vddrf-supply = <&src_pp1300_l17a>;
 731                 vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 732                 max-speed = <3200000>;
 733         };
 734 };
 735
 736 &uart9 {
 737         status = "okay";
 738 };
 739
 740 &ufs_mem_hc {
 741         status = "okay";
 742
 743         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
 744
 745         vcc-supply = <&src_pp2950_l20a>;
 746         vcc-max-microamp = <600000>;
 747 };
 748
 749 &ufs_mem_phy {
 750         status = "okay";
 751
 752         vdda-phy-supply = <&vdda_ufs1_core>;
 753         vdda-pll-supply = <&vdda_ufs1_1p2>;
 754 };
 755
 756 &usb_1 {
 757         status = "okay";
 758
 759         /* We'll use this as USB 2.0 only */
 760         qcom,select-utmi-as-pipe-clk;
 761 };
 762
 763 &usb_1_dwc3 {
 764         /*
 765          * The hardware design intends this port to be hooked up in peripheral
 766          * mode, so we'll hardcode it here.  Some details:
 767          * - SDM845 expects only a single Type C connector so it has only one
 768          *   native Type C port but cheza has two Type C connectors.
 769          * - The only source of DP is the single native Type C port.
 770          * - On cheza we want to be able to hook DP up to _either_ of the
 771          *   two Type C connectors and want to be able to achieve 4 lanes of DP.
 772          * - When you configure a Type C port for 4 lanes of DP you lose USB3.
 773          * - In order to make everything work, the native Type C port is always
 774          *   configured as 4-lanes DP so it's always available.
 775          * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
 776          *   sent to the two Type C connectors.
 777          * - The extra USB2 lines from the native Type C port are always
 778          *   setup as "peripheral" so that we can mux them over to one connector
 779          *   or the other if someone needs the connector configured as a gadget
 780          *   (but they only get USB2 speeds).
 781          *
 782          * All the hardware muxes would allow us to hook things up in different
 783          * ways to some potential benefit for static configurations (you could
 784          * achieve extra USB2 bandwidth by using two different ports for the
 785          * two connectors or possibly even get USB3 peripheral mode), but in
 786          * each case you end up forcing to disconnect/reconnect an in-use
 787          * USB session in some cases depending on what you hotplug into the
 788          * other connector.  Thus hardcoding this as peripheral makes sense.
 789          */
 790         dr_mode = "peripheral";
 791
 792         /*
 793          * We always need the high speed pins as 4-lanes DP in case someone
 794          * hotplugs a DP peripheral.  Thus limit this port to a max of high
 795          * speed.
 796          */
 797         maximum-speed = "high-speed";
 798
 799         /*
 800          * We don't need the usb3-phy since we run in highspeed mode always, so
 801          * re-define these properties removing the superspeed USB PHY reference.
 802          */
 803         phys = <&usb_1_hsphy>;
 804         phy-names = "usb2-phy";
 805 };
 806
 807 &usb_1_hsphy {
 808         status = "okay";
 809
 810         vdd-supply = <&vdda_usb1_ss_core>;
 811         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 812         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 813
 814         qcom,imp-res-offset-value = <8>;
 815         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
 816         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
 817         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
 818 };
 819
 820 &usb_2 {
 821         status = "okay";
 822 };
 823
 824 &usb_2_dwc3 {
 825         /* We have this hooked up to a hub and we always use in host mode */
 826         dr_mode = "host";
 827 };
 828
 829 &usb_2_hsphy {
 830         status = "okay";
 831
 832         vdd-supply = <&vdda_usb2_ss_core>;
 833         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 834         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 835
 836         qcom,imp-res-offset-value = <8>;
 837         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
 838 };
 839
 840 &usb_2_qmpphy {
 841         status = "okay";
 842
 843         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
 844         vdda-pll-supply = <&vdda_usb2_ss_core>;
 845 };
 846
 847 &wifi {
 848         status = "okay";
 849
 850         vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
 851         vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
 852         vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
 853         vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 854 };
 855
 856 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
 857
 858 &qspi_cs0 {
 859         pinconf {
 860                 pins = "gpio90";
 861                 bias-disable;
 862         };
 863 };
 864
 865 &qspi_clk {
 866         pinconf {
 867                 pins = "gpio95";
 868                 bias-disable;
 869         };
 870 };
 871
 872 &qspi_data01 {
 873         pinconf {
 874                 pins = "gpio91", "gpio92";
 875
 876                 /* High-Z when no transfers; nice to park the lines */
 877                 bias-pull-up;
 878         };
 879 };
 880
 881 &qup_i2c3_default {
 882         pinconf {
 883                 pins = "gpio41", "gpio42";
 884                 drive-strength = <2>;
 885
 886                 /* Has external pullup */
 887                 bias-disable;
 888         };
 889 };
 890
 891 &qup_i2c11_default {
 892         pinconf {
 893                 pins = "gpio31", "gpio32";
 894                 drive-strength = <2>;
 895
 896                 /* Has external pullup */
 897                 bias-disable;
 898         };
 899 };
 900
 901 &qup_i2c12_default {
 902         pinconf {
 903                 pins = "gpio49", "gpio50";
 904                 drive-strength = <2>;
 905
 906                 /* Has external pullup */
 907                 bias-disable;
 908         };
 909 };
 910
 911 &qup_i2c14_default {
 912         pinconf {
 913                 pins = "gpio33", "gpio34";
 914                 drive-strength = <2>;
 915
 916                 /* Has external pullup */
 917                 bias-disable;
 918         };
 919 };
 920
 921 &qup_spi0_default {
 922         pinconf {
 923                 pins = "gpio0", "gpio1", "gpio2", "gpio3";
 924                 drive-strength = <2>;
 925                 bias-disable;
 926         };
 927 };
 928
 929 &qup_spi5_default {
 930         pinconf {
 931                 pins = "gpio85", "gpio86", "gpio87", "gpio88";
 932                 drive-strength = <2>;
 933                 bias-disable;
 934         };
 935 };
 936
 937 &qup_spi10_default {
 938         pinconf {
 939                 pins = "gpio53", "gpio54", "gpio55", "gpio56";
 940                 drive-strength = <2>;
 941                 bias-disable;
 942         };
 943 };
 944
 945 &qup_uart6_default {
 946         /* Change pinmux to all 4 pins since CTS and RTS are connected */
 947         pinmux {
 948                 pins = "gpio45", "gpio46",
 949                        "gpio47", "gpio48";
 950         };
 951
 952         pinconf-cts {
 953                 /*
 954                  * Configure a pull-down on 45 (CTS) to match the pull of
 955                  * the Bluetooth module.
 956                  */
 957                 pins = "gpio45";
 958                 bias-pull-down;
 959         };
 960
 961         pinconf-rts-tx {
 962                 /* We'll drive 46 (RTS) and 47 (TX), so no pull */
 963                 pins = "gpio46", "gpio47";
 964                 drive-strength = <2>;
 965                 bias-disable;
 966         };
 967
 968         pinconf-rx {
 969                 /*
 970                  * Configure a pull-up on 48 (RX). This is needed to avoid
 971                  * garbage data when the TX pin of the Bluetooth module is
 972                  * in tri-state (module powered off or not driving the
 973                  * signal yet).
 974                  */
 975                 pins = "gpio48";
 976                 bias-pull-up;
 977         };
 978 };
 979
 980 &qup_uart9_default {
 981         pinconf-tx {
 982                 pins = "gpio4";
 983                 drive-strength = <2>;
 984                 bias-disable;
 985         };
 986
 987         pinconf-rx {
 988                 pins = "gpio5";
 989                 drive-strength = <2>;
 990                 bias-pull-up;
 991         };
 992 };
 993
 994 /* PINCTRL - board-specific pinctrl */
 995 &pm8005_gpio {
 996         gpio-line-names = "",
 997                           "",
 998                           "SLB",
 999                           "";
1000 };
1001
1002 &pm8998_adc {
1003         adc-chan@4d {
1004                 reg = <ADC5_AMUX_THM1_100K_PU>;
1005                 label = "sdm_temp";
1006         };
1007
1008         adc-chan@4e {
1009                 reg = <ADC5_AMUX_THM2_100K_PU>;
1010                 label = "quiet_temp";
1011         };
1012
1013         adc-chan@4f {
1014                 reg = <ADC5_AMUX_THM3_100K_PU>;
1015                 label = "lte_temp_1";
1016         };
1017
1018         adc-chan@50 {
1019                 reg = <ADC5_AMUX_THM4_100K_PU>;
1020                 label = "lte_temp_2";
1021         };
1022
1023         adc-chan@51 {
1024                 reg = <ADC5_AMUX_THM5_100K_PU>;
1025                 label = "charger_temp";
1026         };
1027 };
1028
1029 &pm8998_gpio {
1030         gpio-line-names = "",
1031                           "",
1032                           "SW_CTRL",
1033                           "",
1034                           "",
1035                           "",
1036                           "",
1037                           "",
1038                           "",
1039                           "",
1040                           "",
1041                           "",
1042                           "",
1043                           "",
1044                           "",
1045                           "",
1046                           "",
1047                           "",
1048                           "",
1049                           "",
1050                           "",
1051                           "CFG_OPT1",
1052                           "WCSS_PWR_REQ",
1053                           "",
1054                           "CFG_OPT2",
1055                           "SLB";
1056 };
1057
1058 &tlmm {
1059         /*
1060          * pinctrl settings for pins that have no real owners.
1061          */
1062         pinctrl-names = "default", "sleep";
1063         pinctrl-0 = <&bios_flash_wp_r_l>,
1064                     <&ap_suspend_l_deassert>;
1065
1066         pinctrl-1 = <&bios_flash_wp_r_l>,
1067                     <&ap_suspend_l_assert>;
1068
1069         /*
1070          * Hogs prevent usermode from changing the value. A GPIO can be both
1071          * here and in the pinctrl section.
1072          */
1073         ap-suspend-l-hog {
1074                 gpio-hog;
1075                 gpios = <126 GPIO_ACTIVE_LOW>;
1076                 output-low;
1077         };
1078
1079         ap_edp_bklten: ap-edp-bklten {
1080                 pinmux {
1081                         pins = "gpio37";
1082                         function = "gpio";
1083                 };
1084
1085                 pinconf {
1086                         pins = "gpio37";
1087                         drive-strength = <2>;
1088                         bias-disable;
1089                 };
1090         };
1091
1092         bios_flash_wp_r_l: bios-flash-wp-r-l {
1093                 pinmux {
1094                         pins = "gpio128";
1095                         function = "gpio";
1096                         input-enable;
1097                 };
1098
1099                 pinconf {
1100                         pins = "gpio128";
1101                         bias-disable;
1102                 };
1103         };
1104
1105         ec_ap_int_l: ec-ap-int-l {
1106                 pinmux {
1107                        pins = "gpio122";
1108                        function = "gpio";
1109                        input-enable;
1110                 };
1111
1112                 pinconf {
1113                        pins = "gpio122";
1114                        bias-pull-up;
1115                 };
1116         };
1117
1118         edp_brij_en: edp-brij-en {
1119                 pinmux {
1120                         pins = "gpio102";
1121                         function = "gpio";
1122                 };
1123
1124                 pinconf {
1125                         pins = "gpio102";
1126                         drive-strength = <2>;
1127                         bias-disable;
1128                 };
1129         };
1130
1131         edp_brij_irq: edp-brij-irq {
1132                 pinmux {
1133                         pins = "gpio10";
1134                         function = "gpio";
1135                 };
1136
1137                 pinconf {
1138                         pins = "gpio10";
1139                         drive-strength = <2>;
1140                         bias-pull-down;
1141                 };
1142         };
1143
1144         en_pp3300_dx_edp: en-pp3300-dx-edp {
1145                 pinmux {
1146                         pins = "gpio43";
1147                         function = "gpio";
1148                 };
1149
1150                 pinconf {
1151                         pins = "gpio43";
1152                         drive-strength = <2>;
1153                         bias-disable;
1154                 };
1155         };
1156
1157         h1_ap_int_odl: h1-ap-int-odl {
1158                 pinmux {
1159                         pins = "gpio129";
1160                         function = "gpio";
1161                         input-enable;
1162                 };
1163
1164                 pinconf {
1165                         pins = "gpio129";
1166                         bias-pull-up;
1167                 };
1168         };
1169
1170         pen_eject_odl: pen-eject-odl {
1171                 pinmux {
1172                         pins = "gpio119";
1173                         function = "gpio";
1174                         bias-pull-up;
1175                 };
1176         };
1177
1178         pen_irq_l: pen-irq-l {
1179                 pinmux {
1180                         pins = "gpio24";
1181                         function = "gpio";
1182                 };
1183
1184                 pinconf {
1185                         pins = "gpio24";
1186
1187                         /* Has external pullup */
1188                         bias-disable;
1189                 };
1190         };
1191
1192         pen_pdct_l: pen-pdct-l {
1193                 pinmux {
1194                         pins = "gpio63";
1195                         function = "gpio";
1196                 };
1197
1198                 pinconf {
1199                         pins = "gpio63";
1200
1201                         /* Has external pullup */
1202                         bias-disable;
1203                 };
1204         };
1205
1206         pen_rst_l: pen-rst-l {
1207                 pinmux  {
1208                         pins = "gpio23";
1209                         function = "gpio";
1210                 };
1211
1212                 pinconf {
1213                         pins = "gpio23";
1214                         bias-disable;
1215                         drive-strength = <2>;
1216
1217                         /*
1218                          * The pen driver doesn't currently support
1219                          * driving this reset line.  By specifying
1220                          * output-high here we're relying on the fact
1221                          * that this pin has a default pulldown at boot
1222                          * (which makes sure the pen was in reset if it
1223                          * was powered) and then we set it high here to
1224                          * take it out of reset.  Better would be if the
1225                          * pen driver could control this and we could
1226                          * remove "output-high" here.
1227                          */
1228                         output-high;
1229                 };
1230         };
1231
1232         sdc2_clk: sdc2-clk {
1233                 pinconf {
1234                         pins = "sdc2_clk";
1235                         bias-disable;
1236
1237                         /*
1238                          * It seems that mmc_test reports errors if drive
1239                          * strength is not 16.
1240                          */
1241                         drive-strength = <16>;
1242                 };
1243         };
1244
1245         sdc2_cmd: sdc2-cmd {
1246                 pinconf {
1247                         pins = "sdc2_cmd";
1248                         bias-pull-up;
1249                         drive-strength = <16>;
1250                 };
1251         };
1252
1253         sdc2_data: sdc2-data {
1254                 pinconf {
1255                         pins = "sdc2_data";
1256                         bias-pull-up;
1257                         drive-strength = <16>;
1258                 };
1259         };
1260
1261         sd_cd_odl: sd-cd-odl {
1262                 pinmux {
1263                         pins = "gpio44";
1264                         function = "gpio";
1265                 };
1266
1267                 pinconf {
1268                         pins = "gpio44";
1269                         bias-pull-up;
1270                 };
1271         };
1272
1273         ts_int_l: ts-int-l {
1274                 pinmux  {
1275                         pins = "gpio125";
1276                         function = "gpio";
1277                 };
1278
1279                 pinconf {
1280                         pins = "gpio125";
1281                         bias-pull-up;
1282                 };
1283         };
1284
1285         ts_reset_l: ts-reset-l {
1286                 pinmux  {
1287                         pins = "gpio118";
1288                         function = "gpio";
1289                 };
1290
1291                 pinconf {
1292                         pins = "gpio118";
1293                         bias-disable;
1294                         drive-strength = <2>;
1295                 };
1296         };
1297
1298         ap_suspend_l_assert: ap_suspend_l_assert {
1299                 config {
1300                         pins = "gpio126";
1301                         function = "gpio";
1302                         bias-no-pull;
1303                         drive-strength = <2>;
1304                         output-low;
1305                 };
1306         };
1307
1308         ap_suspend_l_deassert: ap_suspend_l_deassert {
1309                 config {
1310                         pins = "gpio126";
1311                         function = "gpio";
1312                         bias-no-pull;
1313                         drive-strength = <2>;
1314                         output-high;
1315                 };
1316         };
1317 };
1318
1319 &venus {
1320         video-firmware {
1321                 iommus = <&apps_smmu 0x10b2 0x0>;
1322         };
1323 };