arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (c) 2018 MediaTek Inc.
   4  * Author: Ben Ho <ben.ho@mediatek.com>
   5  *         Erin Lo <erin.lo@mediatek.com>
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include "mt8183.dtsi"
  11 #include "mt6358.dtsi"
  12
  13 / {
  14         aliases {
  15                 serial0 = &uart0;
  16                 mmc0 = &mmc0;
  17                 mmc1 = &mmc1;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         backlight_lcd0: backlight_lcd0 {
  25                 compatible = "pwm-backlight";
  26                 pwms = <&pwm0 0 500000>;
  27                 power-supply = <&bl_pp5000>;
  28                 enable-gpios = <&pio 176 0>;
  29                 brightness-levels = <0 1023>;
  30                 num-interpolated-steps = <1023>;
  31                 default-brightness-level = <576>;
  32                 status = "okay";
  33         };
  34
  35         memory@40000000 {
  36                 device_type = "memory";
  37                 reg = <0 0x40000000 0 0x80000000>;
  38         };
  39
  40         clk32k: oscillator1 {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 clock-frequency = <32768>;
  44                 clock-output-names = "clk32k";
  45         };
  46
  47         it6505_pp18_reg: regulator0 {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "it6505_pp18";
  50                 regulator-min-microvolt = <1800000>;
  51                 regulator-max-microvolt = <1800000>;
  52                 gpio = <&pio 178 0>;
  53                 enable-active-high;
  54         };
  55
  56         lcd_pp3300: regulator1 {
  57                 compatible = "regulator-fixed";
  58                 regulator-name = "lcd_pp3300";
  59                 regulator-min-microvolt = <3300000>;
  60                 regulator-max-microvolt = <3300000>;
  61                 regulator-always-on;
  62                 regulator-boot-on;
  63         };
  64
  65         bl_pp5000: regulator2 {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "bl_pp5000";
  68                 regulator-min-microvolt = <5000000>;
  69                 regulator-max-microvolt = <5000000>;
  70                 regulator-always-on;
  71                 regulator-boot-on;
  72         };
  73
  74         mmc1_fixed_power: regulator3 {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "mmc1_power";
  77                 regulator-min-microvolt = <3300000>;
  78                 regulator-max-microvolt = <3300000>;
  79         };
  80
  81         mmc1_fixed_io: regulator4 {
  82                 compatible = "regulator-fixed";
  83                 regulator-name = "mmc1_io";
  84                 regulator-min-microvolt = <1800000>;
  85                 regulator-max-microvolt = <1800000>;
  86         };
  87
  88         pp1800_alw: regulator5 {
  89                 compatible = "regulator-fixed";
  90                 regulator-name = "pp1800_alw";
  91                 regulator-always-on;
  92                 regulator-boot-on;
  93                 regulator-min-microvolt = <1800000>;
  94                 regulator-max-microvolt = <1800000>;
  95         };
  96
  97         pp3300_alw: regulator6 {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "pp3300_alw";
 100                 regulator-always-on;
 101                 regulator-boot-on;
 102                 regulator-min-microvolt = <3300000>;
 103                 regulator-max-microvolt = <3300000>;
 104         };
 105
 106         reserved_memory: reserved-memory {
 107                 #address-cells = <2>;
 108                 #size-cells = <2>;
 109                 ranges;
 110
 111                 scp_mem_reserved: scp_mem_region {
 112                         compatible = "shared-dma-pool";
 113                         reg = <0 0x50000000 0 0x2900000>;
 114                         no-map;
 115                 };
 116         };
 117
 118         max98357a: codec0 {
 119                 compatible = "maxim,max98357a";
 120                 sdmode-gpios = <&pio 175 0>;
 121         };
 122
 123         btsco: codec1 {
 124                 compatible = "linux,bt-sco";
 125         };
 126
 127         wifi_pwrseq: wifi-pwrseq {
 128                 compatible = "mmc-pwrseq-simple";
 129                 pinctrl-names = "default";
 130                 pinctrl-0 = <&wifi_pins_pwrseq>;
 131
 132                 /* Toggle WIFI_ENABLE to reset the chip. */
 133                 reset-gpios = <&pio 119 1>;
 134         };
 135
 136         wifi_wakeup: wifi-wakeup {
 137                 compatible = "gpio-keys";
 138                 pinctrl-names = "default";
 139                 pinctrl-0 = <&wifi_pins_wakeup>;
 140
 141                 wowlan {
 142                         label = "Wake on WiFi";
 143                         gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
 144                         linux,code = <KEY_WAKEUP>;
 145                         wakeup-source;
 146                 };
 147         };
 148
 149         tboard_thermistor1: thermal-sensor1 {
 150                 compatible = "generic-adc-thermal";
 151                 #thermal-sensor-cells = <0>;
 152                 io-channels = <&auxadc 0>;
 153                 io-channel-names = "sensor-channel";
 154                 temperature-lookup-table = <    (-5000) 4241
 155                                                 0 4063
 156                                                 5000 3856
 157                                                 10000 3621
 158                                                 15000 3364
 159                                                 20000 3091
 160                                                 25000 2810
 161                                                 30000 2526
 162                                                 35000 2247
 163                                                 40000 1982
 164                                                 45000 1734
 165                                                 50000 1507
 166                                                 55000 1305
 167                                                 60000 1122
 168                                                 65000 964
 169                                                 70000 827
 170                                                 75000 710
 171                                                 80000 606
 172                                                 85000 519
 173                                                 90000 445
 174                                                 95000 382
 175                                                 100000 330
 176                                                 105000 284
 177                                                 110000 245
 178                                                 115000 213
 179                                                 120000 183
 180                                                 125000 161>;
 181         };
 182
 183         tboard_thermistor2: thermal-sensor2 {
 184                 compatible = "generic-adc-thermal";
 185                 #thermal-sensor-cells = <0>;
 186                 io-channels = <&auxadc 1>;
 187                 io-channel-names = "sensor-channel";
 188                 temperature-lookup-table = <    (-5000) 4241
 189                                                 0 4063
 190                                                 5000 3856
 191                                                 10000 3621
 192                                                 15000 3364
 193                                                 20000 3091
 194                                                 25000 2810
 195                                                 30000 2526
 196                                                 35000 2247
 197                                                 40000 1982
 198                                                 45000 1734
 199                                                 50000 1507
 200                                                 55000 1305
 201                                                 60000 1122
 202                                                 65000 964
 203                                                 70000 827
 204                                                 75000 710
 205                                                 80000 606
 206                                                 85000 519
 207                                                 90000 445
 208                                                 95000 382
 209                                                 100000 330
 210                                                 105000 284
 211                                                 110000 245
 212                                                 115000 213
 213                                                 120000 183
 214                                                 125000 161>;
 215         };
 216 };
 217
 218 &auxadc {
 219         status = "okay";
 220 };
 221
 222 &cpu0 {
 223         proc-supply = <&mt6358_vproc12_reg>;
 224 };
 225
 226 &cpu1 {
 227         proc-supply = <&mt6358_vproc12_reg>;
 228 };
 229
 230 &cpu2 {
 231         proc-supply = <&mt6358_vproc12_reg>;
 232 };
 233
 234 &cpu3 {
 235         proc-supply = <&mt6358_vproc12_reg>;
 236 };
 237
 238 &cpu4 {
 239         proc-supply = <&mt6358_vproc11_reg>;
 240 };
 241
 242 &cpu5 {
 243         proc-supply = <&mt6358_vproc11_reg>;
 244 };
 245
 246 &cpu6 {
 247         proc-supply = <&mt6358_vproc11_reg>;
 248 };
 249
 250 &cpu7 {
 251         proc-supply = <&mt6358_vproc11_reg>;
 252 };
 253
 254 &dsi0 {
 255         status = "okay";
 256         #address-cells = <1>;
 257         #size-cells = <0>;
 258         panel: panel@0 {
 259                 /* compatible will be set in board dts */
 260                 reg = <0>;
 261                 enable-gpios = <&pio 45 0>;
 262                 pinctrl-names = "default";
 263                 pinctrl-0 = <&panel_pins_default>;
 264                 avdd-supply = <&ppvarn_lcd>;
 265                 avee-supply = <&ppvarp_lcd>;
 266                 pp1800-supply = <&pp1800_lcd>;
 267                 backlight = <&backlight_lcd0>;
 268                 port {
 269                         panel_in: endpoint {
 270                                 remote-endpoint = <&dsi_out>;
 271                         };
 272                 };
 273         };
 274
 275         ports {
 276                 port {
 277                         dsi_out: endpoint {
 278                                 remote-endpoint = <&panel_in>;
 279                         };
 280                 };
 281         };
 282 };
 283
 284 &gpu {
 285         mali-supply = <&mt6358_vgpu_reg>;
 286         sram-supply = <&mt6358_vsram_gpu_reg>;
 287 };
 288
 289 &i2c0 {
 290         pinctrl-names = "default";
 291         pinctrl-0 = <&i2c0_pins>;
 292         status = "okay";
 293         clock-frequency = <400000>;
 294         #address-cells = <1>;
 295         #size-cells = <0>;
 296 };
 297
 298 &i2c1 {
 299         pinctrl-names = "default";
 300         pinctrl-0 = <&i2c1_pins>;
 301         status = "okay";
 302         clock-frequency = <100000>;
 303 };
 304
 305 &i2c3 {
 306         pinctrl-names = "default";
 307         pinctrl-0 = <&i2c3_pins>;
 308         status = "okay";
 309         clock-frequency = <100000>;
 310         #address-cells = <1>;
 311         #size-cells = <0>;
 312 };
 313
 314 &i2c5 {
 315         pinctrl-names = "default";
 316         pinctrl-0 = <&i2c5_pins>;
 317         status = "okay";
 318         clock-frequency = <100000>;
 319         #address-cells = <1>;
 320         #size-cells = <0>;
 321 };
 322
 323 &i2c6 {
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&i2c6_pins>;
 326         status = "okay";
 327         clock-frequency = <100000>;
 328 };
 329
 330 &mipi_tx0 {
 331         status = "okay";
 332 };
 333
 334 &mmc0 {
 335         status = "okay";
 336         pinctrl-names = "default", "state_uhs";
 337         pinctrl-0 = <&mmc0_pins_default>;
 338         pinctrl-1 = <&mmc0_pins_uhs>;
 339         bus-width = <8>;
 340         max-frequency = <200000000>;
 341         cap-mmc-highspeed;
 342         mmc-hs200-1_8v;
 343         mmc-hs400-1_8v;
 344         cap-mmc-hw-reset;
 345         no-sdio;
 346         no-sd;
 347         hs400-ds-delay = <0x12814>;
 348         vmmc-supply = <&mt6358_vemc_reg>;
 349         vqmmc-supply = <&mt6358_vio18_reg>;
 350         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
 351         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
 352         non-removable;
 353 };
 354
 355 &mmc1 {
 356         status = "okay";
 357         pinctrl-names = "default", "state_uhs";
 358         pinctrl-0 = <&mmc1_pins_default>;
 359         pinctrl-1 = <&mmc1_pins_uhs>;
 360         vmmc-supply = <&mmc1_fixed_power>;
 361         vqmmc-supply = <&mmc1_fixed_io>;
 362         mmc-pwrseq = <&wifi_pwrseq>;
 363         bus-width = <4>;
 364         max-frequency = <200000000>;
 365         drv-type = <2>;
 366         cap-sd-highspeed;
 367         sd-uhs-sdr50;
 368         sd-uhs-sdr104;
 369         keep-power-in-suspend;
 370         enable-sdio-wakeup;
 371         cap-sdio-irq;
 372         non-removable;
 373         no-mmc;
 374         no-sd;
 375         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
 376         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
 377         #address-cells = <1>;
 378         #size-cells = <0>;
 379
 380         qca_wifi: qca-wifi@1 {
 381                 compatible = "qcom,ath10k";
 382                 reg = <1>;
 383         };
 384 };
 385
 386 &mt6358_vdram2_reg {
 387         regulator-always-on;
 388 };
 389
 390 &mt6358codec {
 391         Avdd-supply = <&mt6358_vaud28_reg>;
 392 };
 393
 394 &mt6358_vsim1_reg {
 395         regulator-min-microvolt = <2700000>;
 396         regulator-max-microvolt = <2700000>;
 397 };
 398
 399 &mt6358_vsim2_reg {
 400         regulator-min-microvolt = <2700000>;
 401         regulator-max-microvolt = <2700000>;
 402 };
 403
 404 &pio {
 405         bt_pins: bt-pins {
 406                 pins_bt_en {
 407                         pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
 408                         output-low;
 409                 };
 410         };
 411
 412         ec_ap_int_odl: ec_ap_int_odl {
 413                 pins1 {
 414                         pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
 415                         input-enable;
 416                         bias-pull-up;
 417                 };
 418         };
 419
 420         h1_int_od_l: h1_int_od_l {
 421                 pins1 {
 422                         pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
 423                         input-enable;
 424                 };
 425         };
 426
 427         i2c0_pins: i2c0 {
 428                 pins_bus {
 429                         pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
 430                                  <PINMUX_GPIO83__FUNC_SCL0>;
 431                         mediatek,pull-up-adv = <3>;
 432                         mediatek,drive-strength-adv = <00>;
 433                 };
 434         };
 435
 436         i2c1_pins: i2c1 {
 437                 pins_bus {
 438                         pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
 439                                  <PINMUX_GPIO84__FUNC_SCL1>;
 440                         mediatek,pull-up-adv = <3>;
 441                         mediatek,drive-strength-adv = <00>;
 442                 };
 443         };
 444
 445         i2c2_pins: i2c2 {
 446                 pins_bus {
 447                         pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
 448                                  <PINMUX_GPIO104__FUNC_SDA2>;
 449                         bias-disable;
 450                         mediatek,drive-strength-adv = <00>;
 451                 };
 452         };
 453
 454         i2c3_pins: i2c3 {
 455                 pins_bus {
 456                         pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
 457                                  <PINMUX_GPIO51__FUNC_SDA3>;
 458                         mediatek,pull-up-adv = <3>;
 459                         mediatek,drive-strength-adv = <00>;
 460                 };
 461         };
 462
 463         i2c4_pins: i2c4 {
 464                 pins_bus {
 465                         pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
 466                                  <PINMUX_GPIO106__FUNC_SDA4>;
 467                         bias-disable;
 468                         mediatek,drive-strength-adv = <00>;
 469                 };
 470         };
 471
 472         i2c5_pins: i2c5 {
 473                 pins_bus {
 474                         pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
 475                                  <PINMUX_GPIO49__FUNC_SDA5>;
 476                         mediatek,pull-up-adv = <3>;
 477                         mediatek,drive-strength-adv = <00>;
 478                 };
 479         };
 480
 481         i2c6_pins: i2c6 {
 482                 pins_bus {
 483                         pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
 484                                  <PINMUX_GPIO12__FUNC_SDA6>;
 485                         bias-disable;
 486                 };
 487         };
 488
 489         mmc0_pins_default: mmc0-pins-default {
 490                 pins_cmd_dat {
 491                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
 492                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
 493                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
 494                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
 495                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
 496                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
 497                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
 498                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
 499                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
 500                         input-enable;
 501                         drive-strength = <MTK_DRIVE_14mA>;
 502                         mediatek,pull-up-adv = <01>;
 503                 };
 504
 505                 pins_clk {
 506                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
 507                         drive-strength = <MTK_DRIVE_14mA>;
 508                         mediatek,pull-down-adv = <10>;
 509                 };
 510
 511                 pins_rst {
 512                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
 513                         drive-strength = <MTK_DRIVE_14mA>;
 514                         mediatek,pull-down-adv = <01>;
 515                 };
 516         };
 517
 518         mmc0_pins_uhs: mmc0-pins-uhs {
 519                 pins_cmd_dat {
 520                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
 521                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
 522                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
 523                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
 524                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
 525                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
 526                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
 527                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
 528                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
 529                         input-enable;
 530                         drive-strength = <MTK_DRIVE_14mA>;
 531                         mediatek,pull-up-adv = <01>;
 532                 };
 533
 534                 pins_clk {
 535                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
 536                         drive-strength = <MTK_DRIVE_14mA>;
 537                         mediatek,pull-down-adv = <10>;
 538                 };
 539
 540                 pins_ds {
 541                         pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
 542                         drive-strength = <MTK_DRIVE_14mA>;
 543                         mediatek,pull-down-adv = <10>;
 544                 };
 545
 546                 pins_rst {
 547                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
 548                         drive-strength = <MTK_DRIVE_14mA>;
 549                         mediatek,pull-up-adv = <01>;
 550                 };
 551         };
 552
 553         mmc1_pins_default: mmc1-pins-default {
 554                 pins_cmd_dat {
 555                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
 556                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
 557                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
 558                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
 559                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
 560                         input-enable;
 561                         mediatek,pull-up-adv = <10>;
 562                 };
 563
 564                 pins_clk {
 565                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
 566                         input-enable;
 567                         mediatek,pull-down-adv = <10>;
 568                 };
 569         };
 570
 571         mmc1_pins_uhs: mmc1-pins-uhs {
 572                 pins_cmd_dat {
 573                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
 574                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
 575                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
 576                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
 577                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
 578                         drive-strength = <MTK_DRIVE_6mA>;
 579                         input-enable;
 580                         mediatek,pull-up-adv = <10>;
 581                 };
 582
 583                 pins_clk {
 584                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
 585                         drive-strength = <MTK_DRIVE_8mA>;
 586                         mediatek,pull-down-adv = <10>;
 587                         input-enable;
 588                 };
 589         };
 590
 591         panel_pins_default: panel_pins_default {
 592                 panel_reset {
 593                         pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
 594                         output-low;
 595                         bias-pull-up;
 596                 };
 597         };
 598
 599         pwm0_pin_default: pwm0_pin_default {
 600                 pins1 {
 601                         pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
 602                         output-high;
 603                         bias-pull-up;
 604                 };
 605                 pins2 {
 606                         pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
 607                 };
 608         };
 609
 610         scp_pins: scp {
 611                 pins_scp_uart {
 612                         pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
 613                                  <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
 614                 };
 615         };
 616
 617         spi0_pins: spi0 {
 618                 pins_spi{
 619                         pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
 620                                  <PINMUX_GPIO86__FUNC_GPIO86>,
 621                                  <PINMUX_GPIO87__FUNC_SPI0_MO>,
 622                                  <PINMUX_GPIO88__FUNC_SPI0_CLK>;
 623                         bias-disable;
 624                 };
 625         };
 626
 627         spi1_pins: spi1 {
 628                 pins_spi{
 629                         pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
 630                                  <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
 631                                  <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
 632                                  <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
 633                         bias-disable;
 634                 };
 635         };
 636
 637         spi2_pins: spi2 {
 638                 pins_spi{
 639                         pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
 640                                  <PINMUX_GPIO1__FUNC_SPI2_MO>,
 641                                  <PINMUX_GPIO2__FUNC_SPI2_CLK>;
 642                         bias-disable;
 643                 };
 644                 pins_spi_mi {
 645                         pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
 646                         mediatek,pull-down-adv = <00>;
 647                 };
 648         };
 649
 650         spi3_pins: spi3 {
 651                 pins_spi{
 652                         pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
 653                                  <PINMUX_GPIO22__FUNC_SPI3_CSB>,
 654                                  <PINMUX_GPIO23__FUNC_SPI3_MO>,
 655                                  <PINMUX_GPIO24__FUNC_SPI3_CLK>;
 656                         bias-disable;
 657                 };
 658         };
 659
 660         spi4_pins: spi4 {
 661                 pins_spi{
 662                         pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
 663                                  <PINMUX_GPIO18__FUNC_SPI4_CSB>,
 664                                  <PINMUX_GPIO19__FUNC_SPI4_MO>,
 665                                  <PINMUX_GPIO20__FUNC_SPI4_CLK>;
 666                         bias-disable;
 667                 };
 668         };
 669
 670         spi5_pins: spi5 {
 671                 pins_spi{
 672                         pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
 673                                  <PINMUX_GPIO14__FUNC_SPI5_CSB>,
 674                                  <PINMUX_GPIO15__FUNC_SPI5_MO>,
 675                                  <PINMUX_GPIO16__FUNC_SPI5_CLK>;
 676                         bias-disable;
 677                 };
 678         };
 679
 680         uart0_pins_default: uart0-pins-default {
 681                 pins_rx {
 682                         pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
 683                         input-enable;
 684                         bias-pull-up;
 685                 };
 686                 pins_tx {
 687                         pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
 688                 };
 689         };
 690
 691         uart1_pins_default: uart1-pins-default {
 692                 pins_rx {
 693                         pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
 694                         input-enable;
 695                         bias-pull-up;
 696                 };
 697                 pins_tx {
 698                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
 699                 };
 700                 pins_rts {
 701                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
 702                         output-enable;
 703                 };
 704                 pins_cts {
 705                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
 706                         input-enable;
 707                 };
 708         };
 709
 710         uart1_pins_sleep: uart1-pins-sleep {
 711                 pins_rx {
 712                         pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
 713                         input-enable;
 714                         bias-pull-up;
 715                 };
 716                 pins_tx {
 717                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
 718                 };
 719                 pins_rts {
 720                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
 721                         output-enable;
 722                 };
 723                 pins_cts {
 724                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
 725                         input-enable;
 726                 };
 727         };
 728
 729         wifi_pins_pwrseq: wifi-pins-pwrseq {
 730                 pins_wifi_enable {
 731                         pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
 732                         output-low;
 733                 };
 734         };
 735
 736         wifi_pins_wakeup: wifi-pins-wakeup {
 737                 pins_wifi_wakeup {
 738                         pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
 739                         input-enable;
 740                 };
 741         };
 742 };
 743
 744 &pwm0 {
 745         status = "okay";
 746         pinctrl-names = "default";
 747         pinctrl-0 = <&pwm0_pin_default>;
 748 };
 749
 750 &scp {
 751         status = "okay";
 752         pinctrl-names = "default";
 753         pinctrl-0 = <&scp_pins>;
 754
 755         cros_ec {
 756                 compatible = "google,cros-ec-rpmsg";
 757                 mtk,rpmsg-name = "cros-ec-rpmsg";
 758         };
 759 };
 760
 761 &mfg {
 762         domain-supply = <&mt6358_vgpu_reg>;
 763 };
 764
 765 &soc_data {
 766         status = "okay";
 767 };
 768
 769 &spi0 {
 770         pinctrl-names = "default";
 771         pinctrl-0 = <&spi0_pins>;
 772         mediatek,pad-select = <0>;
 773         status = "okay";
 774         cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
 775
 776         cr50@0 {
 777                 compatible = "google,cr50";
 778                 reg = <0>;
 779                 spi-max-frequency = <1000000>;
 780                 pinctrl-names = "default";
 781                 pinctrl-0 = <&h1_int_od_l>;
 782                 interrupt-parent = <&pio>;
 783                 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
 784         };
 785 };
 786
 787 &spi1 {
 788         pinctrl-names = "default";
 789         pinctrl-0 = <&spi1_pins>;
 790         mediatek,pad-select = <0>;
 791         status = "okay";
 792
 793         w25q64dw: spi-flash@0 {
 794                 compatible = "winbond,w25q64dw", "jedec,spi-nor";
 795                 reg = <0>;
 796                 spi-max-frequency = <25000000>;
 797         };
 798 };
 799
 800 &spi2 {
 801         pinctrl-names = "default";
 802         pinctrl-0 = <&spi2_pins>;
 803         mediatek,pad-select = <0>;
 804         status = "okay";
 805
 806         cros_ec: cros-ec@0 {
 807                 compatible = "google,cros-ec-spi";
 808                 reg = <0>;
 809                 spi-max-frequency = <3000000>;
 810                 interrupt-parent = <&pio>;
 811                 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
 812                 pinctrl-names = "default";
 813                 pinctrl-0 = <&ec_ap_int_odl>;
 814
 815                 i2c_tunnel: i2c-tunnel {
 816                         compatible = "google,cros-ec-i2c-tunnel";
 817                         google,remote-bus = <1>;
 818                         #address-cells = <1>;
 819                         #size-cells = <0>;
 820                 };
 821
 822                 usbc_extcon: extcon0 {
 823                         compatible = "google,extcon-usbc-cros-ec";
 824                         google,usb-port-id = <0>;
 825                 };
 826
 827                 cbas {
 828                         compatible = "google,cros-cbas";
 829                 };
 830         };
 831 };
 832
 833 &spi3 {
 834         pinctrl-names = "default";
 835         pinctrl-0 = <&spi3_pins>;
 836         mediatek,pad-select = <0>;
 837         status = "disabled";
 838 };
 839
 840 &spi4 {
 841         pinctrl-names = "default";
 842         pinctrl-0 = <&spi4_pins>;
 843         mediatek,pad-select = <0>;
 844         status = "disabled";
 845 };
 846
 847 &spi5 {
 848         pinctrl-names = "default";
 849         pinctrl-0 = <&spi5_pins>;
 850         mediatek,pad-select = <0>;
 851         status = "disabled";
 852 };
 853
 854 &ssusb {
 855         dr_mode = "host";
 856         wakeup-source;
 857         vusb33-supply = <&mt6358_vusb_reg>;
 858         status = "okay";
 859 };
 860
 861 &thermal_zones {
 862         tboard1 {
 863                 polling-delay = <1000>; /* milliseconds */
 864                 polling-delay-passive = <0>; /* milliseconds */
 865                 thermal-sensors = <&tboard_thermistor1>;
 866         };
 867
 868         tboard2 {
 869                 polling-delay = <1000>; /* milliseconds */
 870                 polling-delay-passive = <0>; /* milliseconds */
 871                 thermal-sensors = <&tboard_thermistor2>;
 872         };
 873 };
 874
 875 &u3phy {
 876         status = "okay";
 877 };
 878
 879 &uart0 {
 880         pinctrl-names = "default";
 881         pinctrl-0 = <&uart0_pins_default>;
 882         status = "okay";
 883 };
 884
 885 &uart1 {
 886         pinctrl-names = "default", "sleep";
 887         pinctrl-0 = <&uart1_pins_default>;
 888         pinctrl-1 = <&uart1_pins_sleep>;
 889         status = "okay";
 890         interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
 891                               <&pio 121 IRQ_TYPE_EDGE_FALLING>;
 892
 893         bluetooth: bluetooth {
 894                 pinctrl-names = "default";
 895                 pinctrl-0 = <&bt_pins>;
 896                 status = "okay";
 897                 compatible = "qcom,qca6174-bt";
 898                 enable-gpios = <&pio 120 0>;
 899                 clocks = <&clk32k>;
 900                 firmware-name = "nvm_00440302_i2s.bin";
 901         };
 902 };
 903
 904 &usb_host {
 905         #address-cells = <1>;
 906         #size-cells = <0>;
 907         vusb33-supply = <&mt6358_vusb_reg>;
 908         status = "okay";
 909
 910         hub@1 {
 911                 compatible = "usb5e3,610";
 912                 reg = <1>;
 913         };
 914 };
 915
 916 #include <arm/cros-ec-keyboard.dtsi>
 917 #include <arm/cros-ec-sbs.dtsi>