arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * Copyright 2019 Toradex
   4  */
   5
   6 #include "imx8qxp.dtsi"
   7
   8 / {
   9         model = "Toradex Colibri iMX8QXP/DX Module";
  10         compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
  11
  12         chosen {
  13                 stdout-path = &lpuart3;
  14         };
  15
  16         reg_module_3v3: regulator-module-3v3 {
  17                 compatible = "regulator-fixed";
  18                 regulator-name = "+V3.3";
  19                 regulator-min-microvolt = <3300000>;
  20                 regulator-max-microvolt = <3300000>;
  21         };
  22 };
  23
  24 /* On-module I2C */
  25 &i2c0 {
  26         #address-cells = <1>;
  27         #size-cells = <0>;
  28         clock-frequency = <100000>;
  29         pinctrl-names = "default";
  30         pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
  31         status = "okay";
  32
  33         /* Touch controller */
  34         touchscreen@2c {
  35                 compatible = "adi,ad7879-1";
  36                 pinctrl-names = "default";
  37                 pinctrl-0 = <&pinctrl_ad7879_int>;
  38                 reg = <0x2c>;
  39                 interrupt-parent = <&lsio_gpio3>;
  40                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  41                 touchscreen-max-pressure = <4096>;
  42                 adi,resistance-plate-x = <120>;
  43                 adi,first-conversion-delay = /bits/ 8 <3>;
  44                 adi,acquisition-time = /bits/ 8 <1>;
  45                 adi,median-filter-size = /bits/ 8 <2>;
  46                 adi,averaging = /bits/ 8 <1>;
  47                 adi,conversion-interval = /bits/ 8 <255>;
  48         };
  49 };
  50
  51 /* Colibri I2C */
  52 &i2c1 {
  53         #address-cells = <1>;
  54         #size-cells = <0>;
  55         clock-frequency = <100000>;
  56         pinctrl-names = "default";
  57         pinctrl-0 = <&pinctrl_i2c1>;
  58 };
  59
  60 /* Colibri UART_B */
  61 &lpuart0 {
  62         pinctrl-names = "default";
  63         pinctrl-0 = <&pinctrl_lpuart0>;
  64 };
  65
  66 /* Colibri UART_C */
  67 &lpuart2 {
  68         pinctrl-names = "default";
  69         pinctrl-0 = <&pinctrl_lpuart2>;
  70 };
  71
  72 /* Colibri UART_A */
  73 &lpuart3 {
  74         pinctrl-names = "default";
  75         pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
  76 };
  77
  78 /* Colibri FastEthernet */
  79 &fec1 {
  80         pinctrl-names = "default", "sleep";
  81         pinctrl-0 = <&pinctrl_fec1>;
  82         pinctrl-1 = <&pinctrl_fec1_sleep>;
  83         phy-mode = "rmii";
  84         phy-handle = <&ethphy0>;
  85         fsl,magic-packet;
  86
  87         mdio {
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90
  91                 ethphy0: ethernet-phy@2 {
  92                         compatible = "ethernet-phy-ieee802.3-c22";
  93                         max-speed = <100>;
  94                         reg = <2>;
  95                 };
  96         };
  97 };
  98
  99 /* On-module eMMC */
 100 &usdhc1 {
 101         bus-width = <8>;
 102         non-removable;
 103         no-sd;
 104         no-sdio;
 105         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 106         pinctrl-0 = <&pinctrl_usdhc1>;
 107         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
 108         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 109         status = "okay";
 110 };
 111
 112 /* Colibri SD/MMC Card */
 113 &usdhc2 {
 114         bus-width = <4>;
 115         cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
 116         vmmc-supply = <&reg_module_3v3>;
 117         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
 118         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
 119         pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
 120         pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
 121         pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
 122         disable-wp;
 123 };
 124
 125 &iomuxc {
 126         pinctrl-names = "default";
 127         pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>;
 128
 129         /* On-module touch pen-down interrupt */
 130         pinctrl_ad7879_int: ad7879intgrp {
 131                 fsl,pins = <
 132                         IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05      0x21
 133                 >;
 134         };
 135
 136         /* Colibri Analogue Inputs */
 137         pinctrl_adc0: adc0grp {
 138                 fsl,pins = <
 139                         IMX8QXP_ADC_IN0_ADMA_ADC_IN0                    0x60            /* SODIMM   8 */
 140                         IMX8QXP_ADC_IN1_ADMA_ADC_IN1                    0x60            /* SODIMM   6 */
 141                         IMX8QXP_ADC_IN4_ADMA_ADC_IN4                    0x60            /* SODIMM   4 */
 142                         IMX8QXP_ADC_IN5_ADMA_ADC_IN5                    0x60            /* SODIMM   2 */
 143                 >;
 144         };
 145
 146         pinctrl_can_int: canintgrp {
 147                 fsl,pins = <
 148                         IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13              0x40            /* SODIMM  73 */
 149                 >;
 150         };
 151
 152         pinctrl_csi_ctl: csictlgrp {
 153                 fsl,pins = <
 154                         IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14            0x20            /* SODIMM  77 */
 155                         IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15            0x20            /* SODIMM  89 */
 156                 >;
 157         };
 158
 159         pinctrl_ext_io0: extio0grp {
 160                 fsl,pins = <
 161                         IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08        0x06000040      /* SODIMM 135 */
 162                 >;
 163         };
 164
 165         /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
 166         pinctrl_fec1: fec1grp {
 167                 fsl,pins = <
 168                         IMX8QXP_ENET0_MDC_CONN_ENET0_MDC                        0x06000020
 169                         IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO                      0x06000020
 170                         IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL      0x61
 171                         IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT          0x06000061
 172                         IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0          0x61
 173                         IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1          0x61
 174                         IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL      0x61
 175                         IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0          0x61
 176                         IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1          0x61
 177                         IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER          0x61
 178                 >;
 179         };
 180
 181         pinctrl_fec1_sleep: fec1slpgrp {
 182                 fsl,pins = <
 183                         IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11               0x06000041
 184                         IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10              0x06000041
 185                         IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30      0x41
 186                         IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29         0x41
 187                         IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31        0x41
 188                         IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00        0x41
 189                         IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04      0x41
 190                         IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05        0x41
 191                         IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06        0x41
 192                         IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07        0x41
 193                 >;
 194         };
 195
 196         /* Colibri optional CAN on UART_B RTS/CTS */
 197         pinctrl_flexcan1: flexcan0grp {
 198                 fsl,pins = <
 199                         IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX            0x21            /* SODIMM  32 */
 200                         IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX            0x21            /* SODIMM  34 */
 201                 >;
 202         };
 203
 204         /* Colibri optional CAN on PS2 */
 205         pinctrl_flexcan2: flexcan1grp {
 206                 fsl,pins = <
 207                         IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX            0x21            /* SODIMM  55 */
 208                         IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX            0x21            /* SODIMM  63 */
 209                 >;
 210         };
 211
 212         /* Colibri optional CAN on UART_A TXD/RXD */
 213         pinctrl_flexcan3: flexcan2grp {
 214                 fsl,pins = <
 215                         IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX            0x21            /* SODIMM  35 */
 216                         IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX            0x21            /* SODIMM  33 */
 217                 >;
 218         };
 219
 220         /* Colibri LCD Back-Light GPIO */
 221         pinctrl_gpio_bl_on: gpioblongrp {
 222                 fsl,pins = <
 223                         IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12            0x60            /* SODIMM  71 */
 224                 >;
 225         };
 226
 227         pinctrl_gpiokeys: gpiokeysgrp {
 228                 fsl,pins = <
 229                         IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10            0x06700041      /* SODIMM  45 */
 230                 >;
 231         };
 232
 233         pinctrl_hog0: hog0grp {
 234                 fsl,pins = <
 235                         IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02        0x06000020      /* SODIMM  65 */
 236                         IMX8QXP_CSI_D07_CI_PI_D09                       0x61            /* SODIMM  65 */
 237                         IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11            0x20            /* SODIMM  69 */
 238                         IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26                0x20            /* SODIMM  79 */
 239                         IMX8QXP_CSI_D02_CI_PI_D04                       0x61            /* SODIMM  79 */
 240                         IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03         0x06000020      /* SODIMM  85 */
 241                         IMX8QXP_CSI_D06_CI_PI_D08                       0x61            /* SODIMM  85 */
 242                         IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17             0x20            /* SODIMM  95 */
 243                         IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27                0x20            /* SODIMM  97 */
 244                         IMX8QXP_CSI_D03_CI_PI_D05                       0x61            /* SODIMM  97 */
 245                         IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18            0x20            /* SODIMM  99 */
 246                         IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28               0x20            /* SODIMM 101 */
 247                         IMX8QXP_CSI_D00_CI_PI_D02                       0x61            /* SODIMM 101 */
 248                         IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25                0x20            /* SODIMM 103 */
 249                         IMX8QXP_CSI_D01_CI_PI_D03                       0x61            /* SODIMM 103 */
 250                         IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19            0x20            /* SODIMM 105 */
 251                         IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20            0x20            /* SODIMM 107 */
 252                         IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05             0x20            /* SODIMM 127 */
 253                         IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06             0x20            /* SODIMM 131 */
 254                         IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04             0x20            /* SODIMM 133 */
 255                         IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00                0x20            /* SODIMM  96 */
 256                         IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21            0x20            /* SODIMM  98 */
 257                         IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31               0x20            /* SODIMM 100 */
 258                         IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22              0x20            /* SODIMM 102 */
 259                         IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23            0x20            /* SODIMM 104 */
 260                         IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24            0x20            /* SODIMM 106 */
 261                 >;
 262         };
 263
 264         pinctrl_hog1: hog1grp {
 265                 fsl,pins = <
 266                         IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01                0x20            /* SODIMM  75 */
 267                         IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16             0x20            /* SODIMM  93 */
 268                 >;
 269         };
 270
 271         /*
 272          * This pin is used in the SCFW as a UART. Using it from
 273          * Linux would require rewritting the SCFW board file.
 274          */
 275         pinctrl_hog_scfw: hogscfwgrp {
 276                 fsl,pins = <
 277                         IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03            0x20            /* SODIMM 144 */
 278                 >;
 279         };
 280
 281         /* On Module I2C */
 282         pinctrl_i2c0: i2c0grp {
 283                 fsl,pins = <
 284                         IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL        0x06000021
 285                         IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA        0x06000021
 286                 >;
 287         };
 288
 289         /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
 290         pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp {
 291                 fsl,pins = <
 292                         IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL   0xc6000020      /* SODIMM 140 */
 293                         IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA   0xc6000020      /* SODIMM 142 */
 294                 >;
 295         };
 296
 297         /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
 298         pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp {
 299                 fsl,pins = <
 300                         IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL   0xc6000020      /* SODIMM 186 */
 301                         IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA   0xc6000020      /* SODIMM 188 */
 302                 >;
 303         };
 304
 305         /* Colibri I2C */
 306         pinctrl_i2c1: i2c1grp {
 307                 fsl,pins = <
 308                         IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL        0x06000021      /* SODIMM 196 */
 309                         IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA        0x06000021      /* SODIMM 194 */
 310                 >;
 311         };
 312
 313         /* Colibri Parallel RGB LCD Interface */
 314         pinctrl_lcdif: lcdifgrp {
 315                 fsl,pins = <
 316                         IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK                0x60            /* SODIMM  56 */
 317                         IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC               0x60            /* SODIMM  68 */
 318                         IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC               0x60            /* SODIMM  82 */
 319                         IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN                  0x60            /* SODIMM  44 */
 320                         IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19          0x60            /* SODIMM  44 */
 321                         IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00                0x60            /* SODIMM  76 */
 322                         IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21               0x60            /* SODIMM  76 */
 323                         IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01                0x60            /* SODIMM  70 */
 324                         IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02               0x60            /* SODIMM  60 */
 325                         IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03               0x60            /* SODIMM  58 */
 326                         IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04                0x60            /* SODIMM  78 */
 327                         IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05                0x60            /* SODIMM  72 */
 328                         IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06            0x60            /* SODIMM  80 */
 329                         IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07            0x60            /* SODIMM  46 */
 330                         IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08            0x60            /* SODIMM  62 */
 331                         IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09            0x60            /* SODIMM  48 */
 332                         IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10                0x60            /* SODIMM  74 */
 333                         IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11                0x60            /* SODIMM  50 */
 334                         IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12           0x60            /* SODIMM  52 */
 335                         IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13                 0x60            /* SODIMM  54 */
 336                         IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14                 0x60            /* SODIMM  66 */
 337                         IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15                 0x60            /* SODIMM  64 */
 338                         IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16                 0x60            /* SODIMM  57 */
 339                         IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01        0x60            /* SODIMM  57 */
 340                         IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17              0x60            /* SODIMM  61 */
 341                 >;
 342         };
 343
 344         /* Colibri SPI */
 345         pinctrl_lpspi2: lpspi2grp {
 346                 fsl,pins = <
 347                         IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00                0x21            /* SODIMM  86 */
 348                         IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO                  0x06000040      /* SODIMM  92 */
 349                         IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI                  0x06000040      /* SODIMM  90 */
 350                         IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK                  0x06000040      /* SODIMM  88 */
 351                 >;
 352         };
 353
 354         /* Colibri UART_B */
 355         pinctrl_lpuart0: lpuart0grp {
 356                 fsl,pins = <
 357                         IMX8QXP_UART0_RX_ADMA_UART0_RX                  0x06000020      /* SODIMM  36 */
 358                         IMX8QXP_UART0_TX_ADMA_UART0_TX                  0x06000020      /* SODIMM  38 */
 359                         IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B            0x06000020      /* SODIMM  34 */
 360                         IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B            0x06000020      /* SODIMM  32 */
 361                 >;
 362         };
 363
 364         /* Colibri UART_C */
 365         pinctrl_lpuart2: lpuart2grp {
 366                 fsl,pins = <
 367                         IMX8QXP_UART2_RX_ADMA_UART2_RX                  0x06000020      /* SODIMM  19 */
 368                         IMX8QXP_UART2_TX_ADMA_UART2_TX                  0x06000020      /* SODIMM  21 */
 369                 >;
 370         };
 371
 372         /* Colibri UART_A */
 373         pinctrl_lpuart3: lpuart3grp {
 374                 fsl,pins = <
 375                         IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX               0x06000020      /* SODIMM  33 */
 376                         IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX               0x06000020      /* SODIMM  35 */
 377                 >;
 378         };
 379
 380         /* Colibri UART_A Control */
 381         pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
 382                 fsl,pins = <
 383                         IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00      0x20            /* SODIMM  23 */
 384                         IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29                0x20            /* SODIMM  25 */
 385                         IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30                0x20            /* SODIMM  27 */
 386                         IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03               0x20            /* SODIMM  29 */
 387                         IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22             0x20            /* SODIMM  31 */
 388                         IMX8QXP_CSI_EN_LSIO_GPIO3_IO02                  0x20            /* SODIMM  37 */
 389                 >;
 390         };
 391
 392         /* On module wifi module */
 393         pinctrl_pcieb: pciebgrp {
 394                 fsl,pins = <
 395                         IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01     0x04000061      /* SODIMM 178 */
 396                         IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02       0x04000061      /* SODIMM  94 */
 397                         IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00      0x60            /* SODIMM  81 */
 398                 >;
 399         };
 400
 401         /* Colibri PWM_A */
 402         pinctrl_pwm_a: pwmagrp {
 403         /* both pins are connected together, reserve the unused CSI_D05 */
 404                 fsl,pins = <
 405                         IMX8QXP_CSI_D05_CI_PI_D07                       0x61            /* SODIMM  59 */
 406                         IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT              0x60            /* SODIMM  59 */
 407                 >;
 408         };
 409
 410         /* Colibri PWM_B */
 411         pinctrl_pwm_b: pwmbgrp {
 412                 fsl,pins = <
 413                         IMX8QXP_UART1_TX_LSIO_PWM0_OUT                  0x60            /* SODIMM  28 */
 414                 >;
 415         };
 416
 417         /* Colibri PWM_C */
 418         pinctrl_pwm_c: pwmcgrp {
 419                 fsl,pins = <
 420                         IMX8QXP_UART1_RX_LSIO_PWM1_OUT                  0x60            /* SODIMM  30 */
 421                 >;
 422         };
 423
 424         /* Colibri PWM_D */
 425         pinctrl_pwm_d: pwmdgrp {
 426         /* both pins are connected together, reserve the unused CSI_D04 */
 427                 fsl,pins = <
 428                         IMX8QXP_CSI_D04_CI_PI_D06                       0x61            /* SODIMM  67 */
 429                         IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT               0x60            /* SODIMM  67 */
 430                 >;
 431         };
 432
 433         /* On-module I2S */
 434         pinctrl_sai0: sai0grp {
 435                 fsl,pins = <
 436                         IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD                  0x06000040
 437                         IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD                  0x06000040
 438                         IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC                  0x06000040
 439                         IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS                 0x06000040
 440                 >;
 441         };
 442
 443         /* Colibri Audio Analogue Microphone GND */
 444         pinctrl_sgtl5000: sgtl5000grp {
 445                 fsl,pins = <
 446                         /* MIC GND EN */
 447                         IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06      0x41
 448                 >;
 449         };
 450
 451         /* On-module SGTL5000 clock */
 452         pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp {
 453                 fsl,pins = <
 454                         IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0              0x21
 455                 >;
 456         };
 457
 458         /* On-module USB interrupt */
 459         pinctrl_usb3503a: usb3503agrp {
 460                 fsl,pins = <
 461                         IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04      0x61
 462                 >;
 463         };
 464
 465         /* Colibri USB Client Cable Detect */
 466         pinctrl_usbc_det: usbcdetgrp {
 467                 fsl,pins = <
 468                         IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09   0x06000040      /* SODIMM 137 */
 469                 >;
 470         };
 471
 472         /* USB Host Power Enable */
 473         pinctrl_usbh1_reg: usbh1reggrp {
 474                 fsl,pins = <
 475                         IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03             0x06000040      /* SODIMM 129 */
 476                 >;
 477         };
 478
 479         /* On-module eMMC */
 480         pinctrl_usdhc1: usdhc1grp {
 481                 fsl,pins = <
 482                         IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK                0x06000041
 483                         IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD                0x21
 484                         IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0            0x21
 485                         IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1            0x21
 486                         IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2            0x21
 487                         IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3            0x21
 488                         IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4            0x21
 489                         IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5            0x21
 490                         IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6            0x21
 491                         IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7            0x21
 492                         IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE          0x41
 493                         IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B        0x21
 494                 >;
 495         };
 496
 497         pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
 498                 fsl,pins = <
 499                         IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK                0x06000041
 500                         IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD                0x21
 501                         IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0            0x21
 502                         IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1            0x21
 503                         IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2            0x21
 504                         IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3            0x21
 505                         IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4            0x21
 506                         IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5            0x21
 507                         IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6            0x21
 508                         IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7            0x21
 509                         IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE          0x41
 510                         IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B        0x21
 511                 >;
 512         };
 513
 514         pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
 515                 fsl,pins = <
 516                         IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK                0x06000041
 517                         IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD                0x21
 518                         IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0            0x21
 519                         IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1            0x21
 520                         IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2            0x21
 521                         IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3            0x21
 522                         IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4            0x21
 523                         IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5            0x21
 524                         IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6            0x21
 525                         IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7            0x21
 526                         IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE          0x41
 527                         IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B        0x21
 528                 >;
 529         };
 530
 531         /* Colibri SD/MMC Card Detect */
 532         pinctrl_usdhc2_gpio: usdhc2gpiogrp {
 533                 fsl,pins = <
 534                         IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09            0x06000021      /* SODIMM  43 */
 535                 >;
 536         };
 537
 538         pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
 539                 fsl,pins = <
 540                         IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09            0x60            /* SODIMM  43 */
 541                 >;
 542         };
 543
 544         /* Colibri SD/MMC Card */
 545         pinctrl_usdhc2: usdhc2grp {
 546                 fsl,pins = <
 547                         IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK              0x06000041      /* SODIMM  47 */
 548                         IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD              0x21            /* SODIMM 190 */
 549                         IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0          0x21            /* SODIMM 192 */
 550                         IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1          0x21            /* SODIMM  49 */
 551                         IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2          0x21            /* SODIMM  51 */
 552                         IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3          0x21            /* SODIMM  53 */
 553                         IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT      0x21
 554                 >;
 555         };
 556
 557         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
 558                 fsl,pins = <
 559                         IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK              0x06000041      /* SODIMM  47 */
 560                         IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD              0x21            /* SODIMM 190 */
 561                         IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0          0x21            /* SODIMM 192 */
 562                         IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1          0x21            /* SODIMM  49 */
 563                         IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2          0x21            /* SODIMM  51 */
 564                         IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3          0x21            /* SODIMM  53 */
 565                         IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT      0x21
 566                 >;
 567         };
 568
 569         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
 570                 fsl,pins = <
 571                         IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK              0x06000041      /* SODIMM  47 */
 572                         IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD              0x21            /* SODIMM 190 */
 573                         IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0          0x21            /* SODIMM 192 */
 574                         IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1          0x21            /* SODIMM  49 */
 575                         IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2          0x21            /* SODIMM  51 */
 576                         IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3          0x21            /* SODIMM  53 */
 577                         IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT      0x21
 578                 >;
 579         };
 580
 581         pinctrl_usdhc2_sleep: usdhc2slpgrp {
 582                 fsl,pins = <
 583                         IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23              0x60            /* SODIMM  47 */
 584                         IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24              0x60            /* SODIMM 190 */
 585                         IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25            0x60            /* SODIMM 192 */
 586                         IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26            0x60            /* SODIMM  49 */
 587                         IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27            0x60            /* SODIMM  51 */
 588                         IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28            0x60            /* SODIMM  53 */
 589                         IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT      0x21
 590                 >;
 591         };
 592
 593         pinctrl_wifi: wifigrp {
 594                 fsl,pins = <
 595                         IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K     0x20
 596                 >;
 597         };
 598 };