Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / freescale / imx8mn-beacon-baseboard.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3  * Copyright 2020 Compass Electronics Group, LLC
4  */
5
6 / {
7         leds {
8                 compatible = "gpio-leds";
9
10                 led-0 {
11                         label = "gen_led0";
12                         gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
13                         default-state = "off";
14                 };
15
16                 led-1 {
17                         label = "gen_led1";
18                         gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
19                         default-state = "off";
20                 };
21
22                 led-2 {
23                         label = "gen_led2";
24                         gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
25                         default-state = "off";
26                 };
27
28                 led-3 {
29                         pinctrl-names = "default";
30                         pinctrl-0 = <&pinctrl_led3>;
31                         label = "heartbeat";
32                         gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
33                         linux,default-trigger = "heartbeat";
34                 };
35         };
36
37         reg_audio: regulator-audio {
38                 compatible = "regulator-fixed";
39                 regulator-name = "3v3_aud";
40                 regulator-min-microvolt = <3300000>;
41                 regulator-max-microvolt = <3300000>;
42                 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
43                 enable-active-high;
44         };
45
46         reg_usdhc2_vmmc: regulator-usdhc2 {
47                 compatible = "regulator-fixed";
48                 regulator-name = "vsd_3v3";
49                 regulator-min-microvolt = <3300000>;
50                 regulator-max-microvolt = <3300000>;
51                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
52                 enable-active-high;
53         };
54
55         reg_usb_otg_vbus: regulator-usb {
56                 compatible = "regulator-fixed";
57                 pinctrl-names = "default";
58                 pinctrl-0 = <&pinctrl_reg_usb_otg>;
59                 regulator-name = "usb_otg_vbus";
60                 regulator-min-microvolt = <5000000>;
61                 regulator-max-microvolt = <5000000>;
62                 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
63                 enable-active-high;
64         };
65
66         sound {
67                 compatible = "fsl,imx-audio-wm8962";
68                 model = "wm8962-audio";
69                 audio-cpu = <&sai3>;
70                 audio-codec = <&wm8962>;
71                 audio-routing =
72                         "Headphone Jack", "HPOUTL",
73                         "Headphone Jack", "HPOUTR",
74                         "Ext Spk", "SPKOUTL",
75                         "Ext Spk", "SPKOUTR",
76                         "AMIC", "MICBIAS",
77                         "IN3R", "AMIC";
78         };
79 };
80
81 &ecspi2 {
82         pinctrl-names = "default";
83         pinctrl-0 = <&pinctrl_espi2>;
84         cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
85         status = "okay";
86
87         eeprom@0 {
88                 compatible = "microchip,at25160bn", "atmel,at25";
89                 reg = <0>;
90                 spi-max-frequency = <5000000>;
91                 spi-cpha;
92                 spi-cpol;
93                 pagesize = <32>;
94                 size = <2048>;
95                 address-width = <16>;
96         };
97 };
98
99 &i2c4 {
100         clock-frequency = <400000>;
101         pinctrl-names = "default";
102         pinctrl-0 = <&pinctrl_i2c4>;
103         status = "okay";
104
105         pca6416_0: gpio@20 {
106                 compatible = "nxp,pcal6416";
107                 reg = <0x20>;
108                 pinctrl-names = "default";
109                 pinctrl-0 = <&pinctrl_pcal6414>;
110                 gpio-controller;
111                 #gpio-cells = <2>;
112                 interrupt-parent = <&gpio4>;
113                 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
114         };
115
116         pca6416_1: gpio@21 {
117                 compatible = "nxp,pcal6416";
118                 reg = <0x21>;
119                 gpio-controller;
120                 #gpio-cells = <2>;
121                 interrupt-parent = <&gpio4>;
122                 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
123         };
124
125         wm8962: audio-codec@1a {
126                 compatible = "wlf,wm8962";
127                 reg = <0x1a>;
128                 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
129                 clock-names = "xclk";
130                 DCVDD-supply = <&reg_audio>;
131                 DBVDD-supply = <&reg_audio>;
132                 AVDD-supply = <&reg_audio>;
133                 CPVDD-supply = <&reg_audio>;
134                 MICVDD-supply = <&reg_audio>;
135                 PLLVDD-supply = <&reg_audio>;
136                 SPKVDD1-supply = <&reg_audio>;
137                 SPKVDD2-supply = <&reg_audio>;
138                 gpio-cfg = <
139                         0x0000 /* 0:Default */
140                         0x0000 /* 1:Default */
141                         0x0000 /* 2:FN_DMICCLK */
142                         0x0000 /* 3:Default */
143                         0x0000 /* 4:FN_DMICCDAT */
144                         0x0000 /* 5:Default */
145                 >;
146         };
147 };
148
149 &easrc {
150         fsl,asrc-rate  = <48000>;
151         status = "okay";
152 };
153
154 &sai3 {
155         pinctrl-names = "default";
156         pinctrl-0 = <&pinctrl_sai3>;
157         assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
158         assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
159         assigned-clock-rates = <24576000>;
160         fsl,sai-mclk-direction-output;
161         status = "okay";
162 };
163
164 &snvs_pwrkey {
165         status = "okay";
166 };
167
168 &uart2 { /* console */
169         pinctrl-names = "default";
170         pinctrl-0 = <&pinctrl_uart2>;
171         status = "okay";
172 };
173
174 &uart3 {
175         pinctrl-names = "default";
176         pinctrl-0 = <&pinctrl_uart3>;
177         assigned-clocks = <&clk IMX8MN_CLK_UART3>;
178         assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
179         status = "okay";
180 };
181
182 &usbotg1 {
183         vbus-supply = <&reg_usb_otg_vbus>;
184         disable-over-current;
185         dr_mode="otg";
186         status = "okay";
187 };
188
189 &usdhc2 {
190         pinctrl-names = "default", "state_100mhz", "state_200mhz";
191         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
192         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
193         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
194         bus-width = <4>;
195         vmmc-supply = <&reg_usdhc2_vmmc>;
196         status = "okay";
197 };
198
199 &iomuxc {
200         pinctrl_espi2: espi2grp {
201                 fsl,pins = <
202                         MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK            0x82
203                         MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI            0x82
204                         MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO            0x82
205                         MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9               0x41
206                 >;
207         };
208
209         pinctrl_i2c2: i2c2grp {
210                 fsl,pins = <
211                         MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
212                         MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c3
213                 >;
214         };
215
216         pinctrl_i2c4: i2c4grp {
217                 fsl,pins = <
218                         MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
219                         MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA          0x400001c3
220                 >;
221         };
222
223         pinctrl_led3: led3grp {
224                 fsl,pins = <
225                         MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28       0x41
226                 >;
227         };
228
229         pinctrl_pcal6414: pcal6414-gpiogrp {
230                 fsl,pins = <
231                         MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27               0x19
232                 >;
233         };
234
235         pinctrl_reg_usb_otg: reg-otggrp {
236                 fsl,pins = <
237                         MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29     0x19
238                 >;
239         };
240
241         pinctrl_sai3: sai3grp {
242                 fsl,pins = <
243                         MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
244                         MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
245                         MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
246                         MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
247                         MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0     0xd6
248                 >;
249         };
250
251         pinctrl_uart2: uart2grp {
252                 fsl,pins = <
253                         MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
254                         MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
255                 >;
256         };
257
258         pinctrl_uart3: uart3grp {
259                 fsl,pins = <
260                         MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX   0x40
261                         MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX   0x40
262                 >;
263         };
264
265         pinctrl_usdhc2_gpio: usdhc2gpiogrp {
266                 fsl,pins = <
267                         MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B       0x41
268                         MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x41
269                 >;
270         };
271
272         pinctrl_usdhc2: usdhc2grp {
273                 fsl,pins = <
274                         MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
275                         MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
276                         MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
277                         MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
278                         MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
279                         MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
280                         MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
281                 >;
282         };
283
284         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
285                 fsl,pins = <
286                         MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
287                         MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
288                         MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
289                         MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
290                         MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
291                         MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
292                         MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
293                 >;
294         };
295
296         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
297                 fsl,pins = <
298                         MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
299                         MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
300                         MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
301                         MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
302                         MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
303                         MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
304                         MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
305                 >;
306         };
307 };