Merge tag 'fscache-next-20210829' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / freescale / fsl-lx2160a-rdb.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Device Tree file for LX2160ARDB
4 //
5 // Copyright 2018-2020 NXP
6
7 /dts-v1/;
8
9 #include "fsl-lx2160a.dtsi"
10
11 / {
12         model = "NXP Layerscape LX2160ARDB";
13         compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
14
15         aliases {
16                 crypto = &crypto;
17                 mmc0 = &esdhc0;
18                 mmc1 = &esdhc1;
19                 serial0 = &uart0;
20         };
21
22         chosen {
23                 stdout-path = "serial0:115200n8";
24         };
25
26         sb_3v3: regulator-sb3v3 {
27                 compatible = "regulator-fixed";
28                 regulator-name = "MC34717-3.3VSB";
29                 regulator-min-microvolt = <3300000>;
30                 regulator-max-microvolt = <3300000>;
31                 regulator-boot-on;
32                 regulator-always-on;
33         };
34 };
35
36 &crypto {
37         status = "okay";
38 };
39
40 &dpmac3 {
41         phy-handle = <&aquantia_phy1>;
42         phy-connection-type = "usxgmii";
43         managed = "in-band-status";
44 };
45
46 &dpmac4 {
47         phy-handle = <&aquantia_phy2>;
48         phy-connection-type = "usxgmii";
49         managed = "in-band-status";
50 };
51
52 &dpmac17 {
53         phy-handle = <&rgmii_phy1>;
54         phy-connection-type = "rgmii-id";
55 };
56
57 &dpmac18 {
58         phy-handle = <&rgmii_phy2>;
59         phy-connection-type = "rgmii-id";
60 };
61
62 &emdio1 {
63         status = "okay";
64
65         rgmii_phy1: ethernet-phy@1 {
66                 /* AR8035 PHY */
67                 compatible = "ethernet-phy-id004d.d072";
68                 interrupts-extended = <&extirq 4 IRQ_TYPE_LEVEL_LOW>;
69                 reg = <0x1>;
70                 eee-broken-1000t;
71         };
72
73         rgmii_phy2: ethernet-phy@2 {
74                 /* AR8035 PHY */
75                 compatible = "ethernet-phy-id004d.d072";
76                 interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
77                 reg = <0x2>;
78                 eee-broken-1000t;
79         };
80
81         aquantia_phy1: ethernet-phy@4 {
82                 /* AQR107 PHY */
83                 compatible = "ethernet-phy-ieee802.3-c45";
84                 interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
85                 reg = <0x4>;
86         };
87
88         aquantia_phy2: ethernet-phy@5 {
89                 /* AQR107 PHY */
90                 compatible = "ethernet-phy-ieee802.3-c45";
91                 interrupts-extended = <&extirq 3 IRQ_TYPE_LEVEL_LOW>;
92                 reg = <0x5>;
93         };
94 };
95
96 &can0 {
97         status = "okay";
98
99         can-transceiver {
100                 max-bitrate = <5000000>;
101         };
102 };
103
104 &can1 {
105         status = "okay";
106
107         can-transceiver {
108                 max-bitrate = <5000000>;
109         };
110 };
111
112 &esdhc0 {
113         sd-uhs-sdr104;
114         sd-uhs-sdr50;
115         sd-uhs-sdr25;
116         sd-uhs-sdr12;
117         status = "okay";
118 };
119
120 &esdhc1 {
121         mmc-hs200-1_8v;
122         mmc-hs400-1_8v;
123         bus-width = <8>;
124         status = "okay";
125 };
126
127 &fspi {
128         status = "okay";
129
130         mt35xu512aba0: flash@0 {
131                 #address-cells = <1>;
132                 #size-cells = <1>;
133                 compatible = "jedec,spi-nor";
134                 m25p,fast-read;
135                 spi-max-frequency = <50000000>;
136                 reg = <0>;
137                 spi-rx-bus-width = <8>;
138                 spi-tx-bus-width = <8>;
139         };
140
141         mt35xu512aba1: flash@1 {
142                 #address-cells = <1>;
143                 #size-cells = <1>;
144                 compatible = "jedec,spi-nor";
145                 m25p,fast-read;
146                 spi-max-frequency = <50000000>;
147                 reg = <1>;
148                 spi-rx-bus-width = <8>;
149                 spi-tx-bus-width = <8>;
150         };
151 };
152
153 &i2c0 {
154         status = "okay";
155
156         i2c-mux@77 {
157                 compatible = "nxp,pca9547";
158                 reg = <0x77>;
159                 #address-cells = <1>;
160                 #size-cells = <0>;
161
162                 i2c@2 {
163                         #address-cells = <1>;
164                         #size-cells = <0>;
165                         reg = <0x2>;
166
167                         power-monitor@40 {
168                                 compatible = "ti,ina220";
169                                 reg = <0x40>;
170                                 shunt-resistor = <500>;
171                         };
172                 };
173
174                 i2c@3 {
175                         #address-cells = <1>;
176                         #size-cells = <0>;
177                         reg = <0x3>;
178
179                         temperature-sensor@4c {
180                                 compatible = "nxp,sa56004";
181                                 reg = <0x4c>;
182                                 vcc-supply = <&sb_3v3>;
183                         };
184
185                         temperature-sensor@4d {
186                                 compatible = "nxp,sa56004";
187                                 reg = <0x4d>;
188                                 vcc-supply = <&sb_3v3>;
189                         };
190                 };
191         };
192 };
193
194 &i2c4 {
195         status = "okay";
196
197         rtc@51 {
198                 compatible = "nxp,pcf2129";
199                 reg = <0x51>;
200                 /* IRQ_RTC_B -> IRQ08, active low */
201                 interrupts-extended = <&extirq 8 IRQ_TYPE_LEVEL_LOW>;
202         };
203 };
204
205 &pcs_mdio3 {
206         status = "okay";
207 };
208
209 &pcs_mdio4 {
210         status = "okay";
211 };
212
213 &sata0 {
214         status = "okay";
215 };
216
217 &sata1 {
218         status = "okay";
219 };
220
221 &sata2 {
222         status = "okay";
223 };
224
225 &sata3 {
226         status = "okay";
227 };
228
229 &uart0 {
230         status = "okay";
231 };
232
233 &uart1 {
234         status = "okay";
235 };
236
237 &usb0 {
238         status = "okay";
239 };
240
241 &usb1 {
242         status = "okay";
243 };