Merge tag 'arc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / freescale / fsl-ls2088a-rdb.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device Tree file for Freescale LS2088A RDB Board.
4  *
5  * Copyright 2016 Freescale Semiconductor, Inc.
6  * Copyright 2017 NXP
7  *
8  * Abhimanyu Saini <abhimanyu.saini@nxp.com>
9  *
10  */
11
12 /dts-v1/;
13
14 #include "fsl-ls2088a.dtsi"
15 #include "fsl-ls208xa-rdb.dtsi"
16
17 / {
18         model = "Freescale Layerscape 2088A RDB Board";
19         compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
20
21         chosen {
22                 stdout-path = "serial1:115200n8";
23         };
24 };
25
26 &dpmac1 {
27         phy-handle = <&mdio1_phy1>;
28         phy-connection-type = "10gbase-r";
29 };
30
31 &dpmac2 {
32         phy-handle = <&mdio1_phy2>;
33         phy-connection-type = "10gbase-r";
34 };
35
36 &dpmac3 {
37         phy-handle = <&mdio1_phy3>;
38         phy-connection-type = "10gbase-r";
39 };
40
41 &dpmac4 {
42         phy-handle = <&mdio1_phy4>;
43         phy-connection-type = "10gbase-r";
44 };
45
46 &dpmac5 {
47         phy-handle = <&mdio2_phy1>;
48         phy-connection-type = "10gbase-r";
49 };
50
51 &dpmac6 {
52         phy-handle = <&mdio2_phy2>;
53         phy-connection-type = "10gbase-r";
54 };
55
56 &dpmac7 {
57         phy-handle = <&mdio2_phy3>;
58         phy-connection-type = "10gbase-r";
59 };
60
61 &dpmac8 {
62         phy-handle = <&mdio2_phy4>;
63         phy-connection-type = "10gbase-r";
64 };
65
66 &emdio1 {
67         status = "okay";
68
69         mdio1_phy1: ethernet-phy@10 {
70                 compatible = "ethernet-phy-id13e5.1002";
71                 reg = <0x10>;
72         };
73
74         mdio1_phy2: ethernet-phy@11 {
75                 compatible = "ethernet-phy-id13e5.1002";
76                 reg = <0x11>;
77         };
78
79         mdio1_phy3: ethernet-phy@12 {
80                 compatible = "ethernet-phy-id13e5.1002";
81                 reg = <0x12>;
82         };
83
84         mdio1_phy4: ethernet-phy@13 {
85                 compatible = "ethernet-phy-id13e5.1002";
86                 reg = <0x13>;
87         };
88 };
89
90 &emdio2 {
91         status = "okay";
92
93         mdio2_phy1: ethernet-phy@0 {
94                 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
95                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
96                 reg = <0x0>;
97         };
98
99         mdio2_phy2: ethernet-phy@1 {
100                 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
101                 interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
102                 reg = <0x1>;
103         };
104
105         mdio2_phy3: ethernet-phy@2 {
106                 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
107                 interrupts-extended = <&extirq 4 IRQ_TYPE_LEVEL_LOW>;
108                 reg = <0x2>;
109         };
110
111         mdio2_phy4: ethernet-phy@3 {
112                 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
113                 interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
114                 reg = <0x3>;
115         };
116 };
117
118 &pcs_mdio1 {
119         status = "okay";
120 };
121
122 &pcs_mdio2 {
123         status = "okay";
124 };
125
126 &pcs_mdio3 {
127         status = "okay";
128 };
129
130 &pcs_mdio4 {
131         status = "okay";
132 };
133
134 &pcs_mdio5 {
135         status = "okay";
136 };
137
138 &pcs_mdio6 {
139         status = "okay";
140 };
141
142 &pcs_mdio7 {
143         status = "okay";
144 };
145
146 &pcs_mdio8 {
147         status = "okay";
148 };