arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for NXP LS1088A RDB Board.
   4  *
   5  * Copyright 2017-2020 NXP
   6  *
   7  * Harninder Rai <harninder.rai@nxp.com>
   8  *
   9  */
  10
  11 /dts-v1/;
  12
  13 #include "fsl-ls1088a.dtsi"
  14
  15 / {
  16         model = "LS1088A RDB Board";
  17         compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
  18 };
  19
  20 &dpmac2 {
  21         phy-handle = <&mdio2_aquantia_phy>;
  22         phy-connection-type = "10gbase-r";
  23         pcs-handle = <&pcs2>;
  24 };
  25
  26 &dpmac3 {
  27         phy-handle = <&mdio1_phy5>;
  28         phy-connection-type = "qsgmii";
  29         managed = "in-band-status";
  30         pcs-handle = <&pcs3_0>;
  31 };
  32
  33 &dpmac4 {
  34         phy-handle = <&mdio1_phy6>;
  35         phy-connection-type = "qsgmii";
  36         managed = "in-band-status";
  37         pcs-handle = <&pcs3_1>;
  38 };
  39
  40 &dpmac5 {
  41         phy-handle = <&mdio1_phy7>;
  42         phy-connection-type = "qsgmii";
  43         managed = "in-band-status";
  44         pcs-handle = <&pcs3_2>;
  45 };
  46
  47 &dpmac6 {
  48         phy-handle = <&mdio1_phy8>;
  49         phy-connection-type = "qsgmii";
  50         managed = "in-band-status";
  51         pcs-handle = <&pcs3_3>;
  52 };
  53
  54 &dpmac7 {
  55         phy-handle = <&mdio1_phy1>;
  56         phy-connection-type = "qsgmii";
  57         managed = "in-band-status";
  58         pcs-handle = <&pcs7_0>;
  59 };
  60
  61 &dpmac8 {
  62         phy-handle = <&mdio1_phy2>;
  63         phy-connection-type = "qsgmii";
  64         managed = "in-band-status";
  65         pcs-handle = <&pcs7_1>;
  66 };
  67
  68 &dpmac9 {
  69         phy-handle = <&mdio1_phy3>;
  70         phy-connection-type = "qsgmii";
  71         managed = "in-band-status";
  72         pcs-handle = <&pcs7_2>;
  73 };
  74
  75 &dpmac10 {
  76         phy-handle = <&mdio1_phy4>;
  77         phy-connection-type = "qsgmii";
  78         managed = "in-band-status";
  79         pcs-handle = <&pcs7_3>;
  80 };
  81
  82 &emdio1 {
  83         status = "okay";
  84
  85         mdio1_phy5: ethernet-phy@c {
  86                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
  87                 reg = <0xc>;
  88         };
  89
  90         mdio1_phy6: ethernet-phy@d {
  91                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
  92                 reg = <0xd>;
  93         };
  94
  95         mdio1_phy7: ethernet-phy@e {
  96                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
  97                 reg = <0xe>;
  98         };
  99
 100         mdio1_phy8: ethernet-phy@f {
 101                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
 102                 reg = <0xf>;
 103         };
 104
 105         mdio1_phy1: ethernet-phy@1c {
 106                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
 107                 reg = <0x1c>;
 108         };
 109
 110         mdio1_phy2: ethernet-phy@1d {
 111                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
 112                 reg = <0x1d>;
 113         };
 114
 115         mdio1_phy3: ethernet-phy@1e {
 116                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
 117                 reg = <0x1e>;
 118         };
 119
 120         mdio1_phy4: ethernet-phy@1f {
 121                 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
 122                 reg = <0x1f>;
 123         };
 124 };
 125
 126 &emdio2 {
 127         status = "okay";
 128
 129         mdio2_aquantia_phy: ethernet-phy@0 {
 130                 compatible = "ethernet-phy-ieee802.3-c45";
 131                 interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
 132                 reg = <0x0>;
 133         };
 134 };
 135
 136 &i2c0 {
 137         status = "okay";
 138
 139         i2c-switch@77 {
 140                 compatible = "nxp,pca9547";
 141                 reg = <0x77>;
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144
 145                 i2c@2 {
 146                         #address-cells = <1>;
 147                         #size-cells = <0>;
 148                         reg = <0x2>;
 149
 150                         ina220@40 {
 151                                 compatible = "ti,ina220";
 152                                 reg = <0x40>;
 153                                 shunt-resistor = <1000>;
 154                         };
 155                 };
 156
 157                 i2c@3 {
 158                         #address-cells = <1>;
 159                         #size-cells = <0>;
 160                         reg = <0x3>;
 161
 162                         temp-sensor@4c {
 163                                 compatible = "adi,adt7461a";
 164                                 reg = <0x4c>;
 165                         };
 166
 167                         rtc@51 {
 168                                 compatible = "nxp,pcf2129";
 169                                 reg = <0x51>;
 170                                 /* IRQ_RTC_B -> IRQ0_B(CPLD) -> IRQ00(CPU), active low */
 171                                 interrupts-extended = <&extirq 0 IRQ_TYPE_LEVEL_LOW>;
 172                         };
 173                 };
 174         };
 175 };
 176
 177 &ifc {
 178         ranges = <0 0 0x5 0x30000000 0x00010000
 179                   2 0 0x5 0x20000000 0x00010000>;
 180         status = "okay";
 181
 182         nand@0,0 {
 183                 compatible = "fsl,ifc-nand";
 184                 reg = <0x0 0x0 0x10000>;
 185         };
 186
 187         fpga: board-control@2,0 {
 188                 compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
 189                 reg = <0x2 0x0 0x0000100>;
 190         };
 191 };
 192
 193 &duart0 {
 194         status = "okay";
 195 };
 196
 197 &duart1 {
 198         status = "okay";
 199 };
 200
 201 &esdhc {
 202         mmc-hs200-1_8v;
 203         status = "okay";
 204 };
 205
 206 &pcs_mdio2 {
 207         status = "okay";
 208 };
 209
 210 &pcs_mdio3 {
 211         status = "okay";
 212 };
 213
 214 &pcs_mdio7 {
 215         status = "okay";
 216 };
 217
 218 &qspi {
 219         status = "okay";
 220
 221         s25fs512s0: flash@0 {
 222                 compatible = "jedec,spi-nor";
 223                 #address-cells = <1>;
 224                 #size-cells = <1>;
 225                 spi-max-frequency = <50000000>;
 226                 spi-rx-bus-width = <4>;
 227                 spi-tx-bus-width = <1>;
 228                 reg = <0>;
 229         };
 230
 231         s25fs512s1: flash@1 {
 232                 compatible = "jedec,spi-nor";
 233                 #address-cells = <1>;
 234                 #size-cells = <1>;
 235                 spi-max-frequency = <50000000>;
 236                 spi-rx-bus-width = <4>;
 237                 spi-tx-bus-width = <1>;
 238                 reg = <1>;
 239         };
 240 };
 241
 242 &sata {
 243         status = "okay";
 244 };
 245
 246 &usb0 {
 247         status = "okay";
 248 };
 249
 250 &usb1 {
 251         dr_mode = "otg";
 252         status = "okay";
 253 };