1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5433 TM2 board device tree source
5 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
7 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC.
12 #include "exynos5433.dtsi"
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
24 pinctrl0 = &pinctrl_alive;
25 pinctrl1 = &pinctrl_aud;
26 pinctrl2 = &pinctrl_cpif;
27 pinctrl3 = &pinctrl_ese;
28 pinctrl4 = &pinctrl_finger;
29 pinctrl5 = &pinctrl_fsys;
30 pinctrl6 = &pinctrl_imem;
31 pinctrl7 = &pinctrl_nfc;
32 pinctrl8 = &pinctrl_peric;
33 pinctrl9 = &pinctrl_touch;
48 stdout-path = &serial_1;
52 device_type = "memory";
53 reg = <0x0 0x20000000 0x0 0xc0000000>;
57 compatible = "gpio-keys";
60 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
61 linux,code = <KEY_POWER>;
63 debounce-interval = <10>;
67 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_VOLUMEUP>;
69 label = "volume-up key";
70 debounce-interval = <10>;
74 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_VOLUMEDOWN>;
76 label = "volume-down key";
77 debounce-interval = <10>;
81 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_MENU>;
83 label = "homepage key";
84 debounce-interval = <10>;
88 i2c_max98504: i2c-gpio-0 {
89 compatible = "i2c-gpio";
90 sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
91 scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;
92 i2c-gpio,delay-us = <2>;
96 max98504: amplifier@31 {
97 compatible = "maxim,max98504";
101 maxim,tx-channel-mask = <3>;
102 maxim,tx-channel-source = <2>;
106 irda_regulator: irda-regulator {
107 compatible = "regulator-fixed";
109 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
110 regulator-name = "irda_regulator";
114 compatible = "samsung,tm2-audio";
115 audio-codec = <&wm5110>, <&hdmi>;
116 i2s-controller = <&i2s0 0>, <&i2s1 0>;
117 audio-amplifier = <&max98504>;
118 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
120 samsung,audio-routing =
138 vdd-supply = <&ldo3_reg>;
142 compatible = "murata,ncp03wf104";
143 pullup-uv = <1800000>;
144 pullup-ohm = <100000>;
146 io-channels = <&adc 0>;
150 compatible = "murata,ncp03wf104";
151 pullup-uv = <1800000>;
152 pullup-ohm = <100000>;
154 io-channels = <&adc 1>;
155 #thermal-sensor-cells = <0>;
159 compatible = "murata,ncp03wf104";
160 pullup-uv = <1800000>;
161 pullup-ohm = <100000>;
163 io-channels = <&adc 2>;
168 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
169 vdd-supply = <&buck4_reg>;
170 exynos,saturation-ratio = <10>;
175 devfreq = <&bus_g2d_400>;
180 devfreq = <&bus_g2d_400>;
185 devfreq = <&bus_g2d_400>;
190 devfreq = <&bus_g2d_400>;
195 devfreq = <&bus_g2d_400>;
200 devfreq = <&bus_g2d_400>;
205 devfreq = <&bus_g2d_400>;
210 devfreq = <&bus_g2d_400>;
215 devfreq = <&bus_g2d_400>;
220 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
221 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
222 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
223 <&cmu_top CLK_MOUT_AUD_PLL>,
224 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
225 <&cmu_top CLK_MOUT_SCLK_AUDIO0>,
226 <&cmu_top CLK_MOUT_SCLK_AUDIO1>,
227 <&cmu_top CLK_MOUT_SCLK_SPDIF>,
229 <&cmu_aud CLK_DIV_AUD_CA5>,
230 <&cmu_aud CLK_DIV_ACLK_AUD>,
231 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
232 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
233 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
234 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
235 <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
236 <&cmu_top CLK_DIV_SCLK_AUDIO0>,
237 <&cmu_top CLK_DIV_SCLK_AUDIO1>,
238 <&cmu_top CLK_DIV_SCLK_PCM1>,
239 <&cmu_top CLK_DIV_SCLK_I2S1>;
241 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
242 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
243 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
244 <&cmu_top CLK_FOUT_AUD_PLL>,
245 <&cmu_top CLK_MOUT_AUD_PLL>,
246 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
247 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
248 <&cmu_top CLK_SCLK_AUDIO0>;
250 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
251 <196608001>, <65536001>, <32768001>, <49152001>,
252 <2048001>, <24576001>, <196608001>,
253 <24576001>, <98304001>, <2048001>, <49152001>;
257 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
258 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
259 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
260 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
261 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
262 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
263 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
264 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
265 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
266 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
267 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
268 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
269 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
270 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
271 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
272 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
273 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
274 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
275 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
276 <66700000>, <66700000>;
280 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
281 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
282 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
283 <&cmu_top CLK_ACLK_GSCL_333>;
287 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
288 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
292 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
293 assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
294 assigned-clock-rates = <0>, <333000000>;
298 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
299 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
300 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
301 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
302 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
303 <&cmu_top CLK_SCLK_JPEG_MSCL>,
304 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
305 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
309 assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
310 assigned-clock-rates = <196608001>;
314 cpu-supply = <&buck3_reg>;
318 cpu-supply = <&buck2_reg>;
329 #address-cells = <1>;
334 tv_to_hdmi: endpoint {
335 remote-endpoint = <&hdmi_to_tv>;
343 vddcore-supply = <&ldo6_reg>;
344 vddio-supply = <&ldo7_reg>;
345 samsung,burst-clock-frequency = <512000000>;
346 samsung,esc-clock-frequency = <16000000>;
347 samsung,pll-clock-frequency = <24000000>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&te_irq>;
353 mali-supply = <&buck6_reg>;
358 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
360 vdd-supply = <&ldo6_reg>;
361 vdd_osc-supply = <&ldo7_reg>;
362 vdd_pll-supply = <&ldo6_reg>;
365 #address-cells = <1>;
370 hdmi_to_tv: endpoint {
371 remote-endpoint = <&tv_to_hdmi>;
377 hdmi_to_mhl: endpoint {
378 remote-endpoint = <&mhl_to_hdmi>;
386 clock-frequency = <2500000>;
389 compatible = "samsung,s2mps13-pmic";
390 interrupt-parent = <&gpa0>;
391 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
393 samsung,s2mps11-wrstbi-ground;
396 s2mps13_osc: clocks {
397 compatible = "samsung,s2mps13-clk";
399 clock-output-names = "s2mps13_ap", "s2mps13_cp",
405 regulator-name = "VDD_ALIVE_0.9V_AP";
406 regulator-min-microvolt = <900000>;
407 regulator-max-microvolt = <900000>;
412 regulator-name = "VDDQ_MMC2_2.8V_AP";
413 regulator-min-microvolt = <2800000>;
414 regulator-max-microvolt = <2800000>;
416 regulator-state-mem {
417 regulator-off-in-suspend;
422 regulator-name = "VDD1_E_1.8V_AP";
423 regulator-min-microvolt = <1800000>;
424 regulator-max-microvolt = <1800000>;
429 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
430 regulator-min-microvolt = <1300000>;
431 regulator-max-microvolt = <1300000>;
433 regulator-state-mem {
434 regulator-off-in-suspend;
439 regulator-name = "VDD10_DPLL_1.0V_AP";
440 regulator-min-microvolt = <1000000>;
441 regulator-max-microvolt = <1000000>;
443 regulator-state-mem {
444 regulator-off-in-suspend;
449 regulator-name = "VDD10_MIPI2L_1.0V_AP";
450 regulator-min-microvolt = <1000000>;
451 regulator-max-microvolt = <1000000>;
452 regulator-state-mem {
453 regulator-off-in-suspend;
458 regulator-name = "VDD18_MIPI2L_1.8V_AP";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
462 regulator-state-mem {
463 regulator-off-in-suspend;
468 regulator-name = "VDD18_LLI_1.8V_AP";
469 regulator-min-microvolt = <1800000>;
470 regulator-max-microvolt = <1800000>;
472 regulator-state-mem {
473 regulator-off-in-suspend;
478 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
479 regulator-min-microvolt = <1800000>;
480 regulator-max-microvolt = <1800000>;
482 regulator-state-mem {
483 regulator-off-in-suspend;
488 regulator-name = "VDD33_USB30_3.0V_AP";
489 regulator-min-microvolt = <3000000>;
490 regulator-max-microvolt = <3000000>;
491 regulator-state-mem {
492 regulator-off-in-suspend;
497 regulator-name = "VDD_INT_M_1.0V_AP";
498 regulator-min-microvolt = <1000000>;
499 regulator-max-microvolt = <1000000>;
501 regulator-state-mem {
502 regulator-off-in-suspend;
507 regulator-name = "VDD_KFC_M_1.1V_AP";
508 regulator-min-microvolt = <800000>;
509 regulator-max-microvolt = <1350000>;
514 regulator-name = "VDD_G3D_M_0.95V_AP";
515 regulator-min-microvolt = <950000>;
516 regulator-max-microvolt = <950000>;
518 regulator-state-mem {
519 regulator-off-in-suspend;
524 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
525 regulator-min-microvolt = <1200000>;
526 regulator-max-microvolt = <1200000>;
528 regulator-state-mem {
529 regulator-off-in-suspend;
534 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
535 regulator-min-microvolt = <1200000>;
536 regulator-max-microvolt = <1200000>;
538 regulator-state-mem {
539 regulator-off-in-suspend;
544 regulator-name = "VDDQ_EFUSE";
545 regulator-min-microvolt = <1400000>;
546 regulator-max-microvolt = <3400000>;
551 regulator-name = "V_TFLASH_2.8V_AP";
552 regulator-min-microvolt = <2800000>;
553 regulator-max-microvolt = <2800000>;
557 regulator-name = "V_CODEC_1.8V_AP";
558 regulator-min-microvolt = <1800000>;
559 regulator-max-microvolt = <1800000>;
563 regulator-name = "VDDA_1.8V_COMP";
564 regulator-min-microvolt = <1800000>;
565 regulator-max-microvolt = <1800000>;
570 regulator-name = "VCC_2.8V_AP";
571 regulator-min-microvolt = <2800000>;
572 regulator-max-microvolt = <2800000>;
577 regulator-name = "VT_CAM_1.8V";
578 regulator-min-microvolt = <1800000>;
579 regulator-max-microvolt = <1800000>;
583 regulator-name = "CAM_IO_1.8V_AP";
584 regulator-min-microvolt = <1800000>;
585 regulator-max-microvolt = <1800000>;
589 regulator-name = "CAM_SEN_CORE_1.05V_AP";
590 regulator-min-microvolt = <1050000>;
591 regulator-max-microvolt = <1050000>;
595 regulator-name = "VT_CAM_1.2V";
596 regulator-min-microvolt = <1200000>;
597 regulator-max-microvolt = <1200000>;
601 regulator-name = "UNUSED_LDO25";
602 regulator-min-microvolt = <2800000>;
603 regulator-max-microvolt = <2800000>;
607 regulator-name = "CAM_AF_2.8V_AP";
608 regulator-min-microvolt = <2800000>;
609 regulator-max-microvolt = <2800000>;
613 regulator-name = "VCC_3.0V_LCD_AP";
614 regulator-min-microvolt = <3000000>;
615 regulator-max-microvolt = <3000000>;
619 regulator-name = "VCC_1.8V_LCD_AP";
620 regulator-min-microvolt = <1800000>;
621 regulator-max-microvolt = <1800000>;
625 regulator-name = "VT_CAM_2.8V";
626 regulator-min-microvolt = <3000000>;
627 regulator-max-microvolt = <3000000>;
631 regulator-name = "TSP_AVDD_3.3V_AP";
632 regulator-min-microvolt = <3300000>;
633 regulator-max-microvolt = <3300000>;
638 * LDO31 differs from target to target,
639 * its definition is in the .dts
644 regulator-name = "VTOUCH_1.8V_AP";
645 regulator-min-microvolt = <1800000>;
646 regulator-max-microvolt = <1800000>;
650 regulator-name = "VTOUCH_LED_3.3V";
651 regulator-min-microvolt = <2500000>;
652 regulator-max-microvolt = <3300000>;
653 regulator-ramp-delay = <12500>;
657 regulator-name = "VCC_1.8V_MHL_AP";
658 regulator-min-microvolt = <1000000>;
659 regulator-max-microvolt = <2100000>;
663 regulator-name = "OIS_VM_2.8V";
664 regulator-min-microvolt = <1800000>;
665 regulator-max-microvolt = <2800000>;
669 regulator-name = "VSIL_1.0V";
670 regulator-min-microvolt = <1000000>;
671 regulator-max-microvolt = <1000000>;
675 regulator-name = "VF_1.8V";
676 regulator-min-microvolt = <1800000>;
677 regulator-max-microvolt = <1800000>;
682 * LDO38 differs from target to target,
683 * its definition is in the .dts
688 regulator-name = "V_HRM_1.8V";
689 regulator-min-microvolt = <1800000>;
690 regulator-max-microvolt = <1800000>;
694 regulator-name = "V_HRM_3.3V";
695 regulator-min-microvolt = <3300000>;
696 regulator-max-microvolt = <3300000>;
700 regulator-name = "VDD_MIF_0.9V_AP";
701 regulator-min-microvolt = <600000>;
702 regulator-max-microvolt = <1500000>;
704 regulator-state-mem {
705 regulator-off-in-suspend;
710 regulator-name = "VDD_EGL_1.0V_AP";
711 regulator-min-microvolt = <900000>;
712 regulator-max-microvolt = <1300000>;
714 regulator-state-mem {
715 regulator-off-in-suspend;
720 regulator-name = "VDD_KFC_1.0V_AP";
721 regulator-min-microvolt = <800000>;
722 regulator-max-microvolt = <1200000>;
724 regulator-state-mem {
725 regulator-off-in-suspend;
730 regulator-name = "VDD_INT_0.95V_AP";
731 regulator-min-microvolt = <600000>;
732 regulator-max-microvolt = <1500000>;
734 regulator-state-mem {
735 regulator-off-in-suspend;
740 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
741 regulator-min-microvolt = <600000>;
742 regulator-max-microvolt = <1500000>;
744 regulator-state-mem {
745 regulator-off-in-suspend;
750 regulator-name = "VDD_G3D_0.9V_AP";
751 regulator-min-microvolt = <600000>;
752 regulator-max-microvolt = <1500000>;
754 regulator-state-mem {
755 regulator-off-in-suspend;
760 regulator-name = "VDD_MEM1_1.2V_AP";
761 regulator-min-microvolt = <1200000>;
762 regulator-max-microvolt = <1200000>;
767 regulator-name = "VDD_LLDO_1.35V_AP";
768 regulator-min-microvolt = <1350000>;
769 regulator-max-microvolt = <3300000>;
774 regulator-name = "VDD_MLDO_2.0V_AP";
775 regulator-min-microvolt = <1350000>;
776 regulator-max-microvolt = <3300000>;
781 regulator-name = "vdd_mem2";
782 regulator-min-microvolt = <550000>;
783 regulator-max-microvolt = <1500000>;
794 compatible = "samsung,s3fwrn5-i2c";
796 interrupt-parent = <&gpa1>;
797 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
798 en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
799 wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
806 stmfts: touchscreen@49 {
807 compatible = "st,stmfts";
809 interrupt-parent = <&gpa1>;
810 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
811 avdd-supply = <&ldo30_reg>;
812 vdd-supply = <&ldo31_reg>;
818 clock-frequency = <1000000>;
822 compatible = "sil,sii8620";
823 cvcc10-supply = <&ldo36_reg>;
824 iovcc18-supply = <&ldo34_reg>;
825 interrupt-parent = <&gpf0>;
826 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
827 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
828 clocks = <&pmu_system_controller 0>;
829 clock-names = "xtal";
832 #address-cells = <1>;
837 mhl_to_hdmi: endpoint {
838 remote-endpoint = <&hdmi_to_mhl>;
844 mhl_to_musb_con: endpoint {
845 remote-endpoint = <&musb_con_to_mhl>;
856 compatible = "maxim,max77843";
857 interrupt-parent = <&gpa1>;
858 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
861 muic: max77843-muic {
862 compatible = "maxim,max77843-muic";
864 musb_con: musb-connector {
865 compatible = "samsung,usb-connector-11pin",
871 #address-cells = <1>;
876 musb_con_to_mhl: endpoint {
877 remote-endpoint = <&mhl_to_musb_con>;
885 muic_to_usb: endpoint {
886 remote-endpoint = <&usb_to_muic>;
893 compatible = "maxim,max77843-regulator";
894 safeout1_reg: SAFEOUT1 {
895 regulator-name = "SAFEOUT1";
896 regulator-min-microvolt = <3300000>;
897 regulator-max-microvolt = <4950000>;
900 safeout2_reg: SAFEOUT2 {
901 regulator-name = "SAFEOUT2";
902 regulator-min-microvolt = <3300000>;
903 regulator-max-microvolt = <4950000>;
906 charger_reg: CHARGER {
907 regulator-name = "CHARGER";
908 regulator-min-microamp = <100000>;
909 regulator-max-microamp = <3150000>;
913 haptic: max77843-haptic {
914 compatible = "maxim,max77843-haptic";
915 haptic-supply = <&ldo38_reg>;
916 pwms = <&pwm 0 33670 0>;
917 pwm-names = "haptic";
931 assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
932 assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
942 card-detect-delay = <200>;
943 samsung,dw-mshc-ciu-div = <3>;
944 samsung,dw-mshc-sdr-timing = <0 4>;
945 samsung,dw-mshc-ddr-timing = <0 2>;
946 samsung,dw-mshc-hs400-timing = <0 3>;
947 samsung,read-strobe-delay = <90>;
949 pinctrl-names = "default";
950 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
951 &sd0_bus8 &sd0_rdqs>;
953 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
954 assigned-clock-rates = <800000000>;
961 cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
962 card-detect-delay = <200>;
963 samsung,dw-mshc-ciu-div = <3>;
964 samsung,dw-mshc-sdr-timing = <0 4>;
965 samsung,dw-mshc-ddr-timing = <0 2>;
967 pinctrl-names = "default";
968 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
974 pinctrl-names = "default";
975 pinctrl-0 = <&pcie_bus &pcie_wlanen>;
976 vdd10-supply = <&ldo6_reg>;
977 vdd18-supply = <&ldo7_reg>;
978 assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
979 <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
980 assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
981 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
982 assigned-clock-rates = <0>, <100000000>;
983 interrupt-map-mask = <0 0 0 0>;
984 interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
994 ppmu_event0_d0_general: ppmu-event0-d0-general {
995 event-name = "ppmu-event0-d0-general";
1003 ppmu_event0_d1_general: ppmu-event0-d1-general {
1004 event-name = "ppmu-event0-d1-general";
1010 pinctrl-names = "default";
1011 pinctrl-0 = <&initial_alive>;
1013 initial_alive: initial-state {
1014 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
1015 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
1016 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
1017 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
1018 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
1019 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
1020 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
1021 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
1023 PIN(INPUT, gpa1-0, UP, FAST_SR1);
1024 PIN(INPUT, gpa1-1, UP, FAST_SR1);
1025 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
1026 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
1027 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
1028 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
1029 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
1030 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
1032 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
1033 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
1034 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
1035 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
1036 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
1037 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
1038 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
1039 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
1041 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
1042 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
1043 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
1044 PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
1045 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
1046 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
1047 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
1048 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
1050 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
1051 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
1052 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
1053 PIN(INPUT, gpf1-4, UP, FAST_SR1);
1054 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
1055 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
1056 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
1058 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
1059 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
1060 PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
1061 PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
1063 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
1064 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
1065 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
1066 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
1068 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
1069 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
1070 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
1071 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
1072 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
1073 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
1074 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
1075 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
1077 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
1078 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
1079 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
1080 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
1081 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
1082 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
1083 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
1084 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
1088 samsung,pins = "gpf1-3";
1089 samsung,pin-function = <0xf>;
1094 pinctrl-names = "default";
1095 pinctrl-0 = <&initial_cpif>;
1097 initial_cpif: initial-state {
1098 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
1099 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
1104 pinctrl-names = "default";
1105 pinctrl-0 = <&initial_ese>;
1107 pcie_wlanen: pcie-wlanen {
1108 PIN(INPUT, gpj2-0, UP, FAST_SR4);
1111 initial_ese: initial-state {
1112 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
1113 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
1118 pinctrl-names = "default";
1119 pinctrl-0 = <&initial_fsys>;
1121 initial_fsys: initial-state {
1122 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1123 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1124 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1125 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1126 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1131 pinctrl-names = "default";
1132 pinctrl-0 = <&initial_imem>;
1134 initial_imem: initial-state {
1135 PIN(INPUT, gpf0-0, UP, FAST_SR1);
1136 PIN(INPUT, gpf0-1, UP, FAST_SR1);
1137 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1138 PIN(INPUT, gpf0-3, UP, FAST_SR1);
1139 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1140 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1141 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1142 PIN(INPUT, gpf0-7, UP, FAST_SR1);
1147 pinctrl-names = "default";
1148 pinctrl-0 = <&initial_nfc>;
1150 initial_nfc: initial-state {
1151 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1156 pinctrl-names = "default";
1157 pinctrl-0 = <&initial_peric>;
1159 initial_peric: initial-state {
1160 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1161 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1162 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1163 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1164 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1165 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1167 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1169 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1170 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1171 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1173 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1175 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1176 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1177 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1178 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1180 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1181 PIN(2, gpg0-1, DOWN, FAST_SR1);
1183 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1185 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1186 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1187 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1188 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1189 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1191 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1193 PIN(INPUT, gpd8-1, UP, FAST_SR1);
1195 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1196 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1197 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1198 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1199 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1201 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1202 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1204 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1205 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1206 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1211 pinctrl-names = "default";
1212 pinctrl-0 = <&initial_touch>;
1214 initial_touch: initial-state {
1215 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1220 pinctrl-0 = <&pwm0_out>;
1221 pinctrl-names = "default";
1229 &pmu_system_controller {
1230 assigned-clocks = <&pmu_system_controller 0>;
1231 assigned-clock-parents = <&xxti>;
1242 compatible = "brcm,bcm43438-bt";
1243 max-speed = <3000000>;
1244 shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
1245 device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
1246 host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
1247 clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
1248 clock-names = "extclk";
1253 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1256 wm5110: audio-codec@0 {
1257 compatible = "wlf,wm5110";
1259 spi-max-frequency = <20000000>;
1260 interrupt-parent = <&gpa0>;
1261 interrupts = <4 IRQ_TYPE_NONE>;
1262 clocks = <&pmu_system_controller 0>,
1263 <&s2mps13_osc S2MPS11_CLK_BT>;
1264 clock-names = "mclk1", "mclk2";
1269 wlf,micd-detect-debounce = <300>;
1270 wlf,micd-bias-start-time = <0x1>;
1271 wlf,micd-rate = <0x7>;
1272 wlf,micd-dbtime = <0x1>;
1273 wlf,micd-force-micbias;
1274 wlf,micd-configs = <0x0 1 0>;
1275 wlf,hpdet-channel = <1>;
1277 wlf,inmode = <2 0 2 0>;
1279 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1280 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1283 AVDD-supply = <&ldo18_reg>;
1284 DBVDD1-supply = <&ldo18_reg>;
1285 CPVDD-supply = <&ldo18_reg>;
1286 DBVDD2-supply = <&ldo18_reg>;
1287 DBVDD3-supply = <&ldo18_reg>;
1290 samsung,spi-feedback-delay = <0>;
1300 compatible = "ir-spi-led";
1302 spi-max-frequency = <5000000>;
1303 power-supply = <&irda_regulator>;
1308 samsung,spi-feedback-delay = <0>;
1314 clock-frequency = <24000000>;
1318 vtmu-supply = <&ldo3_reg>;
1323 vtmu-supply = <&ldo3_reg>;
1328 vtmu-supply = <&ldo3_reg>;
1333 vdd33-supply = <&ldo10_reg>;
1334 vdd10-supply = <&ldo6_reg>;
1343 vbus-supply = <&safeout1_reg>;
1347 usb_to_muic: endpoint {
1348 remote-endpoint = <&muic_to_usb>;
1354 clock-frequency = <24000000>;