1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5433 TM2 board device tree source
5 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
7 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC.
12 #include "exynos5433.dtsi"
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
24 pinctrl0 = &pinctrl_alive;
25 pinctrl1 = &pinctrl_aud;
26 pinctrl2 = &pinctrl_cpif;
27 pinctrl3 = &pinctrl_ese;
28 pinctrl4 = &pinctrl_finger;
29 pinctrl5 = &pinctrl_fsys;
30 pinctrl6 = &pinctrl_imem;
31 pinctrl7 = &pinctrl_nfc;
32 pinctrl8 = &pinctrl_peric;
33 pinctrl9 = &pinctrl_touch;
48 stdout-path = &serial_1;
52 device_type = "memory";
53 reg = <0x0 0x20000000 0x0 0xc0000000>;
57 compatible = "gpio-keys";
60 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
61 linux,code = <KEY_POWER>;
63 debounce-interval = <10>;
67 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_VOLUMEUP>;
69 label = "volume-up key";
70 debounce-interval = <10>;
74 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_VOLUMEDOWN>;
76 label = "volume-down key";
77 debounce-interval = <10>;
81 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_MENU>;
83 label = "homepage key";
84 debounce-interval = <10>;
88 i2c_max98504: i2c-gpio-0 {
89 compatible = "i2c-gpio";
90 sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
91 scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;
92 i2c-gpio,delay-us = <2>;
96 max98504: amplifier@31 {
97 compatible = "maxim,max98504";
101 maxim,tx-channel-mask = <3>;
102 maxim,tx-channel-source = <2>;
106 irda_regulator: irda-regulator {
107 compatible = "regulator-fixed";
109 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
110 regulator-name = "irda_regulator";
114 compatible = "samsung,tm2-audio";
115 audio-codec = <&wm5110>, <&hdmi>;
116 i2s-controller = <&i2s0 0>, <&i2s1 0>;
117 audio-amplifier = <&max98504>;
118 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
120 samsung,audio-routing =
138 vdd-supply = <&ldo3_reg>;
142 compatible = "murata,ncp03wf104";
143 pullup-uv = <1800000>;
144 pullup-ohm = <100000>;
146 io-channels = <&adc 0>;
150 compatible = "murata,ncp03wf104";
151 pullup-uv = <1800000>;
152 pullup-ohm = <100000>;
154 io-channels = <&adc 1>;
155 #thermal-sensor-cells = <0>;
159 compatible = "murata,ncp03wf104";
160 pullup-uv = <1800000>;
161 pullup-ohm = <100000>;
163 io-channels = <&adc 2>;
168 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
169 vdd-supply = <&buck4_reg>;
170 exynos,saturation-ratio = <10>;
175 devfreq = <&bus_g2d_400>;
180 devfreq = <&bus_g2d_400>;
185 devfreq = <&bus_g2d_400>;
190 devfreq = <&bus_g2d_400>;
195 devfreq = <&bus_g2d_400>;
200 devfreq = <&bus_g2d_400>;
205 devfreq = <&bus_g2d_400>;
210 devfreq = <&bus_g2d_400>;
215 devfreq = <&bus_g2d_400>;
220 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
221 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
222 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
223 <&cmu_top CLK_MOUT_AUD_PLL>,
224 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
225 <&cmu_top CLK_MOUT_SCLK_AUDIO0>,
226 <&cmu_top CLK_MOUT_SCLK_AUDIO1>,
227 <&cmu_top CLK_MOUT_SCLK_SPDIF>,
229 <&cmu_aud CLK_DIV_AUD_CA5>,
230 <&cmu_aud CLK_DIV_ACLK_AUD>,
231 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
232 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
233 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
234 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
235 <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
236 <&cmu_top CLK_DIV_SCLK_AUDIO0>,
237 <&cmu_top CLK_DIV_SCLK_AUDIO1>,
238 <&cmu_top CLK_DIV_SCLK_PCM1>,
239 <&cmu_top CLK_DIV_SCLK_I2S1>;
241 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
242 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
243 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
244 <&cmu_top CLK_FOUT_AUD_PLL>,
245 <&cmu_top CLK_MOUT_AUD_PLL>,
246 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
247 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
248 <&cmu_top CLK_SCLK_AUDIO0>;
250 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
251 <196608001>, <65536001>, <32768001>, <49152001>,
252 <2048001>, <24576001>, <196608001>,
253 <24576001>, <98304001>, <2048001>, <49152001>;
257 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
258 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
259 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
260 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
261 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
262 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
263 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
264 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
265 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
266 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
267 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
268 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
269 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
270 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
271 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
272 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
273 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
274 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
275 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
276 <66700000>, <66700000>;
280 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
281 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
282 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
283 <&cmu_top CLK_ACLK_GSCL_333>;
287 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
288 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
292 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
293 assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
294 assigned-clock-rates = <0>, <333000000>;
298 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
299 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
300 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
301 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
302 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
303 <&cmu_top CLK_SCLK_JPEG_MSCL>,
304 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
305 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
309 assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
310 assigned-clock-rates = <196608001>;
314 cpu-supply = <&buck3_reg>;
318 cpu-supply = <&buck2_reg>;
329 #address-cells = <1>;
334 tv_to_hdmi: endpoint {
335 remote-endpoint = <&hdmi_to_tv>;
343 vddcore-supply = <&ldo6_reg>;
344 vddio-supply = <&ldo7_reg>;
345 samsung,burst-clock-frequency = <512000000>;
346 samsung,esc-clock-frequency = <16000000>;
347 samsung,pll-clock-frequency = <24000000>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&te_irq>;
353 mali-supply = <&buck6_reg>;
358 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
360 vdd-supply = <&ldo6_reg>;
361 vdd_osc-supply = <&ldo7_reg>;
362 vdd_pll-supply = <&ldo6_reg>;
365 #address-cells = <1>;
370 hdmi_to_tv: endpoint {
371 remote-endpoint = <&tv_to_hdmi>;
377 hdmi_to_mhl: endpoint {
378 remote-endpoint = <&mhl_to_hdmi>;
386 clock-frequency = <2500000>;
389 compatible = "samsung,s2mps13-pmic";
390 interrupt-parent = <&gpa0>;
391 interrupts = <7 IRQ_TYPE_NONE>;
393 samsung,s2mps11-wrstbi-ground;
395 s2mps13_osc: clocks {
396 compatible = "samsung,s2mps13-clk";
398 clock-output-names = "s2mps13_ap", "s2mps13_cp",
404 regulator-name = "VDD_ALIVE_0.9V_AP";
405 regulator-min-microvolt = <900000>;
406 regulator-max-microvolt = <900000>;
411 regulator-name = "VDDQ_MMC2_2.8V_AP";
412 regulator-min-microvolt = <2800000>;
413 regulator-max-microvolt = <2800000>;
415 regulator-state-mem {
416 regulator-off-in-suspend;
421 regulator-name = "VDD1_E_1.8V_AP";
422 regulator-min-microvolt = <1800000>;
423 regulator-max-microvolt = <1800000>;
428 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
429 regulator-min-microvolt = <1300000>;
430 regulator-max-microvolt = <1300000>;
432 regulator-state-mem {
433 regulator-off-in-suspend;
438 regulator-name = "VDD10_DPLL_1.0V_AP";
439 regulator-min-microvolt = <1000000>;
440 regulator-max-microvolt = <1000000>;
442 regulator-state-mem {
443 regulator-off-in-suspend;
448 regulator-name = "VDD10_MIPI2L_1.0V_AP";
449 regulator-min-microvolt = <1000000>;
450 regulator-max-microvolt = <1000000>;
451 regulator-state-mem {
452 regulator-off-in-suspend;
457 regulator-name = "VDD18_MIPI2L_1.8V_AP";
458 regulator-min-microvolt = <1800000>;
459 regulator-max-microvolt = <1800000>;
461 regulator-state-mem {
462 regulator-off-in-suspend;
467 regulator-name = "VDD18_LLI_1.8V_AP";
468 regulator-min-microvolt = <1800000>;
469 regulator-max-microvolt = <1800000>;
471 regulator-state-mem {
472 regulator-off-in-suspend;
477 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
478 regulator-min-microvolt = <1800000>;
479 regulator-max-microvolt = <1800000>;
481 regulator-state-mem {
482 regulator-off-in-suspend;
487 regulator-name = "VDD33_USB30_3.0V_AP";
488 regulator-min-microvolt = <3000000>;
489 regulator-max-microvolt = <3000000>;
490 regulator-state-mem {
491 regulator-off-in-suspend;
496 regulator-name = "VDD_INT_M_1.0V_AP";
497 regulator-min-microvolt = <1000000>;
498 regulator-max-microvolt = <1000000>;
500 regulator-state-mem {
501 regulator-off-in-suspend;
506 regulator-name = "VDD_KFC_M_1.1V_AP";
507 regulator-min-microvolt = <800000>;
508 regulator-max-microvolt = <1350000>;
513 regulator-name = "VDD_G3D_M_0.95V_AP";
514 regulator-min-microvolt = <950000>;
515 regulator-max-microvolt = <950000>;
517 regulator-state-mem {
518 regulator-off-in-suspend;
523 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
524 regulator-min-microvolt = <1200000>;
525 regulator-max-microvolt = <1200000>;
527 regulator-state-mem {
528 regulator-off-in-suspend;
533 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
534 regulator-min-microvolt = <1200000>;
535 regulator-max-microvolt = <1200000>;
537 regulator-state-mem {
538 regulator-off-in-suspend;
543 regulator-name = "VDDQ_EFUSE";
544 regulator-min-microvolt = <1400000>;
545 regulator-max-microvolt = <3400000>;
550 regulator-name = "V_TFLASH_2.8V_AP";
551 regulator-min-microvolt = <2800000>;
552 regulator-max-microvolt = <2800000>;
556 regulator-name = "V_CODEC_1.8V_AP";
557 regulator-min-microvolt = <1800000>;
558 regulator-max-microvolt = <1800000>;
562 regulator-name = "VDDA_1.8V_COMP";
563 regulator-min-microvolt = <1800000>;
564 regulator-max-microvolt = <1800000>;
569 regulator-name = "VCC_2.8V_AP";
570 regulator-min-microvolt = <2800000>;
571 regulator-max-microvolt = <2800000>;
576 regulator-name = "VT_CAM_1.8V";
577 regulator-min-microvolt = <1800000>;
578 regulator-max-microvolt = <1800000>;
582 regulator-name = "CAM_IO_1.8V_AP";
583 regulator-min-microvolt = <1800000>;
584 regulator-max-microvolt = <1800000>;
588 regulator-name = "CAM_SEN_CORE_1.05V_AP";
589 regulator-min-microvolt = <1050000>;
590 regulator-max-microvolt = <1050000>;
594 regulator-name = "VT_CAM_1.2V";
595 regulator-min-microvolt = <1200000>;
596 regulator-max-microvolt = <1200000>;
600 regulator-name = "UNUSED_LDO25";
601 regulator-min-microvolt = <2800000>;
602 regulator-max-microvolt = <2800000>;
606 regulator-name = "CAM_AF_2.8V_AP";
607 regulator-min-microvolt = <2800000>;
608 regulator-max-microvolt = <2800000>;
612 regulator-name = "VCC_3.0V_LCD_AP";
613 regulator-min-microvolt = <3000000>;
614 regulator-max-microvolt = <3000000>;
618 regulator-name = "VCC_1.8V_LCD_AP";
619 regulator-min-microvolt = <1800000>;
620 regulator-max-microvolt = <1800000>;
624 regulator-name = "VT_CAM_2.8V";
625 regulator-min-microvolt = <3000000>;
626 regulator-max-microvolt = <3000000>;
630 regulator-name = "TSP_AVDD_3.3V_AP";
631 regulator-min-microvolt = <3300000>;
632 regulator-max-microvolt = <3300000>;
637 * LDO31 differs from target to target,
638 * its definition is in the .dts
643 regulator-name = "VTOUCH_1.8V_AP";
644 regulator-min-microvolt = <1800000>;
645 regulator-max-microvolt = <1800000>;
649 regulator-name = "VTOUCH_LED_3.3V";
650 regulator-min-microvolt = <2500000>;
651 regulator-max-microvolt = <3300000>;
652 regulator-ramp-delay = <12500>;
656 regulator-name = "VCC_1.8V_MHL_AP";
657 regulator-min-microvolt = <1000000>;
658 regulator-max-microvolt = <2100000>;
662 regulator-name = "OIS_VM_2.8V";
663 regulator-min-microvolt = <1800000>;
664 regulator-max-microvolt = <2800000>;
668 regulator-name = "VSIL_1.0V";
669 regulator-min-microvolt = <1000000>;
670 regulator-max-microvolt = <1000000>;
674 regulator-name = "VF_1.8V";
675 regulator-min-microvolt = <1800000>;
676 regulator-max-microvolt = <1800000>;
681 * LDO38 differs from target to target,
682 * its definition is in the .dts
687 regulator-name = "V_HRM_1.8V";
688 regulator-min-microvolt = <1800000>;
689 regulator-max-microvolt = <1800000>;
693 regulator-name = "V_HRM_3.3V";
694 regulator-min-microvolt = <3300000>;
695 regulator-max-microvolt = <3300000>;
699 regulator-name = "VDD_MIF_0.9V_AP";
700 regulator-min-microvolt = <600000>;
701 regulator-max-microvolt = <1500000>;
703 regulator-state-mem {
704 regulator-off-in-suspend;
709 regulator-name = "VDD_EGL_1.0V_AP";
710 regulator-min-microvolt = <900000>;
711 regulator-max-microvolt = <1300000>;
713 regulator-state-mem {
714 regulator-off-in-suspend;
719 regulator-name = "VDD_KFC_1.0V_AP";
720 regulator-min-microvolt = <800000>;
721 regulator-max-microvolt = <1200000>;
723 regulator-state-mem {
724 regulator-off-in-suspend;
729 regulator-name = "VDD_INT_0.95V_AP";
730 regulator-min-microvolt = <600000>;
731 regulator-max-microvolt = <1500000>;
733 regulator-state-mem {
734 regulator-off-in-suspend;
739 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
740 regulator-min-microvolt = <600000>;
741 regulator-max-microvolt = <1500000>;
743 regulator-state-mem {
744 regulator-off-in-suspend;
749 regulator-name = "VDD_G3D_0.9V_AP";
750 regulator-min-microvolt = <600000>;
751 regulator-max-microvolt = <1500000>;
753 regulator-state-mem {
754 regulator-off-in-suspend;
759 regulator-name = "VDD_MEM1_1.2V_AP";
760 regulator-min-microvolt = <1200000>;
761 regulator-max-microvolt = <1200000>;
766 regulator-name = "VDD_LLDO_1.35V_AP";
767 regulator-min-microvolt = <1350000>;
768 regulator-max-microvolt = <3300000>;
773 regulator-name = "VDD_MLDO_2.0V_AP";
774 regulator-min-microvolt = <1350000>;
775 regulator-max-microvolt = <3300000>;
780 regulator-name = "vdd_mem2";
781 regulator-min-microvolt = <550000>;
782 regulator-max-microvolt = <1500000>;
793 compatible = "samsung,s3fwrn5-i2c";
795 interrupt-parent = <&gpa1>;
796 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
797 en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
798 wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
805 stmfts: touchscreen@49 {
806 compatible = "st,stmfts";
808 interrupt-parent = <&gpa1>;
809 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
810 avdd-supply = <&ldo30_reg>;
811 vdd-supply = <&ldo31_reg>;
817 clock-frequency = <1000000>;
821 compatible = "sil,sii8620";
822 cvcc10-supply = <&ldo36_reg>;
823 iovcc18-supply = <&ldo34_reg>;
824 interrupt-parent = <&gpf0>;
825 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
826 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
827 clocks = <&pmu_system_controller 0>;
828 clock-names = "xtal";
831 #address-cells = <1>;
836 mhl_to_hdmi: endpoint {
837 remote-endpoint = <&hdmi_to_mhl>;
843 mhl_to_musb_con: endpoint {
844 remote-endpoint = <&musb_con_to_mhl>;
855 compatible = "maxim,max77843";
856 interrupt-parent = <&gpa1>;
857 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
860 muic: max77843-muic {
861 compatible = "maxim,max77843-muic";
863 musb_con: musb-connector {
864 compatible = "samsung,usb-connector-11pin",
870 #address-cells = <1>;
875 musb_con_to_mhl: endpoint {
876 remote-endpoint = <&mhl_to_musb_con>;
884 muic_to_usb: endpoint {
885 remote-endpoint = <&usb_to_muic>;
892 compatible = "maxim,max77843-regulator";
893 safeout1_reg: SAFEOUT1 {
894 regulator-name = "SAFEOUT1";
895 regulator-min-microvolt = <3300000>;
896 regulator-max-microvolt = <4950000>;
899 safeout2_reg: SAFEOUT2 {
900 regulator-name = "SAFEOUT2";
901 regulator-min-microvolt = <3300000>;
902 regulator-max-microvolt = <4950000>;
905 charger_reg: CHARGER {
906 regulator-name = "CHARGER";
907 regulator-min-microamp = <100000>;
908 regulator-max-microamp = <3150000>;
912 haptic: max77843-haptic {
913 compatible = "maxim,max77843-haptic";
914 haptic-supply = <&ldo38_reg>;
915 pwms = <&pwm 0 33670 0>;
916 pwm-names = "haptic";
930 assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
931 assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
941 card-detect-delay = <200>;
942 samsung,dw-mshc-ciu-div = <3>;
943 samsung,dw-mshc-sdr-timing = <0 4>;
944 samsung,dw-mshc-ddr-timing = <0 2>;
945 samsung,dw-mshc-hs400-timing = <0 3>;
946 samsung,read-strobe-delay = <90>;
948 pinctrl-names = "default";
949 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
950 &sd0_bus8 &sd0_rdqs>;
952 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
953 assigned-clock-rates = <800000000>;
960 cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
961 card-detect-delay = <200>;
962 samsung,dw-mshc-ciu-div = <3>;
963 samsung,dw-mshc-sdr-timing = <0 4>;
964 samsung,dw-mshc-ddr-timing = <0 2>;
966 pinctrl-names = "default";
967 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
973 pinctrl-names = "default";
974 pinctrl-0 = <&pcie_bus &pcie_wlanen>;
975 vdd10-supply = <&ldo6_reg>;
976 vdd18-supply = <&ldo7_reg>;
977 assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
978 <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
979 assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
980 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
981 assigned-clock-rates = <0>, <100000000>;
982 interrupt-map-mask = <0 0 0 0>;
983 interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
993 ppmu_event0_d0_general: ppmu-event0-d0-general {
994 event-name = "ppmu-event0-d0-general";
1002 ppmu_event0_d1_general: ppmu-event0-d1-general {
1003 event-name = "ppmu-event0-d1-general";
1009 pinctrl-names = "default";
1010 pinctrl-0 = <&initial_alive>;
1012 initial_alive: initial-state {
1013 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
1014 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
1015 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
1016 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
1017 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
1018 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
1019 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
1020 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
1022 PIN(INPUT, gpa1-0, UP, FAST_SR1);
1023 PIN(INPUT, gpa1-1, UP, FAST_SR1);
1024 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
1025 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
1026 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
1027 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
1028 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
1029 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
1031 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
1032 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
1033 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
1034 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
1035 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
1036 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
1037 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
1038 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
1040 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
1041 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
1042 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
1043 PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
1044 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
1045 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
1046 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
1047 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
1049 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
1050 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
1051 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
1052 PIN(INPUT, gpf1-4, UP, FAST_SR1);
1053 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
1054 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
1055 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
1057 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
1058 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
1059 PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
1060 PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
1062 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
1063 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
1064 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
1065 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
1067 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
1068 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
1069 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
1070 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
1071 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
1072 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
1073 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
1074 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
1076 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
1077 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
1078 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
1079 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
1080 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
1081 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
1082 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
1083 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
1087 samsung,pins = "gpf1-3";
1088 samsung,pin-function = <0xf>;
1093 pinctrl-names = "default";
1094 pinctrl-0 = <&initial_cpif>;
1096 initial_cpif: initial-state {
1097 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
1098 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
1103 pinctrl-names = "default";
1104 pinctrl-0 = <&initial_ese>;
1106 pcie_wlanen: pcie-wlanen {
1107 PIN(INPUT, gpj2-0, UP, FAST_SR4);
1110 initial_ese: initial-state {
1111 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
1112 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
1117 pinctrl-names = "default";
1118 pinctrl-0 = <&initial_fsys>;
1120 initial_fsys: initial-state {
1121 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1122 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1123 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1124 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1125 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1130 pinctrl-names = "default";
1131 pinctrl-0 = <&initial_imem>;
1133 initial_imem: initial-state {
1134 PIN(INPUT, gpf0-0, UP, FAST_SR1);
1135 PIN(INPUT, gpf0-1, UP, FAST_SR1);
1136 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1137 PIN(INPUT, gpf0-3, UP, FAST_SR1);
1138 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1139 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1140 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1141 PIN(INPUT, gpf0-7, UP, FAST_SR1);
1146 pinctrl-names = "default";
1147 pinctrl-0 = <&initial_nfc>;
1149 initial_nfc: initial-state {
1150 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1155 pinctrl-names = "default";
1156 pinctrl-0 = <&initial_peric>;
1158 initial_peric: initial-state {
1159 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1160 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1161 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1162 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1163 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1164 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1166 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1168 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1169 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1170 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1172 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1174 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1175 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1176 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1177 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1179 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1180 PIN(2, gpg0-1, DOWN, FAST_SR1);
1182 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1184 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1185 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1186 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1187 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1188 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1190 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1192 PIN(INPUT, gpd8-1, UP, FAST_SR1);
1194 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1195 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1196 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1197 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1198 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1200 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1201 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1203 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1204 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1205 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1210 pinctrl-names = "default";
1211 pinctrl-0 = <&initial_touch>;
1213 initial_touch: initial-state {
1214 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1219 pinctrl-0 = <&pwm0_out>;
1220 pinctrl-names = "default";
1228 &pmu_system_controller {
1229 assigned-clocks = <&pmu_system_controller 0>;
1230 assigned-clock-parents = <&xxti>;
1241 compatible = "brcm,bcm43438-bt";
1242 max-speed = <3000000>;
1243 shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
1244 device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
1245 host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
1246 clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
1247 clock-names = "extclk";
1252 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1255 wm5110: audio-codec@0 {
1256 compatible = "wlf,wm5110";
1258 spi-max-frequency = <20000000>;
1259 interrupt-parent = <&gpa0>;
1260 interrupts = <4 IRQ_TYPE_NONE>;
1261 clocks = <&pmu_system_controller 0>,
1262 <&s2mps13_osc S2MPS11_CLK_BT>;
1263 clock-names = "mclk1", "mclk2";
1268 wlf,micd-detect-debounce = <300>;
1269 wlf,micd-bias-start-time = <0x1>;
1270 wlf,micd-rate = <0x7>;
1271 wlf,micd-dbtime = <0x1>;
1272 wlf,micd-force-micbias;
1273 wlf,micd-configs = <0x0 1 0>;
1274 wlf,hpdet-channel = <1>;
1276 wlf,inmode = <2 0 2 0>;
1278 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1279 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1282 AVDD-supply = <&ldo18_reg>;
1283 DBVDD1-supply = <&ldo18_reg>;
1284 CPVDD-supply = <&ldo18_reg>;
1285 DBVDD2-supply = <&ldo18_reg>;
1286 DBVDD3-supply = <&ldo18_reg>;
1289 samsung,spi-feedback-delay = <0>;
1299 compatible = "ir-spi-led";
1301 spi-max-frequency = <5000000>;
1302 power-supply = <&irda_regulator>;
1307 samsung,spi-feedback-delay = <0>;
1313 clock-frequency = <24000000>;
1317 vtmu-supply = <&ldo3_reg>;
1322 vtmu-supply = <&ldo3_reg>;
1327 vtmu-supply = <&ldo3_reg>;
1332 vdd33-supply = <&ldo10_reg>;
1333 vdd10-supply = <&ldo6_reg>;
1342 vbus-supply = <&safeout1_reg>;
1346 usb_to_muic: endpoint {
1347 remote-endpoint = <&muic_to_usb>;
1353 clock-frequency = <24000000>;