1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/common/sa1111.c
7 * Original code by John Dorsey
9 * This file contains all generic SA1111 support.
11 * All initialization functions provided here are intended to be called
12 * from machine specific code with proper arguments when required.
14 #include <linux/module.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/init.h>
17 #include <linux/irq.h>
18 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
25 #include <linux/dma-map-ops.h>
26 #include <linux/clk.h>
29 #include <mach/hardware.h>
30 #include <asm/mach/irq.h>
31 #include <asm/mach-types.h>
32 #include <linux/sizes.h>
34 #include <asm/hardware/sa1111.h>
37 #define IRQ_GPAIN0 (0)
38 #define IRQ_GPAIN1 (1)
39 #define IRQ_GPAIN2 (2)
40 #define IRQ_GPAIN3 (3)
41 #define IRQ_GPBIN0 (4)
42 #define IRQ_GPBIN1 (5)
43 #define IRQ_GPBIN2 (6)
44 #define IRQ_GPBIN3 (7)
45 #define IRQ_GPBIN4 (8)
46 #define IRQ_GPBIN5 (9)
47 #define IRQ_GPCIN0 (10)
48 #define IRQ_GPCIN1 (11)
49 #define IRQ_GPCIN2 (12)
50 #define IRQ_GPCIN3 (13)
51 #define IRQ_GPCIN4 (14)
52 #define IRQ_GPCIN5 (15)
53 #define IRQ_GPCIN6 (16)
54 #define IRQ_GPCIN7 (17)
55 #define IRQ_MSTXINT (18)
56 #define IRQ_MSRXINT (19)
57 #define IRQ_MSSTOPERRINT (20)
58 #define IRQ_TPTXINT (21)
59 #define IRQ_TPRXINT (22)
60 #define IRQ_TPSTOPERRINT (23)
61 #define SSPXMTINT (24)
62 #define SSPRCVINT (25)
64 #define AUDXMTDMADONEA (32)
65 #define AUDRCVDMADONEA (33)
66 #define AUDXMTDMADONEB (34)
67 #define AUDRCVDMADONEB (35)
75 #define IRQ_USBPWR (43)
77 #define IRQ_HCIBUFFACC (45)
78 #define IRQ_HCIRMTWKP (46)
79 #define IRQ_NHCIMFCIR (47)
80 #define IRQ_USB_PORT_RESUME (48)
81 #define IRQ_S0_READY_NINT (49)
82 #define IRQ_S1_READY_NINT (50)
83 #define IRQ_S0_CD_VALID (51)
84 #define IRQ_S1_CD_VALID (52)
85 #define IRQ_S0_BVD1_STSCHG (53)
86 #define IRQ_S1_BVD1_STSCHG (54)
87 #define SA1111_IRQ_NR (55)
89 extern void sa1110_mb_enable(void);
90 extern void sa1110_mb_disable(void);
93 * We keep the following data for the overall SA1111. Note that the
94 * struct device and struct resource are "fake"; they should be supplied
95 * by the bus above us. However, in the interests of getting all SA1111
96 * drivers converted over to the device model, we provide this as an
97 * anchor point for all the other drivers.
104 int irq_base; /* base for cascaded on-chip IRQs */
107 struct sa1111_platform_data *pdata;
108 struct irq_domain *irqdomain;
116 * We _really_ need to eliminate this. Its only users
117 * are the PWM and DMA checking code.
119 static struct sa1111 *g_sa1111;
121 struct sa1111_dev_info {
122 unsigned long offset;
123 unsigned long skpcr_mask;
126 unsigned int hwirq[6];
129 static struct sa1111_dev_info sa1111_devices[] = {
131 .offset = SA1111_USB,
132 .skpcr_mask = SKPCR_UCLKEN,
134 .devid = SA1111_DEVID_USB,
146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
148 .devid = SA1111_DEVID_SAC,
158 .skpcr_mask = SKPCR_SCLKEN,
159 .devid = SA1111_DEVID_SSP,
162 .offset = SA1111_KBD,
163 .skpcr_mask = SKPCR_PTCLKEN,
164 .devid = SA1111_DEVID_PS2_KBD,
171 .offset = SA1111_MSE,
172 .skpcr_mask = SKPCR_PMCLKEN,
173 .devid = SA1111_DEVID_PS2_MSE,
182 .devid = SA1111_DEVID_PCMCIA,
194 static int sa1111_map_irq(struct sa1111 *sachip, irq_hw_number_t hwirq)
196 return irq_create_mapping(sachip->irqdomain, hwirq);
200 * SA1111 interrupt support. Since clearing an IRQ while there are
201 * active IRQs causes the interrupt output to pulse, the upper levels
202 * will call us again if there are more interrupts to process.
204 static void sa1111_irq_handler(struct irq_desc *desc)
206 unsigned int stat0, stat1, i;
207 struct sa1111 *sachip = irq_desc_get_handler_data(desc);
208 struct irq_domain *irqdomain;
209 void __iomem *mapbase = sachip->base + SA1111_INTC;
211 stat0 = readl_relaxed(mapbase + SA1111_INTSTATCLR0);
212 stat1 = readl_relaxed(mapbase + SA1111_INTSTATCLR1);
214 writel_relaxed(stat0, mapbase + SA1111_INTSTATCLR0);
216 desc->irq_data.chip->irq_ack(&desc->irq_data);
218 writel_relaxed(stat1, mapbase + SA1111_INTSTATCLR1);
220 if (stat0 == 0 && stat1 == 0) {
225 irqdomain = sachip->irqdomain;
227 for (i = 0; stat0; i++, stat0 >>= 1)
229 generic_handle_domain_irq(irqdomain, i);
231 for (i = 32; stat1; i++, stat1 >>= 1)
233 generic_handle_domain_irq(irqdomain, i);
235 /* For level-based interrupts */
236 desc->irq_data.chip->irq_unmask(&desc->irq_data);
239 static u32 sa1111_irqmask(struct irq_data *d)
241 return BIT(irqd_to_hwirq(d) & 31);
244 static int sa1111_irqbank(struct irq_data *d)
246 return (irqd_to_hwirq(d) / 32) * 4;
249 static void sa1111_ack_irq(struct irq_data *d)
253 static void sa1111_mask_irq(struct irq_data *d)
255 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
256 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
259 ie = readl_relaxed(mapbase + SA1111_INTEN0);
260 ie &= ~sa1111_irqmask(d);
261 writel(ie, mapbase + SA1111_INTEN0);
264 static void sa1111_unmask_irq(struct irq_data *d)
266 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
267 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
270 ie = readl_relaxed(mapbase + SA1111_INTEN0);
271 ie |= sa1111_irqmask(d);
272 writel_relaxed(ie, mapbase + SA1111_INTEN0);
276 * Attempt to re-trigger the interrupt. The SA1111 contains a register
277 * (INTSET) which claims to do this. However, in practice no amount of
278 * manipulation of INTEN and INTSET guarantees that the interrupt will
279 * be triggered. In fact, its very difficult, if not impossible to get
280 * INTSET to re-trigger the interrupt.
282 static int sa1111_retrigger_irq(struct irq_data *d)
284 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
285 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
286 u32 ip, mask = sa1111_irqmask(d);
289 ip = readl_relaxed(mapbase + SA1111_INTPOL0);
290 for (i = 0; i < 8; i++) {
291 writel_relaxed(ip ^ mask, mapbase + SA1111_INTPOL0);
292 writel_relaxed(ip, mapbase + SA1111_INTPOL0);
293 if (readl_relaxed(mapbase + SA1111_INTSTATCLR0) & mask)
298 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n",
306 static int sa1111_type_irq(struct irq_data *d, unsigned int flags)
308 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
309 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
310 u32 ip, mask = sa1111_irqmask(d);
312 if (flags == IRQ_TYPE_PROBE)
315 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
318 ip = readl_relaxed(mapbase + SA1111_INTPOL0);
319 if (flags & IRQ_TYPE_EDGE_RISING)
323 writel_relaxed(ip, mapbase + SA1111_INTPOL0);
324 writel_relaxed(ip, mapbase + SA1111_WAKEPOL0);
329 static int sa1111_wake_irq(struct irq_data *d, unsigned int on)
331 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
332 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
333 u32 we, mask = sa1111_irqmask(d);
335 we = readl_relaxed(mapbase + SA1111_WAKEEN0);
340 writel_relaxed(we, mapbase + SA1111_WAKEEN0);
345 static struct irq_chip sa1111_irq_chip = {
347 .irq_ack = sa1111_ack_irq,
348 .irq_mask = sa1111_mask_irq,
349 .irq_unmask = sa1111_unmask_irq,
350 .irq_retrigger = sa1111_retrigger_irq,
351 .irq_set_type = sa1111_type_irq,
352 .irq_set_wake = sa1111_wake_irq,
355 static int sa1111_irqdomain_map(struct irq_domain *d, unsigned int irq,
356 irq_hw_number_t hwirq)
358 struct sa1111 *sachip = d->host_data;
360 /* Disallow unavailable interrupts */
361 if (hwirq > SSPROR && hwirq < AUDXMTDMADONEA)
364 irq_set_chip_data(irq, sachip);
365 irq_set_chip_and_handler(irq, &sa1111_irq_chip, handle_edge_irq);
366 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
371 static const struct irq_domain_ops sa1111_irqdomain_ops = {
372 .map = sa1111_irqdomain_map,
373 .xlate = irq_domain_xlate_twocell,
376 static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
378 void __iomem *irqbase = sachip->base + SA1111_INTC;
382 * We're guaranteed that this region hasn't been taken.
384 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
386 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
388 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
395 sachip->irq_base = ret;
397 /* disable all IRQs */
398 writel_relaxed(0, irqbase + SA1111_INTEN0);
399 writel_relaxed(0, irqbase + SA1111_INTEN1);
400 writel_relaxed(0, irqbase + SA1111_WAKEEN0);
401 writel_relaxed(0, irqbase + SA1111_WAKEEN1);
404 * detect on rising edge. Note: Feb 2001 Errata for SA1111
405 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
407 writel_relaxed(0, irqbase + SA1111_INTPOL0);
408 writel_relaxed(BIT(IRQ_S0_READY_NINT & 31) |
409 BIT(IRQ_S1_READY_NINT & 31),
410 irqbase + SA1111_INTPOL1);
413 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);
414 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);
416 sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,
417 &sa1111_irqdomain_ops,
419 if (!sachip->irqdomain) {
420 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
424 irq_domain_associate_many(sachip->irqdomain,
425 sachip->irq_base + IRQ_GPAIN0,
426 IRQ_GPAIN0, SSPROR + 1 - IRQ_GPAIN0);
427 irq_domain_associate_many(sachip->irqdomain,
428 sachip->irq_base + AUDXMTDMADONEA,
430 IRQ_S1_BVD1_STSCHG + 1 - AUDXMTDMADONEA);
433 * Register SA1111 interrupt
435 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
436 irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler,
439 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
440 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
445 static void sa1111_remove_irq(struct sa1111 *sachip)
447 struct irq_domain *domain = sachip->irqdomain;
448 void __iomem *irqbase = sachip->base + SA1111_INTC;
451 /* disable all IRQs */
452 writel_relaxed(0, irqbase + SA1111_INTEN0);
453 writel_relaxed(0, irqbase + SA1111_INTEN1);
454 writel_relaxed(0, irqbase + SA1111_WAKEEN0);
455 writel_relaxed(0, irqbase + SA1111_WAKEEN1);
457 irq_set_chained_handler_and_data(sachip->irq, NULL, NULL);
458 for (i = 0; i < SA1111_IRQ_NR; i++)
459 irq_dispose_mapping(irq_find_mapping(domain, i));
460 irq_domain_remove(domain);
462 release_mem_region(sachip->phys + SA1111_INTC, 512);
466 SA1111_GPIO_PXDDR = (SA1111_GPIO_PADDR - SA1111_GPIO_PADDR),
467 SA1111_GPIO_PXDRR = (SA1111_GPIO_PADRR - SA1111_GPIO_PADDR),
468 SA1111_GPIO_PXDWR = (SA1111_GPIO_PADWR - SA1111_GPIO_PADDR),
469 SA1111_GPIO_PXSDR = (SA1111_GPIO_PASDR - SA1111_GPIO_PADDR),
470 SA1111_GPIO_PXSSR = (SA1111_GPIO_PASSR - SA1111_GPIO_PADDR),
473 static struct sa1111 *gc_to_sa1111(struct gpio_chip *gc)
475 return container_of(gc, struct sa1111, gc);
478 static void __iomem *sa1111_gpio_map_reg(struct sa1111 *sachip, unsigned offset)
480 void __iomem *reg = sachip->base + SA1111_GPIO;
483 return reg + SA1111_GPIO_PADDR;
485 return reg + SA1111_GPIO_PBDDR;
487 return reg + SA1111_GPIO_PCDDR;
491 static u32 sa1111_gpio_map_bit(unsigned offset)
496 return BIT(offset - 4);
498 return BIT(offset - 10);
502 static void sa1111_gpio_modify(void __iomem *reg, u32 mask, u32 set)
506 val = readl_relaxed(reg);
509 writel_relaxed(val, reg);
512 static int sa1111_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
514 struct sa1111 *sachip = gc_to_sa1111(gc);
515 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
516 u32 mask = sa1111_gpio_map_bit(offset);
518 return !!(readl_relaxed(reg + SA1111_GPIO_PXDDR) & mask);
521 static int sa1111_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
523 struct sa1111 *sachip = gc_to_sa1111(gc);
525 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
526 u32 mask = sa1111_gpio_map_bit(offset);
528 spin_lock_irqsave(&sachip->lock, flags);
529 sa1111_gpio_modify(reg + SA1111_GPIO_PXDDR, mask, mask);
530 sa1111_gpio_modify(reg + SA1111_GPIO_PXSDR, mask, mask);
531 spin_unlock_irqrestore(&sachip->lock, flags);
536 static int sa1111_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
539 struct sa1111 *sachip = gc_to_sa1111(gc);
541 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
542 u32 mask = sa1111_gpio_map_bit(offset);
544 spin_lock_irqsave(&sachip->lock, flags);
545 sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);
546 sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);
547 sa1111_gpio_modify(reg + SA1111_GPIO_PXDDR, mask, 0);
548 sa1111_gpio_modify(reg + SA1111_GPIO_PXSDR, mask, 0);
549 spin_unlock_irqrestore(&sachip->lock, flags);
554 static int sa1111_gpio_get(struct gpio_chip *gc, unsigned offset)
556 struct sa1111 *sachip = gc_to_sa1111(gc);
557 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
558 u32 mask = sa1111_gpio_map_bit(offset);
560 return !!(readl_relaxed(reg + SA1111_GPIO_PXDRR) & mask);
563 static void sa1111_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
565 struct sa1111 *sachip = gc_to_sa1111(gc);
567 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
568 u32 mask = sa1111_gpio_map_bit(offset);
570 spin_lock_irqsave(&sachip->lock, flags);
571 sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);
572 sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);
573 spin_unlock_irqrestore(&sachip->lock, flags);
576 static void sa1111_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
579 struct sa1111 *sachip = gc_to_sa1111(gc);
581 void __iomem *reg = sachip->base + SA1111_GPIO;
587 spin_lock_irqsave(&sachip->lock, flags);
588 sa1111_gpio_modify(reg + SA1111_GPIO_PADWR, msk & 15, val);
589 sa1111_gpio_modify(reg + SA1111_GPIO_PASSR, msk & 15, val);
590 sa1111_gpio_modify(reg + SA1111_GPIO_PBDWR, (msk >> 4) & 255, val >> 4);
591 sa1111_gpio_modify(reg + SA1111_GPIO_PBSSR, (msk >> 4) & 255, val >> 4);
592 sa1111_gpio_modify(reg + SA1111_GPIO_PCDWR, (msk >> 12) & 255, val >> 12);
593 sa1111_gpio_modify(reg + SA1111_GPIO_PCSSR, (msk >> 12) & 255, val >> 12);
594 spin_unlock_irqrestore(&sachip->lock, flags);
597 static int sa1111_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
599 struct sa1111 *sachip = gc_to_sa1111(gc);
601 return sa1111_map_irq(sachip, offset);
604 static int sa1111_setup_gpios(struct sa1111 *sachip)
606 sachip->gc.label = "sa1111";
607 sachip->gc.parent = sachip->dev;
608 sachip->gc.owner = THIS_MODULE;
609 sachip->gc.get_direction = sa1111_gpio_get_direction;
610 sachip->gc.direction_input = sa1111_gpio_direction_input;
611 sachip->gc.direction_output = sa1111_gpio_direction_output;
612 sachip->gc.get = sa1111_gpio_get;
613 sachip->gc.set = sa1111_gpio_set;
614 sachip->gc.set_multiple = sa1111_gpio_set_multiple;
615 sachip->gc.to_irq = sa1111_gpio_to_irq;
616 sachip->gc.base = -1;
617 sachip->gc.ngpio = 18;
619 return devm_gpiochip_add_data(sachip->dev, &sachip->gc, sachip);
623 * Bring the SA1111 out of reset. This requires a set procedure:
624 * 1. nRESET asserted (by hardware)
625 * 2. CLK turned on from SA1110
626 * 3. nRESET deasserted
627 * 4. VCO turned on, PLL_BYPASS turned off
628 * 5. Wait lock time, then assert RCLKEn
629 * 7. PCR set to allow clocking of individual functions
631 * Until we've done this, the only registers we can access are:
636 static void sa1111_wake(struct sa1111 *sachip)
638 unsigned long flags, r;
640 spin_lock_irqsave(&sachip->lock, flags);
642 clk_enable(sachip->clk);
645 * Turn VCO on, and disable PLL Bypass.
647 r = readl_relaxed(sachip->base + SA1111_SKCR);
649 writel_relaxed(r, sachip->base + SA1111_SKCR);
650 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
651 writel_relaxed(r, sachip->base + SA1111_SKCR);
654 * Wait lock time. SA1111 manual _doesn't_
655 * specify a figure for this! We choose 100us.
660 * Enable RCLK. We also ensure that RDYEN is set.
662 r |= SKCR_RCLKEN | SKCR_RDYEN;
663 writel_relaxed(r, sachip->base + SA1111_SKCR);
666 * Wait 14 RCLK cycles for the chip to finish coming out
667 * of reset. (RCLK=24MHz). This is 590ns.
672 * Ensure all clocks are initially off.
674 writel_relaxed(0, sachip->base + SA1111_SKPCR);
676 spin_unlock_irqrestore(&sachip->lock, flags);
679 #ifdef CONFIG_ARCH_SA1100
681 static u32 sa1111_dma_mask[] = {
693 * Configure the SA1111 shared memory controller.
696 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
697 unsigned int cas_latency)
699 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
701 if (cas_latency == 3)
704 writel_relaxed(smcr, sachip->base + SA1111_SMCR);
707 * Now clear the bits in the DMA mask to work around the SA1111
708 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
709 * Chip Specification Update, June 2000, Erratum #7).
711 if (sachip->dev->dma_mask)
712 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
714 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
718 static void sa1111_dev_release(struct device *_dev)
720 struct sa1111_dev *dev = to_sa1111_device(_dev);
726 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
727 struct sa1111_dev_info *info)
729 struct sa1111_dev *dev;
733 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
739 device_initialize(&dev->dev);
740 dev_set_name(&dev->dev, "%4.4lx", info->offset);
741 dev->devid = info->devid;
742 dev->dev.parent = sachip->dev;
743 dev->dev.bus = &sa1111_bus_type;
744 dev->dev.release = sa1111_dev_release;
745 dev->res.start = sachip->phys + info->offset;
746 dev->res.end = dev->res.start + 511;
747 dev->res.name = dev_name(&dev->dev);
748 dev->res.flags = IORESOURCE_MEM;
749 dev->mapbase = sachip->base + info->offset;
750 dev->skpcr_mask = info->skpcr_mask;
752 for (i = 0; i < ARRAY_SIZE(info->hwirq); i++)
753 dev->hwirq[i] = info->hwirq[i];
756 * If the parent device has a DMA mask associated with it, and
757 * this child supports DMA, propagate it down to the children.
759 if (info->dma && sachip->dev->dma_mask) {
760 dev->dma_mask = *sachip->dev->dma_mask;
761 dev->dev.dma_mask = &dev->dma_mask;
762 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
765 ret = request_resource(parent, &dev->res);
767 dev_err(sachip->dev, "failed to allocate resource for %s\n",
772 ret = device_add(&dev->dev);
778 release_resource(&dev->res);
780 put_device(&dev->dev);
786 * sa1111_probe - probe for a single SA1111 chip.
787 * @phys_addr: physical address of device.
789 * Probe for a SA1111 chip. This must be called
790 * before any other SA1111-specific code.
793 * %-ENODEV device not found.
794 * %-EBUSY physical address already marked in-use.
795 * %-EINVAL no platform data passed
798 static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
800 struct sa1111_platform_data *pd = me->platform_data;
801 struct sa1111 *sachip;
803 unsigned int has_devs;
804 int i, ret = -ENODEV;
809 sachip = devm_kzalloc(me, sizeof(struct sa1111), GFP_KERNEL);
813 sachip->clk = devm_clk_get(me, "SA1111_CLK");
814 if (IS_ERR(sachip->clk))
815 return PTR_ERR(sachip->clk);
817 ret = clk_prepare(sachip->clk);
821 spin_lock_init(&sachip->lock);
824 dev_set_drvdata(sachip->dev, sachip);
827 sachip->phys = mem->start;
831 * Map the whole region. This also maps the
832 * registers for our children.
834 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
841 * Probe for the chip. Only touch the SBI registers.
843 id = readl_relaxed(sachip->base + SA1111_SKID);
844 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
845 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
850 pr_info("SA1111 Microprocessor Companion Chip: silicon revision %lx, metal revision %lx\n",
851 (id & SKID_SIREV_MASK) >> 4, id & SKID_MTREV_MASK);
854 * We found it. Wake the chip up, and initialise.
859 * The interrupt controller must be initialised before any
860 * other device to ensure that the interrupts are available.
862 ret = sa1111_setup_irq(sachip, pd->irq_base);
866 /* Setup the GPIOs - should really be done after the IRQ setup */
867 ret = sa1111_setup_gpios(sachip);
871 #ifdef CONFIG_ARCH_SA1100
876 * The SDRAM configuration of the SA1110 and the SA1111 must
877 * match. This is very important to ensure that SA1111 accesses
878 * don't corrupt the SDRAM. Note that this ungates the SA1111's
879 * MBGNT signal, so we must have called sa1110_mb_disable()
882 sa1111_configure_smc(sachip, 1,
883 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
884 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
887 * We only need to turn on DCLK whenever we want to use the
888 * DMA. It can otherwise be held firmly in the off position.
889 * (currently, we always enable it.)
891 val = readl_relaxed(sachip->base + SA1111_SKPCR);
892 writel_relaxed(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
895 * Enable the SA1110 memory bus request and grant signals.
905 has_devs &= ~pd->disable_devs;
907 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
908 if (sa1111_devices[i].devid & has_devs)
909 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
914 sa1111_remove_irq(sachip);
916 clk_disable(sachip->clk);
918 iounmap(sachip->base);
920 clk_unprepare(sachip->clk);
924 static int sa1111_remove_one(struct device *dev, void *data)
926 struct sa1111_dev *sadev = to_sa1111_device(dev);
927 if (dev->bus != &sa1111_bus_type)
929 device_del(&sadev->dev);
930 release_resource(&sadev->res);
931 put_device(&sadev->dev);
935 static void __sa1111_remove(struct sa1111 *sachip)
937 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
939 sa1111_remove_irq(sachip);
941 clk_disable(sachip->clk);
942 clk_unprepare(sachip->clk);
944 iounmap(sachip->base);
947 struct sa1111_save_data {
952 unsigned char skpwm0;
953 unsigned char skpwm1;
956 * Interrupt controller
958 unsigned int intpol0;
959 unsigned int intpol1;
962 unsigned int wakepol0;
963 unsigned int wakepol1;
964 unsigned int wakeen0;
965 unsigned int wakeen1;
970 static int sa1111_suspend_noirq(struct device *dev)
972 struct sa1111 *sachip = dev_get_drvdata(dev);
973 struct sa1111_save_data *save;
978 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
981 sachip->saved_state = save;
983 spin_lock_irqsave(&sachip->lock, flags);
989 save->skcr = readl_relaxed(base + SA1111_SKCR);
990 save->skpcr = readl_relaxed(base + SA1111_SKPCR);
991 save->skcdr = readl_relaxed(base + SA1111_SKCDR);
992 save->skaud = readl_relaxed(base + SA1111_SKAUD);
993 save->skpwm0 = readl_relaxed(base + SA1111_SKPWM0);
994 save->skpwm1 = readl_relaxed(base + SA1111_SKPWM1);
996 writel_relaxed(0, sachip->base + SA1111_SKPWM0);
997 writel_relaxed(0, sachip->base + SA1111_SKPWM1);
999 base = sachip->base + SA1111_INTC;
1000 save->intpol0 = readl_relaxed(base + SA1111_INTPOL0);
1001 save->intpol1 = readl_relaxed(base + SA1111_INTPOL1);
1002 save->inten0 = readl_relaxed(base + SA1111_INTEN0);
1003 save->inten1 = readl_relaxed(base + SA1111_INTEN1);
1004 save->wakepol0 = readl_relaxed(base + SA1111_WAKEPOL0);
1005 save->wakepol1 = readl_relaxed(base + SA1111_WAKEPOL1);
1006 save->wakeen0 = readl_relaxed(base + SA1111_WAKEEN0);
1007 save->wakeen1 = readl_relaxed(base + SA1111_WAKEEN1);
1012 val = readl_relaxed(sachip->base + SA1111_SKCR);
1013 writel_relaxed(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
1015 clk_disable(sachip->clk);
1017 spin_unlock_irqrestore(&sachip->lock, flags);
1019 #ifdef CONFIG_ARCH_SA1100
1020 sa1110_mb_disable();
1027 * sa1111_resume - Restore the SA1111 device state.
1028 * @dev: device to restore
1030 * Restore the general state of the SA1111; clock control and
1031 * interrupt controller. Other parts of the SA1111 must be
1032 * restored by their respective drivers, and must be called
1033 * via LDM after this function.
1035 static int sa1111_resume_noirq(struct device *dev)
1037 struct sa1111 *sachip = dev_get_drvdata(dev);
1038 struct sa1111_save_data *save;
1039 unsigned long flags, id;
1042 save = sachip->saved_state;
1047 * Ensure that the SA1111 is still here.
1048 * FIXME: shouldn't do this here.
1050 id = readl_relaxed(sachip->base + SA1111_SKID);
1051 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
1052 __sa1111_remove(sachip);
1053 dev_set_drvdata(dev, NULL);
1059 * First of all, wake up the chip.
1061 sa1111_wake(sachip);
1063 #ifdef CONFIG_ARCH_SA1100
1064 /* Enable the memory bus request/grant signals */
1069 * Only lock for write ops. Also, sa1111_wake must be called with
1070 * released spinlock!
1072 spin_lock_irqsave(&sachip->lock, flags);
1074 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
1075 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
1077 base = sachip->base;
1078 writel_relaxed(save->skcr, base + SA1111_SKCR);
1079 writel_relaxed(save->skpcr, base + SA1111_SKPCR);
1080 writel_relaxed(save->skcdr, base + SA1111_SKCDR);
1081 writel_relaxed(save->skaud, base + SA1111_SKAUD);
1082 writel_relaxed(save->skpwm0, base + SA1111_SKPWM0);
1083 writel_relaxed(save->skpwm1, base + SA1111_SKPWM1);
1085 base = sachip->base + SA1111_INTC;
1086 writel_relaxed(save->intpol0, base + SA1111_INTPOL0);
1087 writel_relaxed(save->intpol1, base + SA1111_INTPOL1);
1088 writel_relaxed(save->inten0, base + SA1111_INTEN0);
1089 writel_relaxed(save->inten1, base + SA1111_INTEN1);
1090 writel_relaxed(save->wakepol0, base + SA1111_WAKEPOL0);
1091 writel_relaxed(save->wakepol1, base + SA1111_WAKEPOL1);
1092 writel_relaxed(save->wakeen0, base + SA1111_WAKEEN0);
1093 writel_relaxed(save->wakeen1, base + SA1111_WAKEEN1);
1095 spin_unlock_irqrestore(&sachip->lock, flags);
1097 sachip->saved_state = NULL;
1104 #define sa1111_suspend_noirq NULL
1105 #define sa1111_resume_noirq NULL
1108 static int sa1111_probe(struct platform_device *pdev)
1110 struct resource *mem;
1113 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1116 irq = platform_get_irq(pdev, 0);
1120 return __sa1111_probe(&pdev->dev, mem, irq);
1123 static int sa1111_remove(struct platform_device *pdev)
1125 struct sa1111 *sachip = platform_get_drvdata(pdev);
1129 kfree(sachip->saved_state);
1130 sachip->saved_state = NULL;
1132 __sa1111_remove(sachip);
1133 platform_set_drvdata(pdev, NULL);
1139 static struct dev_pm_ops sa1111_pm_ops = {
1140 .suspend_noirq = sa1111_suspend_noirq,
1141 .resume_noirq = sa1111_resume_noirq,
1145 * Not sure if this should be on the system bus or not yet.
1146 * We really want some way to register a system device at
1147 * the per-machine level, and then have this driver pick
1148 * up the registered devices.
1150 * We also need to handle the SDRAM configuration for
1151 * PXA250/SA1110 machine classes.
1153 static struct platform_driver sa1111_device_driver = {
1154 .probe = sa1111_probe,
1155 .remove = sa1111_remove,
1158 .pm = &sa1111_pm_ops,
1163 * Get the parent device driver (us) structure
1164 * from a child function device
1166 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1168 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1172 * The bits in the opdiv field are non-linear.
1174 static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1176 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1178 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1180 skcdr = readl_relaxed(sachip->base + SA1111_SKCDR);
1182 fbdiv = (skcdr & 0x007f) + 2;
1183 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1184 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1186 return 3686400 * fbdiv / (ipdiv * opdiv);
1190 * sa1111_pll_clock - return the current PLL clock frequency.
1191 * @sadev: SA1111 function block
1193 * BUG: we should look at SKCR. We also blindly believe that
1194 * the chip is being fed with the 3.6864MHz clock.
1196 * Returns the PLL clock in Hz.
1198 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1200 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1202 return __sa1111_pll_clock(sachip);
1204 EXPORT_SYMBOL(sa1111_pll_clock);
1207 * sa1111_select_audio_mode - select I2S or AC link mode
1208 * @sadev: SA1111 function block
1209 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1211 * Frob the SKCR to select AC Link mode or I2S mode for
1214 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1216 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1217 unsigned long flags;
1220 spin_lock_irqsave(&sachip->lock, flags);
1222 val = readl_relaxed(sachip->base + SA1111_SKCR);
1223 if (mode == SA1111_AUDIO_I2S) {
1228 writel_relaxed(val, sachip->base + SA1111_SKCR);
1230 spin_unlock_irqrestore(&sachip->lock, flags);
1232 EXPORT_SYMBOL(sa1111_select_audio_mode);
1235 * sa1111_set_audio_rate - set the audio sample rate
1236 * @sadev: SA1111 SAC function block
1237 * @rate: sample rate to select
1239 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1241 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1244 if (sadev->devid != SA1111_DEVID_SAC)
1247 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1253 writel_relaxed(div - 1, sachip->base + SA1111_SKAUD);
1257 EXPORT_SYMBOL(sa1111_set_audio_rate);
1260 * sa1111_get_audio_rate - get the audio sample rate
1261 * @sadev: SA1111 SAC function block device
1263 int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1265 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1268 if (sadev->devid != SA1111_DEVID_SAC)
1271 div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1;
1273 return __sa1111_pll_clock(sachip) / (256 * div);
1275 EXPORT_SYMBOL(sa1111_get_audio_rate);
1278 * Individual device operations.
1282 * sa1111_enable_device - enable an on-chip SA1111 function block
1283 * @sadev: SA1111 function block device to enable
1285 int sa1111_enable_device(struct sa1111_dev *sadev)
1287 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1288 unsigned long flags;
1292 if (sachip->pdata && sachip->pdata->enable)
1293 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1296 spin_lock_irqsave(&sachip->lock, flags);
1297 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1298 writel_relaxed(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1299 spin_unlock_irqrestore(&sachip->lock, flags);
1303 EXPORT_SYMBOL(sa1111_enable_device);
1306 * sa1111_disable_device - disable an on-chip SA1111 function block
1307 * @sadev: SA1111 function block device to disable
1309 void sa1111_disable_device(struct sa1111_dev *sadev)
1311 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1312 unsigned long flags;
1315 spin_lock_irqsave(&sachip->lock, flags);
1316 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1317 writel_relaxed(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1318 spin_unlock_irqrestore(&sachip->lock, flags);
1320 if (sachip->pdata && sachip->pdata->disable)
1321 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1323 EXPORT_SYMBOL(sa1111_disable_device);
1325 int sa1111_get_irq(struct sa1111_dev *sadev, unsigned num)
1327 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1328 if (num >= ARRAY_SIZE(sadev->hwirq))
1330 return sa1111_map_irq(sachip, sadev->hwirq[num]);
1332 EXPORT_SYMBOL_GPL(sa1111_get_irq);
1335 * SA1111 "Register Access Bus."
1337 * We model this as a regular bus type, and hang devices directly
1340 static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1342 struct sa1111_dev *dev = to_sa1111_device(_dev);
1343 struct sa1111_driver *drv = SA1111_DRV(_drv);
1345 return !!(dev->devid & drv->devid);
1348 static int sa1111_bus_probe(struct device *dev)
1350 struct sa1111_dev *sadev = to_sa1111_device(dev);
1351 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1355 ret = drv->probe(sadev);
1359 static void sa1111_bus_remove(struct device *dev)
1361 struct sa1111_dev *sadev = to_sa1111_device(dev);
1362 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1368 struct bus_type sa1111_bus_type = {
1369 .name = "sa1111-rab",
1370 .match = sa1111_match,
1371 .probe = sa1111_bus_probe,
1372 .remove = sa1111_bus_remove,
1374 EXPORT_SYMBOL(sa1111_bus_type);
1376 int sa1111_driver_register(struct sa1111_driver *driver)
1378 driver->drv.bus = &sa1111_bus_type;
1379 return driver_register(&driver->drv);
1381 EXPORT_SYMBOL(sa1111_driver_register);
1383 void sa1111_driver_unregister(struct sa1111_driver *driver)
1385 driver_unregister(&driver->drv);
1387 EXPORT_SYMBOL(sa1111_driver_unregister);
1389 #ifdef CONFIG_DMABOUNCE
1391 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
1392 * Chip Specification Update" (June 2000), erratum #7, there is a
1393 * significant bug in the SA1111 SDRAM shared memory controller. If
1394 * an access to a region of memory above 1MB relative to the bank base,
1395 * it is important that address bit 10 _NOT_ be asserted. Depending
1396 * on the configuration of the RAM, bit 10 may correspond to one
1397 * of several different (processor-relative) address bits.
1399 * This routine only identifies whether or not a given DMA address
1400 * is susceptible to the bug.
1402 * This should only get called for sa1111_device types due to the
1403 * way we configure our device dma_masks.
1405 static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
1408 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
1409 * User's Guide" mentions that jumpers R51 and R52 control the
1410 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
1411 * SDRAM bank 1 on Neponset). The default configuration selects
1412 * Assabet, so any address in bank 1 is necessarily invalid.
1414 return (machine_is_assabet() || machine_is_pfs168()) &&
1415 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
1418 static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
1421 struct sa1111_dev *dev = to_sa1111_device(data);
1424 case BUS_NOTIFY_ADD_DEVICE:
1425 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
1426 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
1427 sa1111_needs_bounce);
1429 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
1433 case BUS_NOTIFY_DEL_DEVICE:
1434 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
1435 dmabounce_unregister_dev(&dev->dev);
1441 static struct notifier_block sa1111_bus_notifier = {
1442 .notifier_call = sa1111_notifier_call,
1446 static int __init sa1111_init(void)
1448 int ret = bus_register(&sa1111_bus_type);
1449 #ifdef CONFIG_DMABOUNCE
1451 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1454 platform_driver_register(&sa1111_device_driver);
1458 static void __exit sa1111_exit(void)
1460 platform_driver_unregister(&sa1111_device_driver);
1461 #ifdef CONFIG_DMABOUNCE
1462 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1464 bus_unregister(&sa1111_bus_type);
1467 subsys_initcall(sa1111_init);
1468 module_exit(sa1111_exit);
1470 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1471 MODULE_LICENSE("GPL");