arch/arm/boot/dts/zynq-zturn-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
   4  *  Copyright (C) 2017 Alexander Graf <agraf@suse.de>
   5  *
   6  *  Based on zynq-zed.dts which is:
   7  *  Copyright (C) 2011 - 2014 Xilinx
   8  *  Copyright (C) 2012 National Instruments Corp.
   9  *
  10  */
  11
  12 /dts-v1/;
  13 /include/ "zynq-7000.dtsi"
  14
  15 / {
  16         compatible = "xlnx,zynq-7000";
  17
  18         aliases {
  19                 ethernet0 = &gem0;
  20                 serial0 = &uart1;
  21                 serial1 = &uart0;
  22                 mmc0 = &sdhci0;
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x0 0x40000000>;
  28         };
  29
  30         chosen {
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         gpio-leds {
  35                 compatible = "gpio-leds";
  36                 usr-led1 {
  37                         label = "usr-led1";
  38                         gpios = <&gpio0 0x0 0x1>;
  39                         default-state = "off";
  40                 };
  41
  42                 usr-led2 {
  43                         label = "usr-led2";
  44                         gpios = <&gpio0 0x9 0x1>;
  45                         default-state = "off";
  46                 };
  47         };
  48
  49         gpio-keys {
  50                 compatible = "gpio-keys";
  51                 autorepeat;
  52                 K1 {
  53                         label = "K1";
  54                         gpios = <&gpio0 0x32 0x1>;
  55                         linux,code = <0x66>;
  56                         wakeup-source;
  57                         autorepeat;
  58                 };
  59         };
  60 };
  61
  62 &clkc {
  63         ps-clk-frequency = <33333333>;
  64 };
  65
  66 &gem0 {
  67         status = "okay";
  68         phy-mode = "rgmii-id";
  69         phy-handle = <&ethernet_phy>;
  70
  71         ethernet_phy: ethernet-phy@0 {
  72         };
  73 };
  74
  75 &sdhci0 {
  76         status = "okay";
  77 };
  78
  79 &uart0 {
  80         status = "okay";
  81 };
  82
  83 &uart1 {
  84         status = "okay";
  85 };
  86
  87 &usb0 {
  88         status = "okay";
  89         dr_mode = "host";
  90 };
  91
  92 &can0 {
  93         status = "okay";
  94 };
  95
  96 &i2c0 {
  97         status = "okay";
  98         clock-frequency = <400000>;
  99
 100         stlm75@49 {
 101                 status = "okay";
 102                 compatible = "lm75";
 103                 reg = <0x49>;
 104         };
 105
 106         accelerometer@53 {
 107                 compatible = "adi,adxl345";
 108                 reg = <0x53>;
 109                 interrupt-parent = <&intc>;
 110                 interrupts = <0x0 0x1e 0x4>;
 111         };
 112 };