Merge tag 'linux-kselftest-kunit-5.15-rc1' of git://git.kernel.org/pub/scm/linux...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / tegra30-asus-nexus7-grouper-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/power/summit,smb347-charger.h>
6 #include <dt-bindings/thermal/thermal.h>
7
8 #include "tegra30.dtsi"
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11
12 / {
13         aliases {
14                 mmc0 = &sdmmc4; /* eMMC */
15                 mmc1 = &sdmmc3; /* WiFi */
16
17                 rtc0 = &pmic;
18                 rtc1 = "/rtc@7000e000";
19
20                 serial1 = &uartc; /* Bluetooth */
21                 serial2 = &uartb; /* GPS */
22         };
23
24         /*
25          * The decompressor and also some bootloaders rely on a
26          * pre-existing /chosen node to be available to insert the
27          * command line and merge other ATAGS info.
28          */
29         chosen {};
30
31         memory@80000000 {
32                 reg = <0x80000000 0x40000000>;
33         };
34
35         reserved-memory {
36                 #address-cells = <1>;
37                 #size-cells = <1>;
38                 ranges;
39
40                 linux,cma@80000000 {
41                         compatible = "shared-dma-pool";
42                         alloc-ranges = <0x80000000 0x30000000>;
43                         size = <0x10000000>; /* 256MiB */
44                         linux,cma-default;
45                         reusable;
46                 };
47
48                 ramoops@bfdf0000 {
49                         compatible = "ramoops";
50                         reg = <0xbfdf0000 0x10000>;     /* 64kB */
51                         console-size = <0x8000>;        /* 32kB */
52                         record-size = <0x400>;          /*  1kB */
53                         ecc-size = <16>;
54                 };
55
56                 trustzone@bfe00000 {
57                         reg = <0xbfe00000 0x200000>;
58                         no-map;
59                 };
60         };
61
62         host1x@50000000 {
63                 dc@54200000 {
64                         rgb {
65                                 status = "okay";
66
67                                 port@0 {
68                                         lcd_output: endpoint {
69                                                 remote-endpoint = <&lvds_encoder_input>;
70                                                 bus-width = <24>;
71                                         };
72                                 };
73                         };
74                 };
75         };
76
77         gpio@6000d000 {
78                 init-mode-hog {
79                         gpio-hog;
80                         gpios = <TEGRA_GPIO(DD, 7) GPIO_ACTIVE_HIGH>,
81                                 <TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>,
82                                 <TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
83                         output-low;
84                 };
85
86                 init-low-power-mode-hog {
87                         gpio-hog;
88                         gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
89                         input;
90                 };
91         };
92
93         pinmux@70000868 {
94                 pinctrl-names = "default";
95                 pinctrl-0 = <&state_default>;
96
97                 state_default: pinmux {
98                         clk_32k_out_pa0 {
99                                 nvidia,pins = "clk_32k_out_pa0";
100                                 nvidia,function = "blink";
101                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
103                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
104                         };
105                         uart3_cts_n_pa1 {
106                                 nvidia,pins = "uart3_cts_n_pa1",
107                                                 "uart3_rxd_pw7";
108                                 nvidia,function = "uartc";
109                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
111                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112                         };
113                         dap2_fs_pa2 {
114                                 nvidia,pins = "dap2_fs_pa2",
115                                                 "dap2_sclk_pa3",
116                                                 "dap2_din_pa4",
117                                                 "dap2_dout_pa5";
118                                 nvidia,function = "i2s1";
119                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
120                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
121                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
122                         };
123                         sdmmc3_clk_pa6 {
124                                 nvidia,pins = "sdmmc3_clk_pa6";
125                                 nvidia,function = "sdmmc3";
126                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
127                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
128                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
129                         };
130                         sdmmc3_cmd_pa7 {
131                                 nvidia,pins = "sdmmc3_cmd_pa7",
132                                                 "sdmmc3_dat3_pb4",
133                                                 "sdmmc3_dat2_pb5",
134                                                 "sdmmc3_dat1_pb6",
135                                                 "sdmmc3_dat0_pb7",
136                                                 "sdmmc3_dat4_pd1",
137                                                 "sdmmc3_dat6_pd3",
138                                                 "sdmmc3_dat7_pd4";
139                                 nvidia,function = "sdmmc3";
140                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
141                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
142                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
143                         };
144                         gmi_a17_pb0 {
145                                 nvidia,pins = "gmi_a17_pb0",
146                                                 "gmi_a18_pb1";
147                                 nvidia,function = "uartd";
148                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
149                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
150                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
151                         };
152                         lcd_pwr0_pb2 {
153                                 nvidia,pins = "lcd_pwr0_pb2",
154                                                 "lcd_pwr1_pc1",
155                                                 "lcd_m1_pw1";
156                                 nvidia,function = "displaya";
157                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
158                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
160                         };
161                         lcd_pclk_pb3 {
162                                 nvidia,pins = "lcd_pclk_pb3",
163                                                 "lcd_d0_pe0",
164                                                 "lcd_d1_pe1",
165                                                 "lcd_d2_pe2",
166                                                 "lcd_d3_pe3",
167                                                 "lcd_d4_pe4",
168                                                 "lcd_d5_pe5",
169                                                 "lcd_d6_pe6",
170                                                 "lcd_d7_pe7",
171                                                 "lcd_d8_pf0",
172                                                 "lcd_d9_pf1",
173                                                 "lcd_d10_pf2",
174                                                 "lcd_d11_pf3",
175                                                 "lcd_d12_pf4",
176                                                 "lcd_d13_pf5",
177                                                 "lcd_d14_pf6",
178                                                 "lcd_d15_pf7",
179                                                 "lcd_de_pj1",
180                                                 "lcd_hsync_pj3",
181                                                 "lcd_vsync_pj4",
182                                                 "lcd_d16_pm0",
183                                                 "lcd_d17_pm1",
184                                                 "lcd_d18_pm2",
185                                                 "lcd_d19_pm3",
186                                                 "lcd_d20_pm4",
187                                                 "lcd_d21_pm5",
188                                                 "lcd_d22_pm6",
189                                                 "lcd_d23_pm7",
190                                                 "lcd_cs0_n_pn4",
191                                                 "lcd_sdout_pn5",
192                                                 "lcd_dc0_pn6",
193                                                 "lcd_cs1_n_pw0",
194                                                 "lcd_sdin_pz2",
195                                                 "lcd_sck_pz4";
196                                 nvidia,function = "displaya";
197                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
198                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
199                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
200                         };
201                         uart3_rts_n_pc0 {
202                                 nvidia,pins = "uart3_rts_n_pc0",
203                                                 "uart3_txd_pw6";
204                                 nvidia,function = "uartc";
205                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
207                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
208                         };
209                         uart2_txd_pc2 {
210                                 nvidia,pins = "uart2_txd_pc2",
211                                                 "uart2_rts_n_pj6";
212                                 nvidia,function = "uartb";
213                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
216                         };
217                         uart2_rxd_pc3 {
218                                 nvidia,pins = "uart2_rxd_pc3",
219                                                 "uart2_cts_n_pj5";
220                                 nvidia,function = "uartb";
221                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
223                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
224                         };
225                         gen1_i2c_scl_pc4 {
226                                 nvidia,pins = "gen1_i2c_scl_pc4",
227                                                 "gen1_i2c_sda_pc5";
228                                 nvidia,function = "i2c1";
229                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
230                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
231                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
232                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
233                         };
234                         gmi_wp_n_pc7 {
235                                 nvidia,pins = "gmi_wp_n_pc7",
236                                                 "gmi_wait_pi7",
237                                                 "gmi_cs4_n_pk2",
238                                                 "gmi_cs3_n_pk4";
239                                 nvidia,function = "rsvd1";
240                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
242                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
243                         };
244                         gmi_ad12_ph4 {
245                                 nvidia,pins = "gmi_ad12_ph4",
246                                                 "gmi_cs0_n_pj0",
247                                                 "gmi_cs1_n_pj2",
248                                                 "gmi_cs2_n_pk3";
249                                 nvidia,function = "rsvd1";
250                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
251                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
252                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
253                         };
254                         sdmmc3_dat5_pd0 {
255                                 nvidia,pins = "sdmmc3_dat5_pd0";
256                                 nvidia,function = "sdmmc3";
257                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
259                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
260                         };
261                         gmi_ad0_pg0 {
262                                 nvidia,pins = "gmi_ad0_pg0",
263                                                 "gmi_ad1_pg1",
264                                                 "gmi_ad14_ph6",
265                                                 "pu1";
266                                 nvidia,function = "rsvd1";
267                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
270                         };
271                         gmi_ad2_pg2 {
272                                 nvidia,pins = "gmi_ad2_pg2",
273                                                 "gmi_ad3_pg3",
274                                                 "gmi_ad6_pg6",
275                                                 "gmi_ad7_pg7";
276                                 nvidia,function = "rsvd1";
277                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
278                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
279                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
280                         };
281                         gmi_ad4_pg4 {
282                                 nvidia,pins = "gmi_ad4_pg4",
283                                                 "gmi_ad5_pg5";
284                                 nvidia,function = "nand";
285                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
286                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
287                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
288                         };
289                         gmi_ad8_ph0 {
290                                 nvidia,pins = "gmi_ad8_ph0";
291                                 nvidia,function = "pwm0";
292                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
293                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
294                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
295                         };
296                         gmi_ad9_ph1 {
297                                 nvidia,pins = "gmi_ad9_ph1";
298                                 nvidia,function = "rsvd4";
299                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
300                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
301                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
302                         };
303                         gmi_ad10_ph2 {
304                                 nvidia,pins = "gmi_ad10_ph2";
305                                 nvidia,function = "pwm2";
306                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
308                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
309                         };
310                         gmi_ad11_ph3 {
311                                 nvidia,pins = "gmi_ad11_ph3";
312                                 nvidia,function = "pwm3";
313                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
314                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
315                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316                         };
317                         gmi_ad13_ph5 {
318                                 nvidia,pins = "gmi_ad13_ph5",
319                                                 "gmi_wr_n_pi0",
320                                                 "gmi_oe_n_pi1",
321                                                 "gmi_adv_n_pk0";
322                                 nvidia,function = "rsvd1";
323                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
324                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
325                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
326                         };
327                         gmi_ad15_ph7 {
328                                 nvidia,pins = "gmi_ad15_ph7";
329                                 nvidia,function = "rsvd1";
330                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
331                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
332                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
333                         };
334                         gmi_dqs_pi2 {
335                                 nvidia,pins = "gmi_dqs_pi2",
336                                                 "pu2",
337                                                 "pv1";
338                                 nvidia,function = "rsvd1";
339                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
341                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
342                         };
343                         gmi_rst_n_pi4 {
344                                 nvidia,pins = "gmi_rst_n_pi4";
345                                 nvidia,function = "nand";
346                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
347                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
348                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
349                         };
350                         gmi_iordy_pi5 {
351                                 nvidia,pins = "gmi_iordy_pi5";
352                                 nvidia,function = "rsvd1";
353                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
354                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
355                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
356                         };
357                         gmi_cs7_n_pi6 {
358                                 nvidia,pins = "gmi_cs7_n_pi6",
359                                                 "gmi_clk_pk1";
360                                 nvidia,function = "nand";
361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
363                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
364                         };
365                         gmi_a16_pj7 {
366                                 nvidia,pins = "gmi_a16_pj7",
367                                                 "gmi_a19_pk7";
368                                 nvidia,function = "uartd";
369                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
370                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
371                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
372                         };
373                         spdif_out_pk5 {
374                                 nvidia,pins = "spdif_out_pk5";
375                                 nvidia,function = "spdif";
376                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
377                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
378                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
379                         };
380                         spdif_in_pk6 {
381                                 nvidia,pins = "spdif_in_pk6";
382                                 nvidia,function = "spdif";
383                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
385                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
386                         };
387                         dap1_fs_pn0 {
388                                 nvidia,pins = "dap1_fs_pn0",
389                                                 "dap1_din_pn1",
390                                                 "dap1_dout_pn2",
391                                                 "dap1_sclk_pn3";
392                                 nvidia,function = "i2s0";
393                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
395                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
396                         };
397                         hdmi_int_pn7 {
398                                 nvidia,pins = "hdmi_int_pn7";
399                                 nvidia,function = "hdmi";
400                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
401                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
402                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
403                         };
404                         ulpi_data7_po0 {
405                                 nvidia,pins = "ulpi_data7_po0";
406                                 nvidia,function = "uarta";
407                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
408                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
409                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
410                         };
411                         ulpi_data3_po4 {
412                                 nvidia,pins = "ulpi_data3_po4";
413                                 nvidia,function = "ulpi";
414                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
415                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
416                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
417                         };
418                         dap3_fs_pp0 {
419                                 nvidia,pins = "dap3_fs_pp0";
420                                 nvidia,function = "i2s2";
421                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
422                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
423                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
424                         };
425                         dap4_fs_pp4 {
426                                 nvidia,pins = "dap4_fs_pp4",
427                                                 "dap4_din_pp5",
428                                                 "dap4_dout_pp6",
429                                                 "dap4_sclk_pp7";
430                                 nvidia,function = "i2s3";
431                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
432                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
433                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
434                         };
435                         kb_col0_pq0 {
436                                 nvidia,pins = "kb_col0_pq0",
437                                                 "kb_col1_pq1",
438                                                 "kb_row1_pr1";
439                                 nvidia,function = "kbc";
440                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
441                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
442                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
443                         };
444                         kb_col2_pq2 {
445                                 nvidia,pins = "kb_col2_pq2",
446                                                 "kb_col3_pq3";
447                                 nvidia,function = "rsvd4";
448                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
449                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
450                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
451                         };
452                         kb_col4_pq4 {
453                                 nvidia,pins = "kb_col4_pq4",
454                                                 "kb_col5_pq5",
455                                                 "kb_col7_pq7",
456                                                 "kb_row2_pr2",
457                                                 "kb_row4_pr4",
458                                                 "kb_row5_pr5",
459                                                 "kb_row14_ps6";
460                                 nvidia,function = "kbc";
461                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
462                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
463                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
464                         };
465                         kb_row0_pr0 {
466                                 nvidia,pins = "kb_row0_pr0";
467                                 nvidia,function = "rsvd4";
468                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
469                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
471                         };
472                         kb_row6_pr6 {
473                                 nvidia,pins = "kb_row6_pr6",
474                                                 "kb_row8_ps0",
475                                                 "kb_row9_ps1",
476                                                 "kb_row10_ps2";
477                                 nvidia,function = "kbc";
478                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
479                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
480                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
481                         };
482                         kb_row11_ps3 {
483                                 nvidia,pins = "kb_row11_ps3",
484                                                 "kb_row12_ps4";
485                                 nvidia,function = "kbc";
486                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
487                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
488                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
489                         };
490                         gen2_i2c_scl_pt5 {
491                                 nvidia,pins = "gen2_i2c_scl_pt5",
492                                                 "gen2_i2c_sda_pt6";
493                                 nvidia,function = "i2c2";
494                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
495                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
496                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
497                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
498                         };
499                         sdmmc4_cmd_pt7 {
500                                 nvidia,pins = "sdmmc4_cmd_pt7",
501                                                 "sdmmc4_dat0_paa0",
502                                                 "sdmmc4_dat1_paa1",
503                                                 "sdmmc4_dat2_paa2",
504                                                 "sdmmc4_dat3_paa3",
505                                                 "sdmmc4_dat4_paa4",
506                                                 "sdmmc4_dat5_paa5",
507                                                 "sdmmc4_dat6_paa6",
508                                                 "sdmmc4_dat7_paa7";
509                                 nvidia,function = "sdmmc4";
510                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
511                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
512                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
513                         };
514                         pu0 {
515                                 nvidia,pins = "pu0",
516                                                 "pu6";
517                                 nvidia,function = "rsvd4";
518                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
519                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
520                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
521                         };
522                         jtag_rtck_pu7 {
523                                 nvidia,pins = "jtag_rtck_pu7";
524                                 nvidia,function = "rtck";
525                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
526                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
527                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
528                         };
529                         pv0 {
530                                 nvidia,pins = "pv0";
531                                 nvidia,function = "rsvd1";
532                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
533                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
534                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
535                         };
536                         ddc_scl_pv4 {
537                                 nvidia,pins = "ddc_scl_pv4",
538                                                 "ddc_sda_pv5";
539                                 nvidia,function = "i2c4";
540                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
541                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
542                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
543                         };
544                         crt_hsync_pv6 {
545                                 nvidia,pins = "crt_hsync_pv6",
546                                                 "crt_vsync_pv7";
547                                 nvidia,function = "crt";
548                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
549                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
550                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
551                         };
552                         spi2_cs1_n_pw2 {
553                                 nvidia,pins = "spi2_cs1_n_pw2",
554                                                 "spi2_miso_px1",
555                                                 "spi2_sck_px2";
556                                 nvidia,function = "spi2";
557                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
558                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
559                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
560                         };
561                         clk1_out_pw4 {
562                                 nvidia,pins = "clk1_out_pw4";
563                                 nvidia,function = "extperiph1";
564                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
565                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
566                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
567                         };
568                         clk2_out_pw5 {
569                                 nvidia,pins = "clk2_out_pw5";
570                                 nvidia,function = "extperiph2";
571                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
572                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
573                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
574                         };
575                         spi2_cs0_n_px3 {
576                                 nvidia,pins = "spi2_cs0_n_px3";
577                                 nvidia,function = "spi6";
578                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
579                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
580                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
581                         };
582                         spi1_mosi_px4 {
583                                 nvidia,pins = "spi1_mosi_px4",
584                                                 "spi1_cs0_n_px6";
585                                 nvidia,function = "spi1";
586                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
587                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
588                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
589                         };
590                         ulpi_clk_py0 {
591                                 nvidia,pins = "ulpi_clk_py0",
592                                                 "ulpi_dir_py1";
593                                 nvidia,function = "ulpi";
594                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
595                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
596                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
597                         };
598                         sdmmc1_dat3_py4 {
599                                 nvidia,pins = "sdmmc1_dat3_py4",
600                                                 "sdmmc1_dat2_py5",
601                                                 "sdmmc1_dat1_py6",
602                                                 "sdmmc1_dat0_py7",
603                                                 "sdmmc1_cmd_pz1";
604                                 nvidia,function = "sdmmc1";
605                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
606                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
607                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
608                         };
609                         sdmmc1_clk_pz0 {
610                                 nvidia,pins = "sdmmc1_clk_pz0";
611                                 nvidia,function = "sdmmc1";
612                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
614                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
615                         };
616                         lcd_wr_n_pz3 {
617                                 nvidia,pins = "lcd_wr_n_pz3";
618                                 nvidia,function = "displaya";
619                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
620                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
621                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
622                         };
623                         sys_clk_req_pz5 {
624                                 nvidia,pins = "sys_clk_req_pz5";
625                                 nvidia,function = "sysclk";
626                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
627                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
628                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
629                         };
630                         pwr_i2c_scl_pz6 {
631                                 nvidia,pins = "pwr_i2c_scl_pz6",
632                                                 "pwr_i2c_sda_pz7";
633                                 nvidia,function = "i2cpwr";
634                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
635                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
636                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
637                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
638                         };
639                         pbb0 {
640                                 nvidia,pins = "pbb0",
641                                                 "pcc1";
642                                 nvidia,function = "rsvd2";
643                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
644                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
645                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
646                         };
647                         cam_i2c_scl_pbb1 {
648                                 nvidia,pins = "cam_i2c_scl_pbb1",
649                                                 "cam_i2c_sda_pbb2";
650                                 nvidia,function = "i2c3";
651                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
653                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
655                         };
656                         pbb3 {
657                                 nvidia,pins = "pbb3";
658                                 nvidia,function = "vgp3";
659                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
660                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
661                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
662                         };
663                         pbb4 {
664                                 nvidia,pins = "pbb4";
665                                 nvidia,function = "vgp4";
666                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
667                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
668                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
669                         };
670                         pbb5 {
671                                 nvidia,pins = "pbb5";
672                                 nvidia,function = "vgp5";
673                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
674                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
675                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
676                         };
677                         pbb6 {
678                                 nvidia,pins = "pbb6";
679                                 nvidia,function = "vgp6";
680                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
681                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
682                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
683                         };
684                         pbb7 {
685                                 nvidia,pins = "pbb7",
686                                                 "pcc2";
687                                 nvidia,function = "i2s4";
688                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
689                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
690                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
691                         };
692                         cam_mclk_pcc0 {
693                                 nvidia,pins = "cam_mclk_pcc0";
694                                 nvidia,function = "vi_alt3";
695                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
696                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
697                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
698                         };
699                         sdmmc4_rst_n_pcc3 {
700                                 nvidia,pins = "sdmmc4_rst_n_pcc3";
701                                 nvidia,function = "rsvd2";
702                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
703                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
704                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
705                         };
706                         sdmmc4_clk_pcc4 {
707                                 nvidia,pins = "sdmmc4_clk_pcc4";
708                                 nvidia,function = "sdmmc4";
709                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
710                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
711                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
712                         };
713                         clk2_req_pcc5 {
714                                 nvidia,pins = "clk2_req_pcc5";
715                                 nvidia,function = "dap";
716                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
717                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
718                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
719                         };
720                         pex_l2_rst_n_pcc6 {
721                                 nvidia,pins = "pex_l2_rst_n_pcc6",
722                                                 "pex_l2_clkreq_n_pcc7";
723                                 nvidia,function = "pcie";
724                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
725                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
726                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
727                         };
728                         pex_wake_n_pdd3 {
729                                 nvidia,pins = "pex_wake_n_pdd3",
730                                                 "pex_l2_prsnt_n_pdd7";
731                                 nvidia,function = "pcie";
732                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
733                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
734                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
735                         };
736                         clk3_out_pee0 {
737                                 nvidia,pins = "clk3_out_pee0";
738                                 nvidia,function = "extperiph3";
739                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
740                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
741                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
742                         };
743                         clk1_req_pee2 {
744                                 nvidia,pins = "clk1_req_pee2";
745                                 nvidia,function = "dap";
746                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
747                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
748                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
749                         };
750                         hdmi_cec_pee3 {
751                                 nvidia,pins = "hdmi_cec_pee3";
752                                 nvidia,function = "cec";
753                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
754                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
755                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
756                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
757                         };
758                         owr {
759                                 nvidia,pins = "owr";
760                                 nvidia,function = "owr";
761                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
762                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
763                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
764                         };
765                         drive_dap1 {
766                                 nvidia,pins = "drive_dap1",
767                                                 "drive_dap2",
768                                                 "drive_dbg",
769                                                 "drive_at5",
770                                                 "drive_gme",
771                                                 "drive_ddc",
772                                                 "drive_ao1",
773                                                 "drive_uart3";
774                                 nvidia,high-speed-mode = <0>;
775                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
776                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
777                                 nvidia,pull-down-strength = <31>;
778                                 nvidia,pull-up-strength = <31>;
779                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
780                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
781                         };
782                         drive_sdio1 {
783                                 nvidia,pins = "drive_sdio1",
784                                                 "drive_sdio3";
785                                 nvidia,high-speed-mode = <0>;
786                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
787                                 nvidia,pull-down-strength = <46>;
788                                 nvidia,pull-up-strength = <42>;
789                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
790                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
791                         };
792                         drive_gma {
793                                 nvidia,pins = "drive_gma",
794                                                 "drive_gmb",
795                                                 "drive_gmc",
796                                                 "drive_gmd";
797                                 nvidia,pull-down-strength = <9>;
798                                 nvidia,pull-up-strength = <9>;
799                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
800                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
801                         };
802                 };
803         };
804
805         uartb: serial@70006040 {
806                 compatible = "nvidia,tegra30-hsuart";
807                 /* GPS BCM4751 */
808         };
809
810         uartc: serial@70006200 {
811                 compatible = "nvidia,tegra30-hsuart";
812                 status = "okay";
813
814                 nvidia,adjust-baud-rates = <0 9600 100>,
815                                            <9600 115200 200>,
816                                            <1000000 4000000 136>;
817
818                 /* Azurewave AW-NH665 BCM4330B1 */
819                 bluetooth {
820                         compatible = "brcm,bcm4330-bt";
821
822                         max-speed = <4000000>;
823
824                         clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
825                         clock-names = "txco";
826
827                         vbat-supply  = <&vdd_3v3_sys>;
828                         vddio-supply = <&vdd_1v8>;
829
830                         device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
831                         host-wakeup-gpios =   <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>;
832                         shutdown-gpios =      <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
833                 };
834         };
835
836         pwm: pwm@7000a000 {
837                 status = "okay";
838         };
839
840         i2c@7000c400 {
841                 clock-frequency = <400000>;
842                 status = "okay";
843
844                 touchscreen@10 {
845                         compatible ="elan,ektf3624";
846                         reg = <0x10>;
847
848                         interrupt-parent = <&gpio>;
849                         interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_LOW>;
850
851                         reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>;
852
853                         vcc33-supply = <&vcc_3v3_ts>;
854                         vccio-supply = <&vcc_3v3_ts>;
855
856                         touchscreen-size-x = <2112>;
857                         touchscreen-size-y = <1280>;
858                         touchscreen-swapped-x-y;
859                         touchscreen-inverted-x;
860                 };
861         };
862
863         i2c@7000c500 {
864                 clock-frequency = <100000>;
865                 status = "okay";
866
867                 compass@e {
868                         compatible = "asahi-kasei,ak8974";
869                         reg = <0x0e>;
870
871                         interrupt-parent = <&gpio>;
872                         interrupts = <TEGRA_GPIO(W, 0) IRQ_TYPE_EDGE_RISING>;
873
874                         avdd-supply = <&vdd_3v3_sys>;
875                         dvdd-supply = <&vdd_1v8>;
876
877                         mount-matrix =   "0", "-1",  "0",
878                                         "-1",  "0",  "0",
879                                          "0",  "0", "-1";
880                 };
881
882                 light-sensor@1c {
883                         compatible = "dynaimage,al3010";
884                         reg = <0x1c>;
885
886                         interrupt-parent = <&gpio>;
887                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
888
889                         vdd-supply = <&vdd_3v3_sys>;
890                 };
891
892                 accelerometer@68 {
893                         compatible = "invensense,mpu6050";
894                         reg = <0x68>;
895
896                         interrupt-parent = <&gpio>;
897                         interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>;
898
899                         vdd-supply   = <&vdd_3v3_sys>;
900                         vddio-supply = <&vdd_1v8>;
901
902                         mount-matrix =   "0", "-1",  "0",
903                                         "-1",  "0",  "0",
904                                          "0",  "0", "-1";
905                 };
906         };
907
908         i2c@7000d000 {
909                 clock-frequency = <100000>;
910                 status = "okay";
911
912                 rt5640: audio-codec@1c {
913                         compatible = "realtek,rt5640";
914                         reg = <0x1c>;
915
916                         realtek,dmic1-data-pin = <1>;
917                 };
918
919                 nct72: temperature-sensor@4c {
920                         compatible = "onnn,nct1008";
921                         reg = <0x4c>;
922                         vcc-supply = <&vdd_3v3_sys>;
923
924                         interrupt-parent = <&gpio>;
925                         interrupts = <TEGRA_GPIO(S, 3) IRQ_TYPE_EDGE_FALLING>;
926
927                         #thermal-sensor-cells = <1>;
928                 };
929
930                 fuel-gauge@55 {
931                         compatible = "ti,bq27541";
932                         reg = <0x55>;
933                         power-supplies = <&power_supply>;
934                 };
935
936                 power_supply: charger@6a {
937                         compatible = "summit,smb347";
938                         reg = <0x6a>;
939
940                         interrupt-parent = <&gpio>;
941                         interrupts = <TEGRA_GPIO(V, 1) IRQ_TYPE_EDGE_BOTH>;
942
943                         summit,enable-charge-control = <SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW>;
944                         summit,enable-usb-charging;
945
946                         monitored-battery = <&battery_cell>;
947                 };
948         };
949
950         pmc@7000e400 {
951                 status = "okay";
952                 nvidia,invert-interrupt;
953                 nvidia,suspend-mode = <1>;
954                 nvidia,cpu-pwr-good-time = <2000>;
955                 nvidia,cpu-pwr-off-time = <200>;
956                 nvidia,core-pwr-good-time = <3845 3845>;
957                 nvidia,core-pwr-off-time = <0>;
958                 nvidia,core-power-req-active-high;
959                 nvidia,sys-clock-req-active-high;
960         };
961
962         ahub@70080000 {
963                 i2s@70080400 {
964                         status = "okay";
965                 };
966         };
967
968         brcm_wifi_pwrseq: wifi-pwrseq {
969                 compatible = "mmc-pwrseq-simple";
970
971                 clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
972                 clock-names = "ext_clock";
973
974                 reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>;
975                 post-power-on-delay-ms = <300>;
976                 power-off-delay-us = <300>;
977         };
978
979         sdmmc3: mmc@78000400 {
980                 status = "okay";
981
982                 #address-cells = <1>;
983                 #size-cells = <0>;
984
985                 assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
986                 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
987                 assigned-clock-rates = <50000000>;
988
989                 max-frequency = <50000000>;
990                 keep-power-in-suspend;
991                 bus-width = <4>;
992                 non-removable;
993
994                 mmc-pwrseq = <&brcm_wifi_pwrseq>;
995                 vmmc-supply = <&vdd_3v3_sys>;
996                 vqmmc-supply = <&vdd_1v8>;
997
998                 /* Azurewave AW-NH665 BCM4330 */
999                 wifi@1 {
1000                         reg = <1>;
1001                         compatible = "brcm,bcm4329-fmac";
1002                         interrupt-parent = <&gpio>;
1003                         interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
1004                         interrupt-names = "host-wake";
1005                 };
1006         };
1007
1008         sdmmc4: mmc@78000600 {
1009                 status = "okay";
1010                 bus-width = <8>;
1011                 vmmc-supply = <&vcore_emmc>;
1012                 vqmmc-supply = <&vdd_1v8>;
1013                 non-removable;
1014         };
1015
1016         usb@7d000000 {
1017                 compatible = "nvidia,tegra30-udc";
1018                 status = "okay";
1019                 dr_mode = "peripheral";
1020         };
1021
1022         usb-phy@7d000000 {
1023                 status = "okay";
1024                 dr_mode = "peripheral";
1025                 nvidia,hssync-start-delay = <0>;
1026                 nvidia,xcvr-lsfslew = <2>;
1027                 nvidia,xcvr-lsrslew = <2>;
1028         };
1029
1030         backlight: backlight {
1031                 compatible = "pwm-backlight";
1032
1033                 power-supply = <&vdd_5v0_sys>;
1034                 pwms = <&pwm 0 50000>;
1035
1036                 brightness-levels = <1 255>;
1037                 num-interpolated-steps = <254>;
1038                 default-brightness-level = <15>;
1039         };
1040
1041         battery_cell: battery-cell {
1042                 compatible = "simple-battery";
1043                 constant-charge-current-max-microamp = <1800000>;
1044                 operating-range-celsius = <0 45>;
1045         };
1046
1047         /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1048         clk32k_in: clock@0 {
1049                 compatible = "fixed-clock";
1050                 #clock-cells = <0>;
1051                 clock-frequency = <32768>;
1052                 clock-output-names = "pmic-oscillator";
1053         };
1054
1055         cpus {
1056                 cpu0: cpu@0 {
1057                         cpu-supply = <&vdd_cpu>;
1058                         operating-points-v2 = <&cpu0_opp_table>;
1059                         #cooling-cells = <2>;
1060                 };
1061
1062                 cpu1: cpu@1 {
1063                         cpu-supply = <&vdd_cpu>;
1064                         operating-points-v2 = <&cpu0_opp_table>;
1065                         #cooling-cells = <2>;
1066                 };
1067
1068                 cpu2: cpu@2 {
1069                         cpu-supply = <&vdd_cpu>;
1070                         operating-points-v2 = <&cpu0_opp_table>;
1071                         #cooling-cells = <2>;
1072                 };
1073
1074                 cpu3: cpu@3 {
1075                         cpu-supply = <&vdd_cpu>;
1076                         operating-points-v2 = <&cpu0_opp_table>;
1077                         #cooling-cells = <2>;
1078                 };
1079         };
1080
1081         display-panel {
1082                 /*
1083                  * Nexus 7 supports two compatible panel models:
1084                  *
1085                  *  1. hydis,hv070wx2-1e0
1086                  *  2. chunghwa,claa070wp03xg
1087                  *
1088                  * We want to use timing which is optimized for Nexus 7,
1089                  * hence we need to customize the timing.
1090                  */
1091                 compatible = "panel-lvds";
1092
1093                 power-supply = <&vdd_pnl>;
1094                 backlight = <&backlight>;
1095
1096                 width-mm = <94>;
1097                 height-mm = <150>;
1098                 rotation = <180>;
1099
1100                 data-mapping = "jeida-24";
1101
1102                 port {
1103                         panel_input: endpoint {
1104                                 remote-endpoint = <&lvds_encoder_output>;
1105                         };
1106                 };
1107         };
1108
1109         firmware {
1110                 trusted-foundations {
1111                         compatible = "tlm,trusted-foundations";
1112                         tlm,version-major = <0x0>;
1113                         tlm,version-minor = <0x0>;
1114                 };
1115         };
1116
1117         gpio-keys {
1118                 compatible = "gpio-keys";
1119
1120                 hall-sensor {
1121                         label = "Lid";
1122                         gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
1123                         linux,input-type = <EV_SW>;
1124                         linux,code = <SW_LID>;
1125                         debounce-interval = <500>;
1126                         wakeup-event-action = <EV_ACT_DEASSERTED>;
1127                         wakeup-source;
1128                 };
1129
1130                 power {
1131                         label = "Power";
1132                         gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
1133                         linux,code = <KEY_POWER>;
1134                         debounce-interval = <10>;
1135                         wakeup-event-action = <EV_ACT_ASSERTED>;
1136                         wakeup-source;
1137                 };
1138
1139                 volume-up {
1140                         label = "Volume Up";
1141                         gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
1142                         linux,code = <KEY_VOLUMEUP>;
1143                         debounce-interval = <10>;
1144                         wakeup-event-action = <EV_ACT_ASSERTED>;
1145                         wakeup-source;
1146                 };
1147
1148                 volume-down {
1149                         label = "Volume Down";
1150                         gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
1151                         linux,code = <KEY_VOLUMEDOWN>;
1152                         debounce-interval = <10>;
1153                         wakeup-event-action = <EV_ACT_ASSERTED>;
1154                         wakeup-source;
1155                 };
1156         };
1157
1158         lvds-encoder {
1159                 compatible = "ti,sn75lvds83", "lvds-encoder";
1160
1161                 powerdown-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
1162                 power-supply = <&vdd_3v3_sys>;
1163
1164                 ports {
1165                         #address-cells = <1>;
1166                         #size-cells = <0>;
1167
1168                         port@0 {
1169                                 reg = <0>;
1170
1171                                 lvds_encoder_input: endpoint {
1172                                         remote-endpoint = <&lcd_output>;
1173                                 };
1174                         };
1175
1176                         port@1 {
1177                                 reg = <1>;
1178
1179                                 lvds_encoder_output: endpoint {
1180                                         remote-endpoint = <&panel_input>;
1181                                 };
1182                         };
1183                 };
1184         };
1185
1186         vdd_5v0_sys: regulator@0 {
1187                 compatible = "regulator-fixed";
1188                 regulator-name = "vdd_5v0";
1189                 regulator-min-microvolt = <5000000>;
1190                 regulator-max-microvolt = <5000000>;
1191                 regulator-always-on;
1192                 regulator-boot-on;
1193         };
1194
1195         vdd_3v3_sys: regulator@1 {
1196                 compatible = "regulator-fixed";
1197                 regulator-name = "vdd_3v3";
1198                 regulator-min-microvolt = <3300000>;
1199                 regulator-max-microvolt = <3300000>;
1200                 regulator-always-on;
1201                 regulator-boot-on;
1202                 vin-supply = <&vdd_5v0_sys>;
1203         };
1204
1205         vdd_pnl: regulator@2 {
1206                 compatible = "regulator-fixed";
1207                 regulator-name = "vdd_panel";
1208                 regulator-min-microvolt = <3300000>;
1209                 regulator-max-microvolt = <3300000>;
1210                 regulator-enable-ramp-delay = <300000>;
1211                 gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>;
1212                 enable-active-high;
1213                 vin-supply = <&vdd_3v3_sys>;
1214         };
1215
1216         vcc_3v3_ts: regulator@3 {
1217                 compatible = "regulator-fixed";
1218                 regulator-name = "ldo_s-1167_3v3";
1219                 regulator-min-microvolt = <3300000>;
1220                 regulator-max-microvolt = <3300000>;
1221                 regulator-always-on;
1222                 regulator-boot-on;
1223                 vin-supply = <&vdd_5v0_sys>;
1224         };
1225
1226         sound {
1227                 compatible = "nvidia,tegra-audio-rt5640-grouper",
1228                              "nvidia,tegra-audio-rt5640";
1229                 nvidia,model = "ASUS Google Nexus 7 ALC5642";
1230
1231                 nvidia,audio-routing =
1232                         "Headphones", "HPOR",
1233                         "Headphones", "HPOL",
1234                         "Speakers", "SPORP",
1235                         "Speakers", "SPORN",
1236                         "Speakers", "SPOLP",
1237                         "Speakers", "SPOLN",
1238                         "DMIC1", "Mic Jack";
1239
1240                 nvidia,i2s-controller = <&tegra_i2s1>;
1241                 nvidia,audio-codec = <&rt5640>;
1242
1243                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1244
1245                 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
1246                          <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1247                          <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1248                 clock-names = "pll_a", "pll_a_out0", "mclk";
1249
1250                 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1251                                   <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1252
1253                 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1254                                          <&tegra_car TEGRA30_CLK_EXTERN1>;
1255         };
1256
1257         thermal-zones {
1258                 /*
1259                  * NCT72 has two sensors:
1260                  *
1261                  *      0: internal that monitors ambient/skin temperature
1262                  *      1: external that is connected to the CPU's diode
1263                  *
1264                  * Ideally we should use userspace thermal governor,
1265                  * but it's a much more complex solution.  The "skin"
1266                  * zone is a simpler solution which prevents Nexus 7
1267                  * from getting too hot from a user's tactile perspective.
1268                  * The CPU zone is intended to protect silicon from damage.
1269                  */
1270
1271                 skin-thermal {
1272                         polling-delay-passive = <1000>; /* milliseconds */
1273                         polling-delay = <5000>; /* milliseconds */
1274
1275                         thermal-sensors = <&nct72 0>;
1276
1277                         trips {
1278                                 trip0: skin-alert {
1279                                         /* throttle at 57C until temperature drops to 56.8C */
1280                                         temperature = <57000>;
1281                                         hysteresis = <200>;
1282                                         type = "passive";
1283                                 };
1284
1285                                 trip1: skin-crit {
1286                                         /* shut down at 65C */
1287                                         temperature = <65000>;
1288                                         hysteresis = <2000>;
1289                                         type = "critical";
1290                                 };
1291                         };
1292
1293                         cooling-maps {
1294                                 map0 {
1295                                         trip = <&trip0>;
1296                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1297                                                          <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1298                                                          <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1299                                                          <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1300                                                          <&actmon THERMAL_NO_LIMIT
1301                                                                   THERMAL_NO_LIMIT>;
1302                                 };
1303                         };
1304                 };
1305
1306                 cpu-thermal {
1307                         polling-delay-passive = <1000>; /* milliseconds */
1308                         polling-delay = <5000>; /* milliseconds */
1309
1310                         thermal-sensors = <&nct72 1>;
1311
1312                         trips {
1313                                 trip2: cpu-alert {
1314                                         /* throttle at 85C until temperature drops to 84.8C */
1315                                         temperature = <85000>;
1316                                         hysteresis = <200>;
1317                                         type = "passive";
1318                                 };
1319
1320                                 trip3: cpu-crit {
1321                                         /* shut down at 90C */
1322                                         temperature = <90000>;
1323                                         hysteresis = <2000>;
1324                                         type = "critical";
1325                                 };
1326                         };
1327
1328                         cooling-maps {
1329                                 map1 {
1330                                         trip = <&trip2>;
1331                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1332                                                          <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1333                                                          <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1334                                                          <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1335                                                          <&actmon THERMAL_NO_LIMIT
1336                                                                   THERMAL_NO_LIMIT>;
1337                                 };
1338                         };
1339                 };
1340         };
1341 };