arch/arm/boot/dts/tegra20-acer-a500-picasso.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/gpio-keys.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/thermal/thermal.h>
   7
   8 #include "tegra20.dtsi"
   9 #include "tegra20-cpu-opp.dtsi"
  10 #include "tegra20-cpu-opp-microvolt.dtsi"
  11
  12 / {
  13         model = "Acer Iconia Tab A500";
  14         compatible = "acer,picasso", "nvidia,tegra20";
  15
  16         aliases {
  17                 mmc0 = &sdmmc4; /* eMMC */
  18                 mmc1 = &sdmmc3; /* MicroSD */
  19                 mmc2 = &sdmmc1; /* WiFi */
  20
  21                 rtc0 = &pmic;
  22                 rtc1 = "/rtc@7000e000";
  23
  24                 serial0 = &uartd; /* Docking station */
  25                 serial1 = &uartc; /* Bluetooth */
  26                 serial2 = &uartb; /* GPS */
  27         };
  28
  29         /*
  30          * The decompressor and also some bootloaders rely on a
  31          * pre-existing /chosen node to be available to insert the
  32          * command line and merge other ATAGS info.
  33          */
  34         chosen {};
  35
  36         memory@0 {
  37                 reg = <0x00000000 0x40000000>;
  38         };
  39
  40         reserved-memory {
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 ranges;
  44
  45                 ramoops@2ffe0000 {
  46                         compatible = "ramoops";
  47                         reg = <0x2ffe0000 0x10000>;     /* 64kB */
  48                         console-size = <0x8000>;        /* 32kB */
  49                         record-size = <0x400>;          /*  1kB */
  50                         ecc-size = <16>;
  51                 };
  52
  53                 linux,cma@30000000 {
  54                         compatible = "shared-dma-pool";
  55                         alloc-ranges = <0x30000000 0x10000000>;
  56                         size = <0x10000000>; /* 256MiB */
  57                         linux,cma-default;
  58                         reusable;
  59                 };
  60         };
  61
  62         host1x@50000000 {
  63                 dc@54200000 {
  64                         rgb {
  65                                 status = "okay";
  66
  67                                 port@0 {
  68                                         lcd_output: endpoint {
  69                                                 remote-endpoint = <&lvds_encoder_input>;
  70                                                 bus-width = <18>;
  71                                         };
  72                                 };
  73                         };
  74                 };
  75
  76                 hdmi@54280000 {
  77                         status = "okay";
  78
  79                         vdd-supply = <&hdmi_vdd_reg>;
  80                         pll-supply = <&hdmi_pll_reg>;
  81                         hdmi-supply = <&vdd_5v0_sys>;
  82
  83                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  84                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  85                                 GPIO_ACTIVE_HIGH>;
  86                 };
  87         };
  88
  89         pinmux@70000014 {
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&state_default>;
  92
  93                 state_default: pinmux {
  94                         ata {
  95                                 nvidia,pins = "ata";
  96                                 nvidia,function = "ide";
  97                         };
  98                         atb {
  99                                 nvidia,pins = "atb", "gma", "gme";
 100                                 nvidia,function = "sdio4";
 101                         };
 102                         atc {
 103                                 nvidia,pins = "atc";
 104                                 nvidia,function = "nand";
 105                         };
 106                         atd {
 107                                 nvidia,pins = "atd", "ate", "gmb", "spia",
 108                                         "spib", "spic";
 109                                 nvidia,function = "gmi";
 110                         };
 111                         cdev1 {
 112                                 nvidia,pins = "cdev1";
 113                                 nvidia,function = "plla_out";
 114                         };
 115                         cdev2 {
 116                                 nvidia,pins = "cdev2";
 117                                 nvidia,function = "pllp_out4";
 118                         };
 119                         crtp {
 120                                 nvidia,pins = "crtp", "lm1";
 121                                 nvidia,function = "crt";
 122                         };
 123                         csus {
 124                                 nvidia,pins = "csus";
 125                                 nvidia,function = "vi_sensor_clk";
 126                         };
 127                         dap1 {
 128                                 nvidia,pins = "dap1";
 129                                 nvidia,function = "dap1";
 130                         };
 131                         dap2 {
 132                                 nvidia,pins = "dap2";
 133                                 nvidia,function = "dap2";
 134                         };
 135                         dap3 {
 136                                 nvidia,pins = "dap3";
 137                                 nvidia,function = "dap3";
 138                         };
 139                         dap4 {
 140                                 nvidia,pins = "dap4";
 141                                 nvidia,function = "dap4";
 142                         };
 143                         dta {
 144                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 145                                 nvidia,function = "vi";
 146                         };
 147                         dtf {
 148                                 nvidia,pins = "dtf";
 149                                 nvidia,function = "i2c3";
 150                         };
 151                         gmc {
 152                                 nvidia,pins = "gmc";
 153                                 nvidia,function = "uartd";
 154                         };
 155                         gmd {
 156                                 nvidia,pins = "gmd";
 157                                 nvidia,function = "sflash";
 158                         };
 159                         gpu {
 160                                 nvidia,pins = "gpu";
 161                                 nvidia,function = "pwm";
 162                         };
 163                         gpu7 {
 164                                 nvidia,pins = "gpu7";
 165                                 nvidia,function = "rtck";
 166                         };
 167                         gpv {
 168                                 nvidia,pins = "gpv", "slxa";
 169                                 nvidia,function = "pcie";
 170                         };
 171                         hdint {
 172                                 nvidia,pins = "hdint";
 173                                 nvidia,function = "hdmi";
 174                         };
 175                         i2cp {
 176                                 nvidia,pins = "i2cp";
 177                                 nvidia,function = "i2cp";
 178                         };
 179                         irrx {
 180                                 nvidia,pins = "irrx", "irtx";
 181                                 nvidia,function = "uartb";
 182                         };
 183                         kbca {
 184                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 185                                         "kbce", "kbcf";
 186                                 nvidia,function = "kbc";
 187                         };
 188                         lcsn {
 189                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 190                                         "lsdi", "lvp0";
 191                                 nvidia,function = "rsvd4";
 192                         };
 193                         ld0 {
 194                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 195                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 196                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 197                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 198                                         "lhp1", "lhp2", "lhs", "lpp", "lsc0",
 199                                         "lsc1", "lsck", "lsda", "lspi", "lvp1",
 200                                         "lvs";
 201                                 nvidia,function = "displaya";
 202                         };
 203                         owc {
 204                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 205                                 nvidia,function = "rsvd2";
 206                         };
 207                         pmc {
 208                                 nvidia,pins = "pmc";
 209                                 nvidia,function = "pwr_on";
 210                         };
 211                         rm {
 212                                 nvidia,pins = "rm";
 213                                 nvidia,function = "i2c1";
 214                         };
 215                         sdb {
 216                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
 217                                 nvidia,function = "sdio3";
 218                         };
 219                         sdio1 {
 220                                 nvidia,pins = "sdio1";
 221                                 nvidia,function = "sdio1";
 222                         };
 223                         slxd {
 224                                 nvidia,pins = "slxd";
 225                                 nvidia,function = "spdif";
 226                         };
 227                         spid {
 228                                 nvidia,pins = "spid", "spie", "spif";
 229                                 nvidia,function = "spi1";
 230                         };
 231                         spig {
 232                                 nvidia,pins = "spig", "spih";
 233                                 nvidia,function = "spi2_alt";
 234                         };
 235                         uaa {
 236                                 nvidia,pins = "uaa", "uab", "uda";
 237                                 nvidia,function = "ulpi";
 238                         };
 239                         uad {
 240                                 nvidia,pins = "uad";
 241                                 nvidia,function = "irda";
 242                         };
 243                         uca {
 244                                 nvidia,pins = "uca", "ucb";
 245                                 nvidia,function = "uartc";
 246                         };
 247                         conf_ata {
 248                                 nvidia,pins = "ata", "atb", "atc", "atd",
 249                                         "cdev1", "cdev2", "csus", "dap1",
 250                                         "dap4", "dte", "dtf", "gma", "gmc",
 251                                         "gme", "gpu", "gpu7", "gpv", "i2cp",
 252                                         "irrx", "irtx", "pta", "rm",
 253                                         "sdc", "sdd", "slxc", "slxd", "slxk",
 254                                         "spdi", "spdo", "uac", "uad", "uda";
 255                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 256                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 257                         };
 258                         conf_ate {
 259                                 nvidia,pins = "ate", "dap2", "dap3",
 260                                         "gmd", "owc", "spia", "spib", "spic",
 261                                         "spid", "spie";
 262                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 263                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 264                         };
 265                         conf_ck32 {
 266                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 267                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 268                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 269                         };
 270                         conf_crtp {
 271                                 nvidia,pins = "crtp", "gmb", "slxa", "spig",
 272                                         "spih";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 274                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 275                         };
 276                         conf_dta {
 277                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
 278                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 279                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 280                         };
 281                         conf_dte {
 282                                 nvidia,pins = "spif";
 283                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 284                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 285                         };
 286                         conf_hdint {
 287                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 288                                         "lpw1", "lsck", "lsda", "lsdi",
 289                                         "lvp0";
 290                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 291                         };
 292                         conf_kbca {
 293                                 nvidia,pins = "kbca", "kbcc", "kbcd",
 294                                         "kbce", "kbcf", "sdio1", "uaa",
 295                                         "uab", "uca", "ucb";
 296                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 297                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 298                         };
 299                         conf_lc {
 300                                 nvidia,pins = "lc", "ls";
 301                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 302                         };
 303                         conf_ld0 {
 304                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 305                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 306                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 307                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 308                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 309                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 310                                         "lvp1", "lvs", "pmc", "sdb";
 311                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 312                         };
 313                         conf_ld17_0 {
 314                                 nvidia,pins = "ld17_0";
 315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 316                         };
 317                         drive_ddc {
 318                                 nvidia,pins = "drive_ddc",
 319                                                 "drive_vi1",
 320                                                 "drive_sdio1";
 321                                 nvidia,pull-up-strength = <31>;
 322                                 nvidia,pull-down-strength = <31>;
 323                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 324                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 325                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 326                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 327                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 328                         };
 329                         drive_dbg {
 330                                 nvidia,pins = "drive_dbg",
 331                                                 "drive_vi2",
 332                                                 "drive_at1",
 333                                                 "drive_ao1";
 334                                 nvidia,pull-up-strength = <31>;
 335                                 nvidia,pull-down-strength = <31>;
 336                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 337                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 338                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 339                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 340                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 341                         };
 342                 };
 343
 344                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 345                         ddc {
 346                                 nvidia,pins = "ddc";
 347                                 nvidia,function = "i2c2";
 348                         };
 349                         pta {
 350                                 nvidia,pins = "pta";
 351                                 nvidia,function = "rsvd4";
 352                         };
 353                 };
 354
 355                 state_i2cmux_pta: pinmux_i2cmux_pta {
 356                         ddc {
 357                                 nvidia,pins = "ddc";
 358                                 nvidia,function = "rsvd4";
 359                         };
 360                         pta {
 361                                 nvidia,pins = "pta";
 362                                 nvidia,function = "i2c2";
 363                         };
 364                 };
 365
 366                 state_i2cmux_idle: pinmux_i2cmux_idle {
 367                         ddc {
 368                                 nvidia,pins = "ddc";
 369                                 nvidia,function = "rsvd4";
 370                         };
 371                         pta {
 372                                 nvidia,pins = "pta";
 373                                 nvidia,function = "rsvd4";
 374                         };
 375                 };
 376         };
 377
 378         tegra_i2s1: i2s@70002800 {
 379                 status = "okay";
 380         };
 381
 382         uartb: serial@70006040 {
 383                 compatible = "nvidia,tegra20-hsuart";
 384                 /* GPS BCM4751 */
 385         };
 386
 387         uartc: serial@70006200 {
 388                 compatible = "nvidia,tegra20-hsuart";
 389                 status = "okay";
 390
 391                 /* Azurewave AW-NH665 BCM4329B1 */
 392                 bluetooth {
 393                         compatible = "brcm,bcm4329-bt";
 394
 395                         /* PLLP 216MHz / 16 / 4 */
 396                         max-speed = <3375000>;
 397
 398                         clocks = <&rtc_32k_wifi>;
 399                         clock-names = "txco";
 400
 401                         vbat-supply  = <&vdd_3v3_sys>;
 402                         vddio-supply = <&vdd_1v8_sys>;
 403
 404                         device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
 405                         host-wakeup-gpios =   <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>;
 406                         shutdown-gpios =      <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
 407                 };
 408         };
 409
 410         uartd: serial@70006300 {
 411                 /* Docking station */
 412         };
 413
 414         i2c@7000c000 {
 415                 clock-frequency = <400000>;
 416                 status = "okay";
 417
 418                 wm8903: audio-codec@1a {
 419                         compatible = "wlf,wm8903";
 420                         reg = <0x1a>;
 421
 422                         interrupt-parent = <&gpio>;
 423                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
 424
 425                         gpio-controller;
 426                         #gpio-cells = <2>;
 427
 428                         micdet-cfg = <0>;
 429                         micdet-delay = <100>;
 430
 431                         gpio-cfg = <
 432                                 0x0000 /* MIC_LR_OUT#    GPIO, output, low */
 433                                 0x0000 /* FM2018-enable  GPIO, output, low */
 434                                 0x0000 /* Speaker-enable GPIO, output, low */
 435                                 0x0200 /* Interrupt, output */
 436                                 0x01a0 /* BCLK, input, active high */
 437                         >;
 438
 439                         AVDD-supply  = <&vdd_1v8_sys>;
 440                         CPVDD-supply = <&vdd_1v8_sys>;
 441                         DBVDD-supply = <&vdd_1v8_sys>;
 442                         DCVDD-supply = <&vdd_1v8_sys>;
 443                 };
 444
 445                 touchscreen@4c {
 446                         compatible = "atmel,maxtouch";
 447                         reg = <0x4c>;
 448
 449                         interrupt-parent = <&gpio>;
 450                         interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
 451
 452                         reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
 453
 454                         vdda-supply = <&vdd_3v3_sys>;
 455                         vdd-supply  = <&vdd_3v3_sys>;
 456
 457                         atmel,wakeup-method = <1>;
 458                 };
 459
 460                 gyroscope@68 {
 461                         compatible = "invensense,mpu3050";
 462                         reg = <0x68>;
 463
 464                         interrupt-parent = <&gpio>;
 465                         interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
 466
 467                         vdd-supply    = <&vdd_3v3_sys>;
 468                         vlogic-supply = <&vdd_1v8_sys>;
 469
 470                         mount-matrix =   "0",  "1",  "0",
 471                                          "1",  "0",  "0",
 472                                          "0",  "0", "-1";
 473
 474                         i2c-gate {
 475                                 #address-cells = <1>;
 476                                 #size-cells = <0>;
 477
 478                                 accelerometer@f {
 479                                         compatible = "kionix,kxtf9";
 480                                         reg = <0x0f>;
 481
 482                                         interrupt-parent = <&gpio>;
 483                                         interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
 484
 485                                         mount-matrix =   "0",  "1",  "0",
 486                                                          "1",  "0",  "0",
 487                                                          "0",  "0", "-1";
 488                                 };
 489                         };
 490                 };
 491         };
 492
 493         i2c@7000c400 {
 494                 clock-frequency = <10000>;
 495                 status = "okay";
 496         };
 497
 498         i2cmux {
 499                 compatible = "i2c-mux-pinctrl";
 500                 #address-cells = <1>;
 501                 #size-cells = <0>;
 502
 503                 i2c-parent = <&{/i2c@7000c400}>;
 504
 505                 pinctrl-names = "ddc", "pta", "idle";
 506                 pinctrl-0 = <&state_i2cmux_ddc>;
 507                 pinctrl-1 = <&state_i2cmux_pta>;
 508                 pinctrl-2 = <&state_i2cmux_idle>;
 509
 510                 hdmi_ddc: i2c@0 {
 511                         reg = <0>;
 512                         #address-cells = <1>;
 513                         #size-cells = <0>;
 514                 };
 515
 516                 panel_ddc: i2c@1 {
 517                         reg = <1>;
 518                         #address-cells = <1>;
 519                         #size-cells = <0>;
 520
 521                         embedded-controller@58 {
 522                                 compatible = "acer,a500-iconia-ec", "ene,kb930";
 523                                 reg = <0x58>;
 524
 525                                 system-power-controller;
 526
 527                                 monitored-battery = <&bat1010>;
 528                                 power-supplies = <&mains>;
 529                         };
 530                 };
 531         };
 532
 533         pwm: pwm@7000a000 {
 534                 status = "okay";
 535         };
 536
 537         i2c@7000d000 {
 538                 clock-frequency = <100000>;
 539                 status = "okay";
 540
 541                 magnetometer@c {
 542                         compatible = "ak,ak8975";
 543                         reg = <0x0c>;
 544
 545                         interrupt-parent = <&gpio>;
 546                         interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
 547
 548                         vdd-supply = <&vdd_3v3_sys>;
 549                         vid-supply = <&vdd_1v8_sys>;
 550
 551                         mount-matrix =  "1",  "0",  "0",
 552                                         "0", "-1",  "0",
 553                                         "0",  "0", "-1";
 554                 };
 555
 556                 pmic: pmic@34 {
 557                         compatible = "ti,tps6586x";
 558                         reg = <0x34>;
 559
 560                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 561
 562                         #gpio-cells = <2>;
 563                         gpio-controller;
 564
 565                         sys-supply       = <&vdd_5v0_sys>;
 566                         vin-sm0-supply   = <&sys_reg>;
 567                         vin-sm1-supply   = <&sys_reg>;
 568                         vin-sm2-supply   = <&sys_reg>;
 569                         vinldo01-supply  = <&sm2_reg>;
 570                         vinldo23-supply  = <&sm2_reg>;
 571                         vinldo4-supply   = <&sm2_reg>;
 572                         vinldo678-supply = <&sm2_reg>;
 573                         vinldo9-supply   = <&sm2_reg>;
 574
 575                         regulators {
 576                                 sys_reg: sys {
 577                                         regulator-name = "vdd_sys";
 578                                         regulator-always-on;
 579                                 };
 580
 581                                 vdd_core: sm0 {
 582                                         regulator-name = "vdd_sm0,vdd_core";
 583                                         regulator-min-microvolt = <950000>;
 584                                         regulator-max-microvolt = <1300000>;
 585                                         regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
 586                                         regulator-coupled-max-spread = <170000 550000>;
 587                                         regulator-always-on;
 588                                         regulator-boot-on;
 589
 590                                         nvidia,tegra-core-regulator;
 591                                 };
 592
 593                                 vdd_cpu: sm1 {
 594                                         regulator-name = "vdd_sm1,vdd_cpu";
 595                                         regulator-min-microvolt = <750000>;
 596                                         regulator-max-microvolt = <1125000>;
 597                                         regulator-coupled-with = <&vdd_core &rtc_vdd>;
 598                                         regulator-coupled-max-spread = <550000 550000>;
 599                                         regulator-always-on;
 600                                         regulator-boot-on;
 601
 602                                         nvidia,tegra-cpu-regulator;
 603                                 };
 604
 605                                 sm2_reg: sm2 {
 606                                         regulator-name = "vdd_sm2,vin_ldo*";
 607                                         regulator-min-microvolt = <3700000>;
 608                                         regulator-max-microvolt = <3700000>;
 609                                         regulator-always-on;
 610                                 };
 611
 612                                 /* LDO0 is not connected to anything */
 613
 614                                 ldo1 {
 615                                         regulator-name = "vdd_ldo1,avdd_pll*";
 616                                         regulator-min-microvolt = <1100000>;
 617                                         regulator-max-microvolt = <1100000>;
 618                                         regulator-always-on;
 619                                         regulator-boot-on;
 620                                 };
 621
 622                                 rtc_vdd: ldo2 {
 623                                         regulator-name = "vdd_ldo2,vdd_rtc";
 624                                         regulator-min-microvolt = <950000>;
 625                                         regulator-max-microvolt = <1300000>;
 626                                         regulator-coupled-with = <&vdd_core &vdd_cpu>;
 627                                         regulator-coupled-max-spread = <170000 550000>;
 628                                         regulator-always-on;
 629                                         regulator-boot-on;
 630
 631                                         nvidia,tegra-rtc-regulator;
 632                                 };
 633
 634                                 ldo3 {
 635                                         regulator-name = "vdd_ldo3,avdd_usb*";
 636                                         regulator-min-microvolt = <3300000>;
 637                                         regulator-max-microvolt = <3300000>;
 638                                         regulator-always-on;
 639                                 };
 640
 641                                 ldo4 {
 642                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 643                                         regulator-min-microvolt = <1800000>;
 644                                         regulator-max-microvolt = <1800000>;
 645                                         regulator-always-on;
 646                                         regulator-boot-on;
 647                                 };
 648
 649                                 vcore_emmc: ldo5 {
 650                                         regulator-name = "vdd_ldo5,vcore_mmc";
 651                                         regulator-min-microvolt = <2850000>;
 652                                         regulator-max-microvolt = <2850000>;
 653                                         regulator-always-on;
 654                                 };
 655
 656                                 avdd_vdac_reg: ldo6 {
 657                                         regulator-name = "vdd_ldo6,avdd_vdac";
 658                                         regulator-min-microvolt = <2850000>;
 659                                         regulator-max-microvolt = <2850000>;
 660                                 };
 661
 662                                 hdmi_vdd_reg: ldo7 {
 663                                         regulator-name = "vdd_ldo7,avdd_hdmi";
 664                                         regulator-min-microvolt = <3300000>;
 665                                         regulator-max-microvolt = <3300000>;
 666                                 };
 667
 668                                 hdmi_pll_reg: ldo8 {
 669                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 670                                         regulator-min-microvolt = <1800000>;
 671                                         regulator-max-microvolt = <1800000>;
 672                                 };
 673
 674                                 ldo9 {
 675                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 676                                         regulator-min-microvolt = <2850000>;
 677                                         regulator-max-microvolt = <2850000>;
 678                                         regulator-always-on;
 679                                         regulator-boot-on;
 680                                 };
 681
 682                                 ldo_rtc {
 683                                         regulator-name = "vdd_rtc_out,vdd_cell";
 684                                         regulator-min-microvolt = <3300000>;
 685                                         regulator-max-microvolt = <3300000>;
 686                                         regulator-always-on;
 687                                         regulator-boot-on;
 688                                 };
 689                         };
 690                 };
 691
 692                 nct1008: temperature-sensor@4c {
 693                         compatible = "onnn,nct1008";
 694                         reg = <0x4c>;
 695                         vcc-supply = <&vdd_3v3_sys>;
 696                         #thermal-sensor-cells = <1>;
 697                 };
 698         };
 699
 700         pmc@7000e400 {
 701                 nvidia,invert-interrupt;
 702                 nvidia,suspend-mode = <1>;
 703                 nvidia,cpu-pwr-good-time = <2000>;
 704                 nvidia,cpu-pwr-off-time = <100>;
 705                 nvidia,core-pwr-good-time = <3845 3845>;
 706                 nvidia,core-pwr-off-time = <458>;
 707                 nvidia,sys-clock-req-active-high;
 708         };
 709
 710         usb@c5000000 {
 711                 compatible = "nvidia,tegra20-udc";
 712                 status = "okay";
 713                 dr_mode = "peripheral";
 714         };
 715
 716         usb-phy@c5000000 {
 717                 status = "okay";
 718                 dr_mode = "peripheral";
 719                 nvidia,xcvr-setup-use-fuses;
 720                 nvidia,xcvr-lsfslew = <2>;
 721                 nvidia,xcvr-lsrslew = <2>;
 722                 vbus-supply = <&vdd_vbus1>;
 723         };
 724
 725         usb@c5008000 {
 726                 status = "okay";
 727         };
 728
 729         usb-phy@c5008000 {
 730                 status = "okay";
 731                 nvidia,xcvr-setup-use-fuses;
 732                 nvidia,xcvr-lsfslew = <2>;
 733                 nvidia,xcvr-lsrslew = <2>;
 734                 vbus-supply = <&vdd_vbus3>;
 735         };
 736
 737         brcm_wifi_pwrseq: wifi-pwrseq {
 738                 compatible = "mmc-pwrseq-simple";
 739
 740                 clocks = <&rtc_32k_wifi>;
 741                 clock-names = "ext_clock";
 742
 743                 reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
 744                 post-power-on-delay-ms = <300>;
 745                 power-off-delay-us = <300>;
 746         };
 747
 748         sdmmc1: mmc@c8000000 {
 749                 status = "okay";
 750
 751                 #address-cells = <1>;
 752                 #size-cells = <0>;
 753
 754                 assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
 755                 assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
 756                 assigned-clock-rates = <50000000>;
 757
 758                 max-frequency = <50000000>;
 759                 keep-power-in-suspend;
 760                 bus-width = <4>;
 761                 non-removable;
 762
 763                 mmc-pwrseq = <&brcm_wifi_pwrseq>;
 764                 vmmc-supply = <&vdd_3v3_sys>;
 765                 vqmmc-supply = <&vdd_1v8_sys>;
 766
 767                 /* Azurewave AW-NH611 BCM4329 */
 768                 wifi@1 {
 769                         reg = <1>;
 770                         compatible = "brcm,bcm4329-fmac";
 771                         interrupt-parent = <&gpio>;
 772                         interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
 773                         interrupt-names = "host-wake";
 774                 };
 775         };
 776
 777         sdmmc3: mmc@c8000400 {
 778                 status = "okay";
 779                 bus-width = <4>;
 780                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 781                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 782                 vmmc-supply = <&vdd_3v3_sys>;
 783                 vqmmc-supply = <&vdd_3v3_sys>;
 784         };
 785
 786         sdmmc4: mmc@c8000600 {
 787                 status = "okay";
 788                 bus-width = <8>;
 789                 vmmc-supply = <&vcore_emmc>;
 790                 vqmmc-supply = <&vdd_3v3_sys>;
 791                 non-removable;
 792         };
 793
 794         mains: ac-adapter-detect {
 795                 compatible = "gpio-charger";
 796                 charger-type = "mains";
 797                 gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
 798         };
 799
 800         backlight: backlight {
 801                 compatible = "pwm-backlight";
 802
 803                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 804                 power-supply = <&vdd_3v3_sys>;
 805                 pwms = <&pwm 2 41667>;
 806
 807                 brightness-levels = <7 255>;
 808                 num-interpolated-steps = <248>;
 809                 default-brightness-level = <20>;
 810         };
 811
 812         bat1010: battery-2s1p {
 813                 compatible = "simple-battery";
 814                 charge-full-design-microamp-hours = <3260000>;
 815                 energy-full-design-microwatt-hours = <24000000>;
 816                 operating-range-celsius = <0 40>;
 817         };
 818
 819         /* PMIC has a built-in 32KHz oscillator which is used by PMC */
 820         clk32k_in: clock@0 {
 821                 compatible = "fixed-clock";
 822                 #clock-cells = <0>;
 823                 clock-frequency = <32768>;
 824                 clock-output-names = "tps658621-out32k";
 825         };
 826
 827         /*
 828          * This standalone onboard fixed-clock always-ON 32KHz
 829          * oscillator is used as a reference clock-source by the
 830          * Azurewave WiFi/BT module.
 831          */
 832         rtc_32k_wifi: clock@1 {
 833                 compatible = "fixed-clock";
 834                 #clock-cells = <0>;
 835                 clock-frequency = <32768>;
 836                 clock-output-names = "kk3270032";
 837         };
 838
 839         cpus {
 840                 cpu0: cpu@0 {
 841                         cpu-supply = <&vdd_cpu>;
 842                         operating-points-v2 = <&cpu0_opp_table>;
 843                         #cooling-cells = <2>;
 844                 };
 845
 846                 cpu1: cpu@1 {
 847                         cpu-supply = <&vdd_cpu>;
 848                         operating-points-v2 = <&cpu0_opp_table>;
 849                         #cooling-cells = <2>;
 850                 };
 851         };
 852
 853         display-panel {
 854                 compatible = "auo,b101ew05", "panel-lvds";
 855
 856                 ddc-i2c-bus = <&panel_ddc>;
 857                 power-supply = <&vdd_pnl>;
 858                 backlight = <&backlight>;
 859
 860                 width-mm = <218>;
 861                 height-mm = <135>;
 862
 863                 data-mapping = "jeida-18";
 864
 865                 panel-timing {
 866                         clock-frequency = <71200000>;
 867                         hactive = <1280>;
 868                         vactive = <800>;
 869                         hfront-porch = <8>;
 870                         hback-porch = <18>;
 871                         hsync-len = <184>;
 872                         vsync-len = <3>;
 873                         vfront-porch = <4>;
 874                         vback-porch = <8>;
 875                 };
 876
 877                 port {
 878                         panel_input: endpoint {
 879                                 remote-endpoint = <&lvds_encoder_output>;
 880                         };
 881                 };
 882         };
 883
 884         gpio-keys {
 885                 compatible = "gpio-keys";
 886
 887                 power {
 888                         label = "Power";
 889                         gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
 890                         linux,code = <KEY_POWER>;
 891                         debounce-interval = <10>;
 892                         wakeup-event-action = <EV_ACT_ASSERTED>;
 893                         wakeup-source;
 894                 };
 895
 896                 rotation-lock {
 897                         label = "Rotate-lock";
 898                         gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
 899                         linux,code = <SW_ROTATE_LOCK>;
 900                         linux,input-type = <EV_SW>;
 901                         debounce-interval = <10>;
 902                 };
 903
 904                 volume-up {
 905                         label = "Volume Up";
 906                         gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 907                         linux,code = <KEY_VOLUMEUP>;
 908                         debounce-interval = <10>;
 909                         wakeup-event-action = <EV_ACT_ASSERTED>;
 910                         wakeup-source;
 911                 };
 912
 913                 volume-down {
 914                         label = "Volume Down";
 915                         gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
 916                         linux,code = <KEY_VOLUMEDOWN>;
 917                         debounce-interval = <10>;
 918                         wakeup-event-action = <EV_ACT_ASSERTED>;
 919                         wakeup-source;
 920                 };
 921         };
 922
 923         haptic-feedback {
 924                 compatible = "gpio-vibrator";
 925                 enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
 926                 vcc-supply = <&vdd_3v3_sys>;
 927         };
 928
 929         lvds-encoder {
 930                 compatible = "ti,sn75lvds83", "lvds-encoder";
 931
 932                 powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
 933                 power-supply = <&vdd_3v3_sys>;
 934
 935                 ports {
 936                         #address-cells = <1>;
 937                         #size-cells = <0>;
 938
 939                         port@0 {
 940                                 reg = <0>;
 941
 942                                 lvds_encoder_input: endpoint {
 943                                         remote-endpoint = <&lcd_output>;
 944                                 };
 945                         };
 946
 947                         port@1 {
 948                                 reg = <1>;
 949
 950                                 lvds_encoder_output: endpoint {
 951                                         remote-endpoint = <&panel_input>;
 952                                 };
 953                         };
 954                 };
 955         };
 956
 957         vdd_5v0_sys: regulator@0 {
 958                 compatible = "regulator-fixed";
 959                 regulator-name = "vdd_5v0";
 960                 regulator-min-microvolt = <5000000>;
 961                 regulator-max-microvolt = <5000000>;
 962                 regulator-always-on;
 963         };
 964
 965         vdd_3v3_sys: regulator@1 {
 966                 compatible = "regulator-fixed";
 967                 regulator-name = "vdd_3v3_vs";
 968                 regulator-min-microvolt = <3300000>;
 969                 regulator-max-microvolt = <3300000>;
 970                 regulator-always-on;
 971                 vin-supply = <&vdd_5v0_sys>;
 972         };
 973
 974         vdd_1v8_sys: regulator@2 {
 975                 compatible = "regulator-fixed";
 976                 regulator-name = "vdd_1v8_vs";
 977                 regulator-min-microvolt = <1800000>;
 978                 regulator-max-microvolt = <1800000>;
 979                 regulator-always-on;
 980                 vin-supply = <&vdd_5v0_sys>;
 981         };
 982
 983         vdd_pnl: regulator@3 {
 984                 compatible = "regulator-fixed";
 985                 regulator-name = "vdd_panel";
 986                 regulator-min-microvolt = <3300000>;
 987                 regulator-max-microvolt = <3300000>;
 988                 regulator-enable-ramp-delay = <300000>;
 989                 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 990                 enable-active-high;
 991                 vin-supply = <&vdd_5v0_sys>;
 992         };
 993
 994         vdd_vbus1: regulator@4 {
 995                 compatible = "regulator-fixed";
 996                 regulator-name = "vdd_usb1_vbus";
 997                 regulator-min-microvolt = <5000000>;
 998                 regulator-max-microvolt = <5000000>;
 999                 regulator-always-on;
1000                 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
1001                 enable-active-high;
1002                 vin-supply = <&vdd_5v0_sys>;
1003         };
1004
1005         vdd_vbus3: regulator@5 {
1006                 compatible = "regulator-fixed";
1007                 regulator-name = "vdd_usb3_vbus";
1008                 regulator-min-microvolt = <5000000>;
1009                 regulator-max-microvolt = <5000000>;
1010                 regulator-always-on;
1011                 gpio = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
1012                 enable-active-high;
1013                 vin-supply = <&vdd_5v0_sys>;
1014         };
1015
1016         sound {
1017                 compatible = "nvidia,tegra-audio-wm8903-picasso",
1018                              "nvidia,tegra-audio-wm8903";
1019                 nvidia,model = "Acer Iconia Tab A500 WM8903";
1020
1021                 nvidia,audio-routing =
1022                         "Headphone Jack", "HPOUTR",
1023                         "Headphone Jack", "HPOUTL",
1024                         "Int Spk", "LINEOUTL",
1025                         "Int Spk", "LINEOUTR",
1026                         "Mic Jack", "MICBIAS",
1027                         "IN2L", "Mic Jack",
1028                         "IN2R", "Mic Jack",
1029                         "IN1L", "Int Mic",
1030                         "IN1R", "Int Mic";
1031
1032                 nvidia,i2s-controller = <&tegra_i2s1>;
1033                 nvidia,audio-codec = <&wm8903>;
1034
1035                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1036                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1037                 nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
1038                 nvidia,headset;
1039
1040                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1041                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1042                          <&tegra_car TEGRA20_CLK_CDEV1>;
1043                 clock-names = "pll_a", "pll_a_out0", "mclk";
1044         };
1045
1046         thermal-zones {
1047                 skin-thermal {
1048                         polling-delay-passive = <1000>; /* milliseconds */
1049                         polling-delay = <0>; /* milliseconds */
1050
1051                         thermal-sensors = <&nct1008 0>;
1052                 };
1053
1054                 cpu-thermal {
1055                         polling-delay-passive = <1000>; /* milliseconds */
1056                         polling-delay = <5000>; /* milliseconds */
1057
1058                         thermal-sensors = <&nct1008 1>;
1059
1060                         trips {
1061                                 trip0: cpu-alert0 {
1062                                         /* start throttling at 60C */
1063                                         temperature = <60000>;
1064                                         hysteresis = <200>;
1065                                         type = "passive";
1066                                 };
1067
1068                                 trip1: cpu-crit {
1069                                         /* shut down at 70C */
1070                                         temperature = <70000>;
1071                                         hysteresis = <2000>;
1072                                         type = "critical";
1073                                 };
1074                         };
1075
1076                         cooling-maps {
1077                                 map0 {
1078                                         trip = <&trip0>;
1079                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1080                                                          <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1081                                 };
1082                         };
1083                 };
1084         };
1085
1086         memory-controller@7000f400 {
1087                 nvidia,use-ram-code;
1088
1089                 emc-tables@0 {
1090                         nvidia,ram-code = <0>; /* elpida-8gb */
1091                         reg = <0>;
1092
1093                         #address-cells = <1>;
1094                         #size-cells = <0>;
1095
1096                         emc-table@25000 {
1097                                 reg = <25000>;
1098                                 compatible = "nvidia,tegra20-emc-table";
1099                                 clock-frequency = <25000>;
1100                                 nvidia,emc-registers = <0x00000002 0x00000006
1101                                         0x00000003 0x00000003 0x00000006 0x00000004
1102                                         0x00000002 0x00000009 0x00000003 0x00000003
1103                                         0x00000002 0x00000002 0x00000002 0x00000004
1104                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1105                                         0x00000000 0x00000003 0x00000003 0x00000003
1106                                         0x00000008 0x00000001 0x0000000a 0x00000004
1107                                         0x00000003 0x00000008 0x00000004 0x00000006
1108                                         0x00000002 0x00000068 0x00000000 0x00000003
1109                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1110                                         0x00070000 0x00000000 0x00000000 0x00000003
1111                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1112                         };
1113
1114                         emc-table@50000 {
1115                                 reg = <50000>;
1116                                 compatible = "nvidia,tegra20-emc-table";
1117                                 clock-frequency = <50000>;
1118                                 nvidia,emc-registers = <0x00000003 0x00000007
1119                                         0x00000003 0x00000003 0x00000006 0x00000004
1120                                         0x00000002 0x00000009 0x00000003 0x00000003
1121                                         0x00000002 0x00000002 0x00000002 0x00000005
1122                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1123                                         0x00000000 0x00000003 0x00000003 0x00000003
1124                                         0x00000008 0x00000001 0x0000000a 0x00000007
1125                                         0x00000003 0x00000008 0x00000004 0x00000006
1126                                         0x00000002 0x000000d0 0x00000000 0x00000000
1127                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1128                                         0x00070000 0x00000000 0x00000000 0x00000005
1129                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1130                         };
1131
1132                         emc-table@75000 {
1133                                 reg = <75000>;
1134                                 compatible = "nvidia,tegra20-emc-table";
1135                                 clock-frequency = <75000>;
1136                                 nvidia,emc-registers = <0x00000005 0x0000000a
1137                                         0x00000004 0x00000003 0x00000006 0x00000004
1138                                         0x00000002 0x00000009 0x00000003 0x00000003
1139                                         0x00000002 0x00000002 0x00000002 0x00000005
1140                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1141                                         0x00000000 0x00000003 0x00000003 0x00000003
1142                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1143                                         0x00000003 0x00000008 0x00000004 0x00000006
1144                                         0x00000002 0x00000138 0x00000000 0x00000000
1145                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1146                                         0x00070000 0x00000000 0x00000000 0x00000007
1147                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1148                         };
1149
1150                         emc-table@150000 {
1151                                 reg = <150000>;
1152                                 compatible = "nvidia,tegra20-emc-table";
1153                                 clock-frequency = <150000>;
1154                                 nvidia,emc-registers = <0x00000009 0x00000014
1155                                         0x00000007 0x00000003 0x00000006 0x00000004
1156                                         0x00000002 0x00000009 0x00000003 0x00000003
1157                                         0x00000002 0x00000002 0x00000002 0x00000005
1158                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1159                                         0x00000000 0x00000003 0x00000003 0x00000003
1160                                         0x00000008 0x00000001 0x0000000a 0x00000015
1161                                         0x00000003 0x00000008 0x00000004 0x00000006
1162                                         0x00000002 0x00000270 0x00000000 0x00000001
1163                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1164                                         0x007dd510 0x00000000 0x00000000 0x0000000e
1165                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1166                         };
1167
1168                         emc-table@300000 {
1169                                 reg = <300000>;
1170                                 compatible = "nvidia,tegra20-emc-table";
1171                                 clock-frequency = <300000>;
1172                                 nvidia,emc-registers = <0x00000012 0x00000027
1173                                         0x0000000d 0x00000006 0x00000007 0x00000005
1174                                         0x00000003 0x00000009 0x00000006 0x00000006
1175                                         0x00000003 0x00000003 0x00000002 0x00000006
1176                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1177                                         0x00000000 0x00000004 0x00000004 0x00000006
1178                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1179                                         0x00000003 0x0000000f 0x00000007 0x00000005
1180                                         0x00000002 0x000004e1 0x00000005 0x00000002
1181                                         0x00000000 0x00000000 0x00000282 0xe059048b
1182                                         0x007e1510 0x00000000 0x00000000 0x0000001b
1183                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1184                         };
1185                 };
1186
1187                 emc-tables@1 {
1188                         nvidia,ram-code = <1>; /* elpida-4gb */
1189                         reg = <1>;
1190
1191                         #address-cells = <1>;
1192                         #size-cells = <0>;
1193
1194                         emc-table@25000 {
1195                                 reg = <25000>;
1196                                 compatible = "nvidia,tegra20-emc-table";
1197                                 clock-frequency = <25000>;
1198                                 nvidia,emc-registers = <0x00000002 0x00000006
1199                                         0x00000003 0x00000003 0x00000006 0x00000004
1200                                         0x00000002 0x00000009 0x00000003 0x00000003
1201                                         0x00000002 0x00000002 0x00000002 0x00000004
1202                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1203                                         0x00000000 0x00000003 0x00000003 0x00000003
1204                                         0x00000008 0x00000001 0x0000000a 0x00000004
1205                                         0x00000003 0x00000008 0x00000004 0x00000006
1206                                         0x00000002 0x00000068 0x00000000 0x00000003
1207                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1208                                         0x0007c000 0x00000000 0x00000000 0x00000003
1209                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1210                         };
1211
1212                         emc-table@50000 {
1213                                 reg = <50000>;
1214                                 compatible = "nvidia,tegra20-emc-table";
1215                                 clock-frequency = <50000>;
1216                                 nvidia,emc-registers = <0x00000003 0x00000007
1217                                         0x00000003 0x00000003 0x00000006 0x00000004
1218                                         0x00000002 0x00000009 0x00000003 0x00000003
1219                                         0x00000002 0x00000002 0x00000002 0x00000005
1220                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1221                                         0x00000000 0x00000003 0x00000003 0x00000003
1222                                         0x00000008 0x00000001 0x0000000a 0x00000007
1223                                         0x00000003 0x00000008 0x00000004 0x00000006
1224                                         0x00000002 0x000000d0 0x00000000 0x00000000
1225                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1226                                         0x0007c000 0x00000000 0x00000000 0x00000005
1227                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1228                         };
1229
1230                         emc-table@75000 {
1231                                 reg = <75000>;
1232                                 compatible = "nvidia,tegra20-emc-table";
1233                                 clock-frequency = <75000>;
1234                                 nvidia,emc-registers = <0x00000005 0x0000000a
1235                                         0x00000004 0x00000003 0x00000006 0x00000004
1236                                         0x00000002 0x00000009 0x00000003 0x00000003
1237                                         0x00000002 0x00000002 0x00000002 0x00000005
1238                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1239                                         0x00000000 0x00000003 0x00000003 0x00000003
1240                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1241                                         0x00000003 0x00000008 0x00000004 0x00000006
1242                                         0x00000002 0x00000138 0x00000000 0x00000000
1243                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1244                                         0x0007c000 0x00000000 0x00000000 0x00000007
1245                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1246                         };
1247
1248                         emc-table@150000 {
1249                                 reg = <150000>;
1250                                 compatible = "nvidia,tegra20-emc-table";
1251                                 clock-frequency = <150000>;
1252                                 nvidia,emc-registers = <0x00000009 0x00000014
1253                                         0x00000007 0x00000003 0x00000006 0x00000004
1254                                         0x00000002 0x00000009 0x00000003 0x00000003
1255                                         0x00000002 0x00000002 0x00000002 0x00000005
1256                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1257                                         0x00000000 0x00000003 0x00000003 0x00000003
1258                                         0x00000008 0x00000001 0x0000000a 0x00000015
1259                                         0x00000003 0x00000008 0x00000004 0x00000006
1260                                         0x00000002 0x00000270 0x00000000 0x00000001
1261                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1262                                         0x007e4010 0x00000000 0x00000000 0x0000000e
1263                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1264                         };
1265
1266                         emc-table@300000 {
1267                                 reg = <300000>;
1268                                 compatible = "nvidia,tegra20-emc-table";
1269                                 clock-frequency = <300000>;
1270                                 nvidia,emc-registers = <0x00000012 0x00000027
1271                                         0x0000000d 0x00000006 0x00000007 0x00000005
1272                                         0x00000003 0x00000009 0x00000006 0x00000006
1273                                         0x00000003 0x00000003 0x00000002 0x00000006
1274                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1275                                         0x00000000 0x00000004 0x00000004 0x00000006
1276                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1277                                         0x00000003 0x0000000f 0x00000007 0x00000005
1278                                         0x00000002 0x000004e1 0x00000005 0x00000002
1279                                         0x00000000 0x00000000 0x00000282 0xe059048b
1280                                         0x007e0010 0x00000000 0x00000000 0x0000001b
1281                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1282                         };
1283                 };
1284
1285                 emc-tables@2 {
1286                         nvidia,ram-code = <2>; /* hynix-8gb */
1287                         reg = <2>;
1288
1289                         #address-cells = <1>;
1290                         #size-cells = <0>;
1291
1292                         emc-table@25000 {
1293                                 reg = <25000>;
1294                                 compatible = "nvidia,tegra20-emc-table";
1295                                 clock-frequency = <25000>;
1296                                 nvidia,emc-registers = <0x00000002 0x00000006
1297                                         0x00000003 0x00000003 0x00000006 0x00000004
1298                                         0x00000002 0x00000009 0x00000003 0x00000003
1299                                         0x00000002 0x00000002 0x00000002 0x00000004
1300                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1301                                         0x00000000 0x00000003 0x00000003 0x00000003
1302                                         0x00000008 0x00000001 0x0000000a 0x00000004
1303                                         0x00000003 0x00000008 0x00000004 0x00000006
1304                                         0x00000002 0x00000068 0x00000000 0x00000003
1305                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1306                                         0x00070000 0x00000000 0x00000000 0x00000003
1307                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1308                         };
1309
1310                         emc-table@50000 {
1311                                 reg = <50000>;
1312                                 compatible = "nvidia,tegra20-emc-table";
1313                                 clock-frequency = <50000>;
1314                                 nvidia,emc-registers = <0x00000003 0x00000007
1315                                         0x00000003 0x00000003 0x00000006 0x00000004
1316                                         0x00000002 0x00000009 0x00000003 0x00000003
1317                                         0x00000002 0x00000002 0x00000002 0x00000005
1318                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1319                                         0x00000000 0x00000003 0x00000003 0x00000003
1320                                         0x00000008 0x00000001 0x0000000a 0x00000007
1321                                         0x00000003 0x00000008 0x00000004 0x00000006
1322                                         0x00000002 0x000000d0 0x00000000 0x00000000
1323                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1324                                         0x00070000 0x00000000 0x00000000 0x00000005
1325                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1326                         };
1327
1328                         emc-table@75000 {
1329                                 reg = <75000>;
1330                                 compatible = "nvidia,tegra20-emc-table";
1331                                 clock-frequency = <75000>;
1332                                 nvidia,emc-registers = <0x00000005 0x0000000a
1333                                         0x00000004 0x00000003 0x00000006 0x00000004
1334                                         0x00000002 0x00000009 0x00000003 0x00000003
1335                                         0x00000002 0x00000002 0x00000002 0x00000005
1336                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1337                                         0x00000000 0x00000003 0x00000003 0x00000003
1338                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1339                                         0x00000003 0x00000008 0x00000004 0x00000006
1340                                         0x00000002 0x00000138 0x00000000 0x00000000
1341                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1342                                         0x00070000 0x00000000 0x00000000 0x00000007
1343                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1344                         };
1345
1346                         emc-table@150000 {
1347                                 reg = <150000>;
1348                                 compatible = "nvidia,tegra20-emc-table";
1349                                 clock-frequency = <150000>;
1350                                 nvidia,emc-registers = <0x00000009 0x00000014
1351                                         0x00000007 0x00000003 0x00000006 0x00000004
1352                                         0x00000002 0x00000009 0x00000003 0x00000003
1353                                         0x00000002 0x00000002 0x00000002 0x00000005
1354                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1355                                         0x00000000 0x00000003 0x00000003 0x00000003
1356                                         0x00000008 0x00000001 0x0000000a 0x00000015
1357                                         0x00000003 0x00000008 0x00000004 0x00000006
1358                                         0x00000002 0x00000270 0x00000000 0x00000001
1359                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1360                                         0x007dd010 0x00000000 0x00000000 0x0000000e
1361                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1362                         };
1363
1364                         emc-table@300000 {
1365                                 reg = <300000>;
1366                                 compatible = "nvidia,tegra20-emc-table";
1367                                 clock-frequency = <300000>;
1368                                 nvidia,emc-registers = <0x00000012 0x00000027
1369                                         0x0000000d 0x00000006 0x00000007 0x00000005
1370                                         0x00000003 0x00000009 0x00000006 0x00000006
1371                                         0x00000003 0x00000003 0x00000002 0x00000006
1372                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1373                                         0x00000000 0x00000004 0x00000004 0x00000006
1374                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1375                                         0x00000003 0x0000000f 0x00000007 0x00000005
1376                                         0x00000002 0x000004e1 0x00000005 0x00000002
1377                                         0x00000000 0x00000000 0x00000282 0xe059048b
1378                                         0x007e2010 0x00000000 0x00000000 0x0000001b
1379                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1380                         };
1381                 };
1382
1383                 emc-tables@3 {
1384                         nvidia,ram-code = <3>; /* hynix-4gb */
1385                         reg = <3>;
1386
1387                         #address-cells = <1>;
1388                         #size-cells = <0>;
1389
1390                         emc-table@25000 {
1391                                 reg = <25000>;
1392                                 compatible = "nvidia,tegra20-emc-table";
1393                                 clock-frequency = <25000>;
1394                                 nvidia,emc-registers = <0x00000002 0x00000006
1395                                         0x00000003 0x00000003 0x00000006 0x00000004
1396                                         0x00000002 0x00000009 0x00000003 0x00000003
1397                                         0x00000002 0x00000002 0x00000002 0x00000004
1398                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1399                                         0x00000000 0x00000003 0x00000003 0x00000003
1400                                         0x00000008 0x00000001 0x0000000a 0x00000004
1401                                         0x00000003 0x00000008 0x00000004 0x00000006
1402                                         0x00000002 0x00000068 0x00000000 0x00000003
1403                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1404                                         0x0007c000 0x00000000 0x00000000 0x00000003
1405                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1406                         };
1407
1408                         emc-table@50000 {
1409                                 reg = <50000>;
1410                                 compatible = "nvidia,tegra20-emc-table";
1411                                 clock-frequency = <50000>;
1412                                 nvidia,emc-registers = <0x00000003 0x00000007
1413                                         0x00000003 0x00000003 0x00000006 0x00000004
1414                                         0x00000002 0x00000009 0x00000003 0x00000003
1415                                         0x00000002 0x00000002 0x00000002 0x00000005
1416                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1417                                         0x00000000 0x00000003 0x00000003 0x00000003
1418                                         0x00000008 0x00000001 0x0000000a 0x00000007
1419                                         0x00000003 0x00000008 0x00000004 0x00000006
1420                                         0x00000002 0x000000d0 0x00000000 0x00000000
1421                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1422                                         0x0007c000 0x00078000 0x00000000 0x00000005
1423                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1424                         };
1425
1426                         emc-table@75000 {
1427                                 reg = <75000>;
1428                                 compatible = "nvidia,tegra20-emc-table";
1429                                 clock-frequency = <75000>;
1430                                 nvidia,emc-registers = <0x00000005 0x0000000a
1431                                         0x00000004 0x00000003 0x00000006 0x00000004
1432                                         0x00000002 0x00000009 0x00000003 0x00000003
1433                                         0x00000002 0x00000002 0x00000002 0x00000005
1434                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1435                                         0x00000000 0x00000003 0x00000003 0x00000003
1436                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1437                                         0x00000003 0x00000008 0x00000004 0x00000006
1438                                         0x00000002 0x00000138 0x00000000 0x00000000
1439                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1440                                         0x0007c000 0x00000000 0x00000000 0x00000007
1441                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1442                         };
1443
1444                         emc-table@150000 {
1445                                 reg = <150000>;
1446                                 compatible = "nvidia,tegra20-emc-table";
1447                                 clock-frequency = <150000>;
1448                                 nvidia,emc-registers = <0x00000009 0x00000014
1449                                         0x00000007 0x00000003 0x00000006 0x00000004
1450                                         0x00000002 0x00000009 0x00000003 0x00000003
1451                                         0x00000002 0x00000002 0x00000002 0x00000005
1452                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1453                                         0x00000000 0x00000003 0x00000003 0x00000003
1454                                         0x00000008 0x00000001 0x0000000a 0x00000015
1455                                         0x00000003 0x00000008 0x00000004 0x00000006
1456                                         0x00000002 0x00000270 0x00000000 0x00000001
1457                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1458                                         0x007e4010 0x00000000 0x00000000 0x0000000e
1459                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1460                         };
1461
1462                         emc-table@300000 {
1463                                 reg = <300000>;
1464                                 compatible = "nvidia,tegra20-emc-table";
1465                                 clock-frequency = <300000>;
1466                                 nvidia,emc-registers = <0x00000012 0x00000027
1467                                         0x0000000d 0x00000006 0x00000007 0x00000005
1468                                         0x00000003 0x00000009 0x00000006 0x00000006
1469                                         0x00000003 0x00000003 0x00000002 0x00000006
1470                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1471                                         0x00000000 0x00000004 0x00000004 0x00000006
1472                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1473                                         0x00000003 0x0000000f 0x00000007 0x00000005
1474                                         0x00000002 0x000004e1 0x00000005 0x00000002
1475                                         0x00000000 0x00000000 0x00000282 0xe059048b
1476                                         0x007e0010 0x00000000 0x00000000 0x0000001b
1477                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1478                         };
1479                 };
1480         };
1481 };
1482
1483 &emc_icc_dvfs_opp_table {
1484         /delete-node/ opp@666000000;
1485         /delete-node/ opp@760000000;
1486 };