1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
5 * Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries
7 * Author: Eugen Hristev <eugen.hristev@microchip.com>
8 * Author: Claudiu Beznea <claudiu.beznea@microchip.com>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/dma/at91.h>
16 #include <dt-bindings/gpio/gpio.h>
19 model = "Microchip SAMA7G5 family SoC";
20 compatible = "microchip,sama7g5";
23 interrupt-parent = <&gic>;
31 compatible = "arm,cortex-a7";
37 slow_xtal: slow_xtal {
38 compatible = "fixed-clock";
42 main_xtal: main_xtal {
43 compatible = "fixed-clock";
48 compatible = "fixed-clock";
50 clock-frequency = <48000000>;
54 vddout25: fixed-regulator-vddout25 {
55 compatible = "regulator-fixed";
57 regulator-name = "VDDOUT25";
58 regulator-min-microvolt = <2500000>;
59 regulator-max-microvolt = <2500000>;
64 ns_sram: sram@100000 {
65 compatible = "mmio-sram";
68 reg = <0x100000 0x20000>;
73 compatible = "simple-bus";
78 secumod: secumod@e0004000 {
79 compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
80 reg = <0xe0004000 0x4000>;
86 compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
87 reg = <0xe0008000 0x20>;
90 pioA: pinctrl@e0014000 {
91 compatible = "microchip,sama7g5-pinctrl";
92 reg = <0xe0014000 0x800>;
93 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
94 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
95 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
96 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
97 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
99 #interrupt-cells = <2>;
102 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
106 compatible = "microchip,sama7g5-pmc", "syscon";
107 reg = <0xe0018000 0x200>;
108 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
110 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
111 clock-names = "td_slck", "md_slck", "main_xtal";
115 compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
116 reg = <0xe001d020 0x30>;
117 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
118 clocks = <&clk32k 0>;
121 clk32k: clock-controller@e001d050 {
122 compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
123 reg = <0xe001d050 0x4>;
124 clocks = <&slow_xtal>;
128 gpbr: gpbr@e001d060 {
129 compatible = "microchip,sama7g5-gpbr", "syscon";
130 reg = <0xe001d060 0x48>;
133 ps_wdt: watchdog@e001d180 {
134 compatible = "microchip,sama7g5-wdt";
135 reg = <0xe001d180 0x24>;
136 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
137 clocks = <&clk32k 0>;
140 sdmmc0: mmc@e1204000 {
141 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
142 reg = <0xe1204000 0x4000>;
143 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
144 clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
145 clock-names = "hclock", "multclk";
146 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
147 assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
148 assigned-clock-rates = <200000000>;
149 microchip,sdcal-inverted;
153 sdmmc1: mmc@e1208000 {
154 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
155 reg = <0xe1208000 0x4000>;
156 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
157 clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
158 clock-names = "hclock", "multclk";
159 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
160 assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
161 assigned-clock-rates = <200000000>;
162 microchip,sdcal-inverted;
166 sdmmc2: mmc@e120c000 {
167 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
168 reg = <0xe120c000 0x4000>;
169 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
170 clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
171 clock-names = "hclock", "multclk";
172 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
173 assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
174 assigned-clock-rates = <200000000>;
175 microchip,sdcal-inverted;
180 compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
181 reg = <0xe1604000 0x4000>;
182 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
184 clocks = <&pmc PMC_TYPE_PERIPHERAL 77>;
188 spdifrx: spdifrx@e1614000 {
189 #sound-dai-cells = <0>;
190 compatible = "microchip,sama7g5-spdifrx";
191 reg = <0xe1614000 0x4000>;
192 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
193 dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>;
195 clocks = <&pmc PMC_TYPE_PERIPHERAL 84>, <&pmc PMC_TYPE_GCK 84>;
196 clock-names = "pclk", "gclk";
200 spdiftx: spdiftx@e1618000 {
201 #sound-dai-cells = <0>;
202 compatible = "microchip,sama7g5-spdiftx";
203 reg = <0xe1618000 0x4000>;
204 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
205 dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>;
207 clocks = <&pmc PMC_TYPE_PERIPHERAL 85>, <&pmc PMC_TYPE_GCK 85>;
208 clock-names = "pclk", "gclk";
212 compatible = "microchip,sama7g5-i2smcc";
213 #sound-dai-cells = <0>;
214 reg = <0xe161c000 0x4000>;
215 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
216 dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>;
217 dma-names = "tx", "rx";
218 clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
219 clock-names = "pclk", "gclk";
224 compatible = "microchip,sama7g5-i2smcc";
225 #sound-dai-cells = <0>;
226 reg = <0xe1620000 0x4000>;
227 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
228 dmas = <&dma0 AT91_XDMAC_DT_PERID(36)>, <&dma0 AT91_XDMAC_DT_PERID(35)>;
229 dma-names = "tx", "rx";
230 clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
231 clock-names = "pclk", "gclk";
235 pit64b0: timer@e1800000 {
236 compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
237 reg = <0xe1800000 0x4000>;
238 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
239 clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
240 clock-names = "pclk", "gclk";
243 pit64b1: timer@e1804000 {
244 compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
245 reg = <0xe1804000 0x4000>;
246 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
247 clocks = <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>;
248 clock-names = "pclk", "gclk";
251 flx0: flexcom@e1818000 {
252 compatible = "atmel,sama5d2-flexcom";
253 reg = <0xe1818000 0x200>;
254 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
255 #address-cells = <1>;
257 ranges = <0x0 0xe1818000 0x800>;
261 compatible = "atmel,at91sam9260-usart";
263 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
265 clock-names = "usart";
266 dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
267 <&dma1 AT91_XDMAC_DT_PERID(5)>;
268 dma-names = "tx", "rx";
275 flx1: flexcom@e181c000 {
276 compatible = "atmel,sama5d2-flexcom";
277 reg = <0xe181c000 0x200>;
278 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
279 #address-cells = <1>;
281 ranges = <0x0 0xe181c000 0x800>;
285 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
287 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
288 #address-cells = <1>;
290 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
291 atmel,fifo-size = <32>;
292 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
293 <&dma0 AT91_XDMAC_DT_PERID(8)>;
294 dma-names = "rx", "tx";
301 flx3: flexcom@e1824000 {
302 compatible = "atmel,sama5d2-flexcom";
303 reg = <0xe1824000 0x200>;
304 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
305 #address-cells = <1>;
307 ranges = <0x0 0xe1824000 0x800>;
311 compatible = "atmel,at91sam9260-usart";
313 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
314 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
315 clock-names = "usart";
316 dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>,
317 <&dma1 AT91_XDMAC_DT_PERID(11)>;
318 dma-names = "tx", "rx";
326 compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
327 reg = <0xe2010000 0x100>;
328 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
329 clocks = <&pmc PMC_TYPE_PERIPHERAL 97>;
333 flx4: flexcom@e2018000 {
334 compatible = "atmel,sama5d2-flexcom";
335 reg = <0xe2018000 0x200>;
336 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
337 #address-cells = <1>;
339 ranges = <0x0 0xe2018000 0x800>;
343 compatible = "atmel,at91sam9260-usart";
345 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
346 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
347 clock-names = "usart";
348 dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
349 <&dma1 AT91_XDMAC_DT_PERID(13)>;
350 dma-names = "tx", "rx";
353 atmel,fifo-size = <16>;
358 flx7: flexcom@e2024000 {
359 compatible = "atmel,sama5d2-flexcom";
360 reg = <0xe2024000 0x200>;
361 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
362 #address-cells = <1>;
364 ranges = <0x0 0xe2024000 0x800>;
368 compatible = "atmel,at91sam9260-usart";
370 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
371 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
372 clock-names = "usart";
373 dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
374 <&dma1 AT91_XDMAC_DT_PERID(19)>;
375 dma-names = "tx", "rx";
378 atmel,fifo-size = <16>;
383 gmac0: ethernet@e2800000 {
384 compatible = "microchip,sama7g5-gem";
385 reg = <0xe2800000 0x1000>;
386 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
392 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
393 clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
394 assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
395 assigned-clock-rates = <125000000>;
399 gmac1: ethernet@e2804000 {
400 compatible = "microchip,sama7g5-emac";
401 reg = <0xe2804000 0x1000>;
402 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
404 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
405 clock-names = "pclk", "hclk";
409 dma0: dma-controller@e2808000 {
410 compatible = "microchip,sama7g5-dma";
411 reg = <0xe2808000 0x1000>;
412 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
414 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
415 clock-names = "dma_clk";
419 dma1: dma-controller@e280c000 {
420 compatible = "microchip,sama7g5-dma";
421 reg = <0xe280c000 0x1000>;
422 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
425 clock-names = "dma_clk";
429 /* Place dma2 here despite it's address */
430 dma2: dma-controller@e1200000 {
431 compatible = "microchip,sama7g5-dma";
432 reg = <0xe1200000 0x1000>;
433 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
435 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
436 clock-names = "dma_clk";
441 flx8: flexcom@e2818000 {
442 compatible = "atmel,sama5d2-flexcom";
443 reg = <0xe2818000 0x200>;
444 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
445 #address-cells = <1>;
447 ranges = <0x0 0xe2818000 0x800>;
451 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
453 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
454 #address-cells = <1>;
456 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
457 atmel,fifo-size = <32>;
458 dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
459 <&dma0 AT91_XDMAC_DT_PERID(22)>;
460 dma-names = "rx", "tx";
467 flx9: flexcom@e281c000 {
468 compatible = "atmel,sama5d2-flexcom";
469 reg = <0xe281c000 0x200>;
470 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
471 #address-cells = <1>;
473 ranges = <0x0 0xe281c000 0x800>;
477 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
479 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
480 #address-cells = <1>;
482 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
483 atmel,fifo-size = <32>;
484 dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>,
485 <&dma0 AT91_XDMAC_DT_PERID(24)>;
486 dma-names = "rx", "tx";
493 flx11: flexcom@e2824000 {
494 compatible = "atmel,sama5d2-flexcom";
495 reg = <0xe2824000 0x200>;
496 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
497 #address-cells = <1>;
499 ranges = <0x0 0xe2824000 0x800>;
503 compatible = "atmel,at91rm9200-spi";
505 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
506 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
507 clock-names = "spi_clk";
508 #address-cells = <1>;
510 atmel,fifo-size = <32>;
511 dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
512 <&dma0 AT91_XDMAC_DT_PERID(28)>;
513 dma-names = "rx", "tx";
518 gic: interrupt-controller@e8c11000 {
519 compatible = "arm,cortex-a7-gic";
520 #interrupt-cells = <3>;
521 #address-cells = <0>;
522 interrupt-controller;
524 reg = <0xe8c11000 0x1000>,