arch/arm/boot/dts/sama7g5.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  *  sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
   4  *
   5  *  Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries
   6  *
   7  *  Author: Eugen Hristev <eugen.hristev@microchip.com>
   8  *  Author: Claudiu Beznea <claudiu.beznea@microchip.com>
   9  *
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/interrupt-controller/arm-gic.h>
  14 #include <dt-bindings/clock/at91.h>
  15 #include <dt-bindings/dma/at91.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "Microchip SAMA7G5 family SoC";
  20         compatible = "microchip,sama7g5";
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23         interrupt-parent = <&gic>;
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu0: cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a7";
  32                         reg = <0x0>;
  33                 };
  34         };
  35
  36         clocks {
  37                 slow_xtal: slow_xtal {
  38                         compatible = "fixed-clock";
  39                         #clock-cells = <0>;
  40                 };
  41
  42                 main_xtal: main_xtal {
  43                         compatible = "fixed-clock";
  44                         #clock-cells = <0>;
  45                 };
  46
  47                 usb_clk: usb_clk {
  48                         compatible = "fixed-clock";
  49                         #clock-cells = <0>;
  50                         clock-frequency = <48000000>;
  51                 };
  52         };
  53
  54         vddout25: fixed-regulator-vddout25 {
  55                 compatible = "regulator-fixed";
  56
  57                 regulator-name = "VDDOUT25";
  58                 regulator-min-microvolt = <2500000>;
  59                 regulator-max-microvolt = <2500000>;
  60                 regulator-boot-on;
  61                 status = "disabled";
  62         };
  63
  64         ns_sram: sram@100000 {
  65                 compatible = "mmio-sram";
  66                 #address-cells = <1>;
  67                 #size-cells = <1>;
  68                 reg = <0x100000 0x20000>;
  69                 ranges;
  70         };
  71
  72         soc {
  73                 compatible = "simple-bus";
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76                 ranges;
  77
  78                 secumod: secumod@e0004000 {
  79                         compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
  80                         reg = <0xe0004000 0x4000>;
  81                         gpio-controller;
  82                         #gpio-cells = <2>;
  83                 };
  84
  85                 sfrbu: sfr@e0008000 {
  86                         compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
  87                         reg = <0xe0008000 0x20>;
  88                 };
  89
  90                 pioA: pinctrl@e0014000 {
  91                         compatible = "microchip,sama7g5-pinctrl";
  92                         reg = <0xe0014000 0x800>;
  93                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  94                                 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  95                                 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
  96                                 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
  97                                 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  98                         interrupt-controller;
  99                         #interrupt-cells = <2>;
 100                         gpio-controller;
 101                         #gpio-cells = <2>;
 102                         clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
 103                 };
 104
 105                 pmc: pmc@e0018000 {
 106                         compatible = "microchip,sama7g5-pmc", "syscon";
 107                         reg = <0xe0018000 0x200>;
 108                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 109                         #clock-cells = <2>;
 110                         clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
 111                         clock-names = "td_slck", "md_slck", "main_xtal";
 112                 };
 113
 114                 rtt: rtt@e001d020 {
 115                         compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
 116                         reg = <0xe001d020 0x30>;
 117                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 118                         clocks = <&clk32k 0>;
 119                 };
 120
 121                 clk32k: clock-controller@e001d050 {
 122                         compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
 123                         reg = <0xe001d050 0x4>;
 124                         clocks = <&slow_xtal>;
 125                         #clock-cells = <1>;
 126                 };
 127
 128                 gpbr: gpbr@e001d060 {
 129                         compatible = "microchip,sama7g5-gpbr", "syscon";
 130                         reg = <0xe001d060 0x48>;
 131                 };
 132
 133                 ps_wdt: watchdog@e001d180 {
 134                         compatible = "microchip,sama7g5-wdt";
 135                         reg = <0xe001d180 0x24>;
 136                         interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 137                         clocks = <&clk32k 0>;
 138                 };
 139
 140                 sdmmc0: mmc@e1204000 {
 141                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 142                         reg = <0xe1204000 0x4000>;
 143                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 144                         clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
 145                         clock-names = "hclock", "multclk";
 146                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 147                         assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
 148                         assigned-clock-rates = <200000000>;
 149                         microchip,sdcal-inverted;
 150                         status = "disabled";
 151                 };
 152
 153                 sdmmc1: mmc@e1208000 {
 154                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 155                         reg = <0xe1208000 0x4000>;
 156                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 157                         clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
 158                         clock-names = "hclock", "multclk";
 159                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 160                         assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
 161                         assigned-clock-rates = <200000000>;
 162                         microchip,sdcal-inverted;
 163                         status = "disabled";
 164                 };
 165
 166                 sdmmc2: mmc@e120c000 {
 167                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 168                         reg = <0xe120c000 0x4000>;
 169                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 170                         clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
 171                         clock-names = "hclock", "multclk";
 172                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 173                         assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
 174                         assigned-clock-rates = <200000000>;
 175                         microchip,sdcal-inverted;
 176                         status = "disabled";
 177                 };
 178
 179                 pwm: pwm@e1604000 {
 180                         compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
 181                         reg = <0xe1604000 0x4000>;
 182                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 183                         #pwm-cells = <3>;
 184                         clocks = <&pmc PMC_TYPE_PERIPHERAL 77>;
 185                         status = "disabled";
 186                 };
 187
 188                 spdifrx: spdifrx@e1614000 {
 189                         #sound-dai-cells = <0>;
 190                         compatible = "microchip,sama7g5-spdifrx";
 191                         reg = <0xe1614000 0x4000>;
 192                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 193                         dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>;
 194                         dma-names = "rx";
 195                         clocks = <&pmc PMC_TYPE_PERIPHERAL 84>, <&pmc PMC_TYPE_GCK 84>;
 196                         clock-names = "pclk", "gclk";
 197                         status = "disabled";
 198                 };
 199
 200                 spdiftx: spdiftx@e1618000 {
 201                         #sound-dai-cells = <0>;
 202                         compatible = "microchip,sama7g5-spdiftx";
 203                         reg = <0xe1618000 0x4000>;
 204                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 205                         dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>;
 206                         dma-names = "tx";
 207                         clocks = <&pmc PMC_TYPE_PERIPHERAL 85>, <&pmc PMC_TYPE_GCK 85>;
 208                         clock-names = "pclk", "gclk";
 209                 };
 210
 211                 i2s0: i2s@e161c000 {
 212                         compatible = "microchip,sama7g5-i2smcc";
 213                         #sound-dai-cells = <0>;
 214                         reg = <0xe161c000 0x4000>;
 215                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 216                         dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>;
 217                         dma-names = "tx", "rx";
 218                         clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
 219                         clock-names = "pclk", "gclk";
 220                         status = "disabled";
 221                 };
 222
 223                 i2s1: i2s@e1620000 {
 224                         compatible = "microchip,sama7g5-i2smcc";
 225                         #sound-dai-cells = <0>;
 226                         reg = <0xe1620000 0x4000>;
 227                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 228                         dmas = <&dma0 AT91_XDMAC_DT_PERID(36)>, <&dma0 AT91_XDMAC_DT_PERID(35)>;
 229                         dma-names = "tx", "rx";
 230                         clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
 231                         clock-names = "pclk", "gclk";
 232                         status = "disabled";
 233                 };
 234
 235                 pit64b0: timer@e1800000 {
 236                         compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
 237                         reg = <0xe1800000 0x4000>;
 238                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 239                         clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
 240                         clock-names = "pclk", "gclk";
 241                 };
 242
 243                 pit64b1: timer@e1804000 {
 244                         compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
 245                         reg = <0xe1804000 0x4000>;
 246                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 247                         clocks = <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>;
 248                         clock-names = "pclk", "gclk";
 249                 };
 250
 251                 flx0: flexcom@e1818000 {
 252                         compatible = "atmel,sama5d2-flexcom";
 253                         reg = <0xe1818000 0x200>;
 254                         clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 255                         #address-cells = <1>;
 256                         #size-cells = <1>;
 257                         ranges = <0x0 0xe1818000 0x800>;
 258                         status = "disabled";
 259
 260                         uart0: serial@200 {
 261                                 compatible = "atmel,at91sam9260-usart";
 262                                 reg = <0x200 0x200>;
 263                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 264                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 265                                 clock-names = "usart";
 266                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
 267                                         <&dma1 AT91_XDMAC_DT_PERID(5)>;
 268                                 dma-names = "tx", "rx";
 269                                 atmel,use-dma-rx;
 270                                 atmel,use-dma-tx;
 271                                 status = "disabled";
 272                         };
 273                 };
 274
 275                 flx1: flexcom@e181c000 {
 276                         compatible = "atmel,sama5d2-flexcom";
 277                         reg = <0xe181c000 0x200>;
 278                         clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
 279                         #address-cells = <1>;
 280                         #size-cells = <1>;
 281                         ranges = <0x0 0xe181c000 0x800>;
 282                         status = "disabled";
 283
 284                         i2c1: i2c@600 {
 285                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 286                                 reg = <0x600 0x200>;
 287                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 288                                 #address-cells = <1>;
 289                                 #size-cells = <0>;
 290                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
 291                                 atmel,fifo-size = <32>;
 292                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
 293                                         <&dma0 AT91_XDMAC_DT_PERID(8)>;
 294                                 dma-names = "rx", "tx";
 295                                 atmel,use-dma-rx;
 296                                 atmel,use-dma-tx;
 297                                 status = "disabled";
 298                         };
 299                 };
 300
 301                 flx3: flexcom@e1824000 {
 302                         compatible = "atmel,sama5d2-flexcom";
 303                         reg = <0xe1824000 0x200>;
 304                         clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 305                         #address-cells = <1>;
 306                         #size-cells = <1>;
 307                         ranges = <0x0 0xe1824000 0x800>;
 308                         status = "disabled";
 309
 310                         uart3: serial@200 {
 311                                 compatible = "atmel,at91sam9260-usart";
 312                                 reg = <0x200 0x200>;
 313                                 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 314                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 315                                 clock-names = "usart";
 316                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>,
 317                                         <&dma1 AT91_XDMAC_DT_PERID(11)>;
 318                                 dma-names = "tx", "rx";
 319                                 atmel,use-dma-rx;
 320                                 atmel,use-dma-tx;
 321                                 status = "disabled";
 322                         };
 323                 };
 324
 325                 trng: rng@e2010000 {
 326                         compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
 327                         reg = <0xe2010000 0x100>;
 328                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 329                         clocks = <&pmc PMC_TYPE_PERIPHERAL 97>;
 330                         status = "disabled";
 331                 };
 332
 333                 flx4: flexcom@e2018000 {
 334                         compatible = "atmel,sama5d2-flexcom";
 335                         reg = <0xe2018000 0x200>;
 336                         clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 337                         #address-cells = <1>;
 338                         #size-cells = <1>;
 339                         ranges = <0x0 0xe2018000 0x800>;
 340                         status = "disabled";
 341
 342                         uart4: serial@200 {
 343                                 compatible = "atmel,at91sam9260-usart";
 344                                 reg = <0x200 0x200>;
 345                                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 346                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 347                                 clock-names = "usart";
 348                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
 349                                         <&dma1 AT91_XDMAC_DT_PERID(13)>;
 350                                 dma-names = "tx", "rx";
 351                                 atmel,use-dma-rx;
 352                                 atmel,use-dma-tx;
 353                                 atmel,fifo-size = <16>;
 354                                 status = "disabled";
 355                         };
 356                 };
 357
 358                 flx7: flexcom@e2024000 {
 359                         compatible = "atmel,sama5d2-flexcom";
 360                         reg = <0xe2024000 0x200>;
 361                         clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 362                         #address-cells = <1>;
 363                         #size-cells = <1>;
 364                         ranges = <0x0 0xe2024000 0x800>;
 365                         status = "disabled";
 366
 367                         uart7: serial@200 {
 368                                 compatible = "atmel,at91sam9260-usart";
 369                                 reg = <0x200 0x200>;
 370                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 371                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 372                                 clock-names = "usart";
 373                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
 374                                         <&dma1 AT91_XDMAC_DT_PERID(19)>;
 375                                 dma-names = "tx", "rx";
 376                                 atmel,use-dma-rx;
 377                                 atmel,use-dma-tx;
 378                                 atmel,fifo-size = <16>;
 379                                 status = "disabled";
 380                         };
 381                 };
 382
 383                 gmac0: ethernet@e2800000 {
 384                         compatible = "microchip,sama7g5-gem";
 385                         reg = <0xe2800000 0x1000>;
 386                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
 387                                       GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
 388                                       GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
 389                                       GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
 390                                       GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
 391                                       GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 392                         clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
 393                         clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
 394                         assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
 395                         assigned-clock-rates = <125000000>;
 396                         status = "disabled";
 397                 };
 398
 399                 gmac1: ethernet@e2804000 {
 400                         compatible = "microchip,sama7g5-emac";
 401                         reg = <0xe2804000 0x1000>;
 402                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
 403                                       GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 404                         clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
 405                         clock-names = "pclk", "hclk";
 406                         status = "disabled";
 407                 };
 408
 409                 dma0: dma-controller@e2808000 {
 410                         compatible = "microchip,sama7g5-dma";
 411                         reg = <0xe2808000 0x1000>;
 412                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 413                         #dma-cells = <1>;
 414                         clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 415                         clock-names = "dma_clk";
 416                         status = "disabled";
 417                 };
 418
 419                 dma1: dma-controller@e280c000 {
 420                         compatible = "microchip,sama7g5-dma";
 421                         reg = <0xe280c000 0x1000>;
 422                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 423                         #dma-cells = <1>;
 424                         clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 425                         clock-names = "dma_clk";
 426                         status = "disabled";
 427                 };
 428
 429                 /* Place dma2 here despite it's address */
 430                 dma2: dma-controller@e1200000 {
 431                         compatible = "microchip,sama7g5-dma";
 432                         reg = <0xe1200000 0x1000>;
 433                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 434                         #dma-cells = <1>;
 435                         clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
 436                         clock-names = "dma_clk";
 437                         dma-requests = <0>;
 438                         status = "disabled";
 439                 };
 440
 441                 flx8: flexcom@e2818000 {
 442                         compatible = "atmel,sama5d2-flexcom";
 443                         reg = <0xe2818000 0x200>;
 444                         clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
 445                         #address-cells = <1>;
 446                         #size-cells = <1>;
 447                         ranges = <0x0 0xe2818000 0x800>;
 448                         status = "disabled";
 449
 450                         i2c8: i2c@600 {
 451                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 452                                 reg = <0x600 0x200>;
 453                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 454                                 #address-cells = <1>;
 455                                 #size-cells = <0>;
 456                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
 457                                 atmel,fifo-size = <32>;
 458                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
 459                                         <&dma0 AT91_XDMAC_DT_PERID(22)>;
 460                                 dma-names = "rx", "tx";
 461                                 atmel,use-dma-rx;
 462                                 atmel,use-dma-tx;
 463                                 status = "disabled";
 464                         };
 465                 };
 466
 467                 flx9: flexcom@e281c000 {
 468                         compatible = "atmel,sama5d2-flexcom";
 469                         reg = <0xe281c000 0x200>;
 470                         clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 471                         #address-cells = <1>;
 472                         #size-cells = <1>;
 473                         ranges = <0x0 0xe281c000 0x800>;
 474                         status = "disabled";
 475
 476                         i2c9: i2c@600 {
 477                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 478                                 reg = <0x600 0x200>;
 479                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 480                                 #address-cells = <1>;
 481                                 #size-cells = <0>;
 482                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 483                                 atmel,fifo-size = <32>;
 484                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>,
 485                                         <&dma0 AT91_XDMAC_DT_PERID(24)>;
 486                                 dma-names = "rx", "tx";
 487                                 atmel,use-dma-rx;
 488                                 atmel,use-dma-tx;
 489                                 status = "disabled";
 490                         };
 491                 };
 492
 493                 flx11: flexcom@e2824000 {
 494                         compatible = "atmel,sama5d2-flexcom";
 495                         reg = <0xe2824000 0x200>;
 496                         clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
 497                         #address-cells = <1>;
 498                         #size-cells = <1>;
 499                         ranges = <0x0 0xe2824000 0x800>;
 500                         status = "disabled";
 501
 502                         spi11: spi@400 {
 503                                 compatible = "atmel,at91rm9200-spi";
 504                                 reg = <0x400 0x200>;
 505                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 506                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
 507                                 clock-names = "spi_clk";
 508                                 #address-cells = <1>;
 509                                 #size-cells = <0>;
 510                                 atmel,fifo-size = <32>;
 511                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
 512                                             <&dma0 AT91_XDMAC_DT_PERID(28)>;
 513                                 dma-names = "rx", "tx";
 514                                 status = "disabled";
 515                         };
 516                 };
 517
 518                 gic: interrupt-controller@e8c11000 {
 519                         compatible = "arm,cortex-a7-gic";
 520                         #interrupt-cells = <3>;
 521                         #address-cells = <0>;
 522                         interrupt-controller;
 523                         interrupt-parent;
 524                         reg = <0xe8c11000 0x1000>,
 525                                 <0xe8c12000 0x2000>;
 526                 };
 527         };
 528 };