arch/arm/boot/dts/r8a7790.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car H2 (R8A77900) SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corporation
   6  * Copyright (C) 2013-2014 Renesas Solutions Corp.
   7  * Copyright (C) 2014 Cogent Embedded Inc.
   8  */
   9
  10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/power/r8a7790-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7790";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &iic0;
  26                 i2c5 = &iic1;
  27                 i2c6 = &iic2;
  28                 i2c7 = &iic3;
  29                 spi0 = &qspi;
  30                 spi1 = &msiof0;
  31                 spi2 = &msiof1;
  32                 spi3 = &msiof2;
  33                 spi4 = &msiof3;
  34                 vin0 = &vin0;
  35                 vin1 = &vin1;
  36                 vin2 = &vin2;
  37                 vin3 = &vin3;
  38         };
  39
  40         /*
  41          * The external audio clocks are configured as 0 Hz fixed frequency
  42          * clocks by default.
  43          * Boards that provide audio clocks should override them.
  44          */
  45         audio_clk_a: audio_clk_a {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <0>;
  49         };
  50         audio_clk_b: audio_clk_b {
  51                 compatible = "fixed-clock";
  52                 #clock-cells = <0>;
  53                 clock-frequency = <0>;
  54         };
  55         audio_clk_c: audio_clk_c {
  56                 compatible = "fixed-clock";
  57                 #clock-cells = <0>;
  58                 clock-frequency = <0>;
  59         };
  60
  61         /* External CAN clock */
  62         can_clk: can {
  63                 compatible = "fixed-clock";
  64                 #clock-cells = <0>;
  65                 /* This value must be overridden by the board. */
  66                 clock-frequency = <0>;
  67         };
  68
  69         cpus {
  70                 #address-cells = <1>;
  71                 #size-cells = <0>;
  72
  73                 cpu0: cpu@0 {
  74                         device_type = "cpu";
  75                         compatible = "arm,cortex-a15";
  76                         reg = <0>;
  77                         clock-frequency = <1300000000>;
  78                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
  79                         power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
  80                         enable-method = "renesas,apmu";
  81                         next-level-cache = <&L2_CA15>;
  82                         capacity-dmips-mhz = <1024>;
  83                         voltage-tolerance = <1>; /* 1% */
  84                         clock-latency = <300000>; /* 300 us */
  85
  86                         /* kHz - uV - OPPs unknown yet */
  87                         operating-points = <1400000 1000000>,
  88                                            <1225000 1000000>,
  89                                            <1050000 1000000>,
  90                                            < 875000 1000000>,
  91                                            < 700000 1000000>,
  92                                            < 350000 1000000>;
  93                 };
  94
  95                 cpu1: cpu@1 {
  96                         device_type = "cpu";
  97                         compatible = "arm,cortex-a15";
  98                         reg = <1>;
  99                         clock-frequency = <1300000000>;
 100                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
 101                         power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
 102                         enable-method = "renesas,apmu";
 103                         next-level-cache = <&L2_CA15>;
 104                         capacity-dmips-mhz = <1024>;
 105                         voltage-tolerance = <1>; /* 1% */
 106                         clock-latency = <300000>; /* 300 us */
 107
 108                         /* kHz - uV - OPPs unknown yet */
 109                         operating-points = <1400000 1000000>,
 110                                            <1225000 1000000>,
 111                                            <1050000 1000000>,
 112                                            < 875000 1000000>,
 113                                            < 700000 1000000>,
 114                                            < 350000 1000000>;
 115                 };
 116
 117                 cpu2: cpu@2 {
 118                         device_type = "cpu";
 119                         compatible = "arm,cortex-a15";
 120                         reg = <2>;
 121                         clock-frequency = <1300000000>;
 122                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
 123                         power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
 124                         enable-method = "renesas,apmu";
 125                         next-level-cache = <&L2_CA15>;
 126                         capacity-dmips-mhz = <1024>;
 127                         voltage-tolerance = <1>; /* 1% */
 128                         clock-latency = <300000>; /* 300 us */
 129
 130                         /* kHz - uV - OPPs unknown yet */
 131                         operating-points = <1400000 1000000>,
 132                                            <1225000 1000000>,
 133                                            <1050000 1000000>,
 134                                            < 875000 1000000>,
 135                                            < 700000 1000000>,
 136                                            < 350000 1000000>;
 137                 };
 138
 139                 cpu3: cpu@3 {
 140                         device_type = "cpu";
 141                         compatible = "arm,cortex-a15";
 142                         reg = <3>;
 143                         clock-frequency = <1300000000>;
 144                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
 145                         power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
 146                         enable-method = "renesas,apmu";
 147                         next-level-cache = <&L2_CA15>;
 148                         capacity-dmips-mhz = <1024>;
 149                         voltage-tolerance = <1>; /* 1% */
 150                         clock-latency = <300000>; /* 300 us */
 151
 152                         /* kHz - uV - OPPs unknown yet */
 153                         operating-points = <1400000 1000000>,
 154                                            <1225000 1000000>,
 155                                            <1050000 1000000>,
 156                                            < 875000 1000000>,
 157                                            < 700000 1000000>,
 158                                            < 350000 1000000>;
 159                 };
 160
 161                 cpu4: cpu@100 {
 162                         device_type = "cpu";
 163                         compatible = "arm,cortex-a7";
 164                         reg = <0x100>;
 165                         clock-frequency = <780000000>;
 166                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 167                         power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
 168                         enable-method = "renesas,apmu";
 169                         next-level-cache = <&L2_CA7>;
 170                         capacity-dmips-mhz = <539>;
 171                 };
 172
 173                 cpu5: cpu@101 {
 174                         device_type = "cpu";
 175                         compatible = "arm,cortex-a7";
 176                         reg = <0x101>;
 177                         clock-frequency = <780000000>;
 178                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 179                         power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
 180                         enable-method = "renesas,apmu";
 181                         next-level-cache = <&L2_CA7>;
 182                         capacity-dmips-mhz = <539>;
 183                 };
 184
 185                 cpu6: cpu@102 {
 186                         device_type = "cpu";
 187                         compatible = "arm,cortex-a7";
 188                         reg = <0x102>;
 189                         clock-frequency = <780000000>;
 190                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 191                         power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
 192                         enable-method = "renesas,apmu";
 193                         next-level-cache = <&L2_CA7>;
 194                         capacity-dmips-mhz = <539>;
 195                 };
 196
 197                 cpu7: cpu@103 {
 198                         device_type = "cpu";
 199                         compatible = "arm,cortex-a7";
 200                         reg = <0x103>;
 201                         clock-frequency = <780000000>;
 202                         clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
 203                         power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
 204                         enable-method = "renesas,apmu";
 205                         next-level-cache = <&L2_CA7>;
 206                         capacity-dmips-mhz = <539>;
 207                 };
 208
 209                 L2_CA15: cache-controller-0 {
 210                         compatible = "cache";
 211                         power-domains = <&sysc R8A7790_PD_CA15_SCU>;
 212                         cache-unified;
 213                         cache-level = <2>;
 214                 };
 215
 216                 L2_CA7: cache-controller-1 {
 217                         compatible = "cache";
 218                         power-domains = <&sysc R8A7790_PD_CA7_SCU>;
 219                         cache-unified;
 220                         cache-level = <2>;
 221                 };
 222         };
 223
 224         /* External root clock */
 225         extal_clk: extal {
 226                 compatible = "fixed-clock";
 227                 #clock-cells = <0>;
 228                 /* This value must be overridden by the board. */
 229                 clock-frequency = <0>;
 230         };
 231
 232         /* External PCIe clock - can be overridden by the board */
 233         pcie_bus_clk: pcie_bus {
 234                 compatible = "fixed-clock";
 235                 #clock-cells = <0>;
 236                 clock-frequency = <0>;
 237         };
 238
 239         pmu-0 {
 240                 compatible = "arm,cortex-a15-pmu";
 241                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 242                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 243                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 244                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 245                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 246         };
 247
 248         pmu-1 {
 249                 compatible = "arm,cortex-a7-pmu";
 250                 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
 251                                       <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
 252                                       <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 253                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 254                 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
 255         };
 256
 257         /* External SCIF clock */
 258         scif_clk: scif {
 259                 compatible = "fixed-clock";
 260                 #clock-cells = <0>;
 261                 /* This value must be overridden by the board. */
 262                 clock-frequency = <0>;
 263         };
 264
 265         soc {
 266                 compatible = "simple-bus";
 267                 interrupt-parent = <&gic>;
 268
 269                 #address-cells = <2>;
 270                 #size-cells = <2>;
 271                 ranges;
 272
 273                 rwdt: watchdog@e6020000 {
 274                         compatible = "renesas,r8a7790-wdt",
 275                                      "renesas,rcar-gen2-wdt";
 276                         reg = <0 0xe6020000 0 0x0c>;
 277                         clocks = <&cpg CPG_MOD 402>;
 278                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 279                         resets = <&cpg 402>;
 280                         status = "disabled";
 281                 };
 282
 283                 gpio0: gpio@e6050000 {
 284                         compatible = "renesas,gpio-r8a7790",
 285                                      "renesas,rcar-gen2-gpio";
 286                         reg = <0 0xe6050000 0 0x50>;
 287                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 288                         #gpio-cells = <2>;
 289                         gpio-controller;
 290                         gpio-ranges = <&pfc 0 0 32>;
 291                         #interrupt-cells = <2>;
 292                         interrupt-controller;
 293                         clocks = <&cpg CPG_MOD 912>;
 294                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 295                         resets = <&cpg 912>;
 296                 };
 297
 298                 gpio1: gpio@e6051000 {
 299                         compatible = "renesas,gpio-r8a7790",
 300                                      "renesas,rcar-gen2-gpio";
 301                         reg = <0 0xe6051000 0 0x50>;
 302                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 303                         #gpio-cells = <2>;
 304                         gpio-controller;
 305                         gpio-ranges = <&pfc 0 32 30>;
 306                         #interrupt-cells = <2>;
 307                         interrupt-controller;
 308                         clocks = <&cpg CPG_MOD 911>;
 309                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 310                         resets = <&cpg 911>;
 311                 };
 312
 313                 gpio2: gpio@e6052000 {
 314                         compatible = "renesas,gpio-r8a7790",
 315                                      "renesas,rcar-gen2-gpio";
 316                         reg = <0 0xe6052000 0 0x50>;
 317                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 318                         #gpio-cells = <2>;
 319                         gpio-controller;
 320                         gpio-ranges = <&pfc 0 64 30>;
 321                         #interrupt-cells = <2>;
 322                         interrupt-controller;
 323                         clocks = <&cpg CPG_MOD 910>;
 324                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 325                         resets = <&cpg 910>;
 326                 };
 327
 328                 gpio3: gpio@e6053000 {
 329                         compatible = "renesas,gpio-r8a7790",
 330                                      "renesas,rcar-gen2-gpio";
 331                         reg = <0 0xe6053000 0 0x50>;
 332                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 333                         #gpio-cells = <2>;
 334                         gpio-controller;
 335                         gpio-ranges = <&pfc 0 96 32>;
 336                         #interrupt-cells = <2>;
 337                         interrupt-controller;
 338                         clocks = <&cpg CPG_MOD 909>;
 339                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 340                         resets = <&cpg 909>;
 341                 };
 342
 343                 gpio4: gpio@e6054000 {
 344                         compatible = "renesas,gpio-r8a7790",
 345                                      "renesas,rcar-gen2-gpio";
 346                         reg = <0 0xe6054000 0 0x50>;
 347                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 348                         #gpio-cells = <2>;
 349                         gpio-controller;
 350                         gpio-ranges = <&pfc 0 128 32>;
 351                         #interrupt-cells = <2>;
 352                         interrupt-controller;
 353                         clocks = <&cpg CPG_MOD 908>;
 354                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 355                         resets = <&cpg 908>;
 356                 };
 357
 358                 gpio5: gpio@e6055000 {
 359                         compatible = "renesas,gpio-r8a7790",
 360                                      "renesas,rcar-gen2-gpio";
 361                         reg = <0 0xe6055000 0 0x50>;
 362                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 363                         #gpio-cells = <2>;
 364                         gpio-controller;
 365                         gpio-ranges = <&pfc 0 160 32>;
 366                         #interrupt-cells = <2>;
 367                         interrupt-controller;
 368                         clocks = <&cpg CPG_MOD 907>;
 369                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 370                         resets = <&cpg 907>;
 371                 };
 372
 373                 pfc: pinctrl@e6060000 {
 374                         compatible = "renesas,pfc-r8a7790";
 375                         reg = <0 0xe6060000 0 0x250>;
 376                 };
 377
 378                 cpg: clock-controller@e6150000 {
 379                         compatible = "renesas,r8a7790-cpg-mssr";
 380                         reg = <0 0xe6150000 0 0x1000>;
 381                         clocks = <&extal_clk>, <&usb_extal_clk>;
 382                         clock-names = "extal", "usb_extal";
 383                         #clock-cells = <2>;
 384                         #power-domain-cells = <0>;
 385                         #reset-cells = <1>;
 386                 };
 387
 388                 apmu@e6151000 {
 389                         compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 390                         reg = <0 0xe6151000 0 0x188>;
 391                         cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
 392                 };
 393
 394                 apmu@e6152000 {
 395                         compatible = "renesas,r8a7790-apmu", "renesas,apmu";
 396                         reg = <0 0xe6152000 0 0x188>;
 397                         cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 398                 };
 399
 400                 rst: reset-controller@e6160000 {
 401                         compatible = "renesas,r8a7790-rst";
 402                         reg = <0 0xe6160000 0 0x0100>;
 403                 };
 404
 405                 sysc: system-controller@e6180000 {
 406                         compatible = "renesas,r8a7790-sysc";
 407                         reg = <0 0xe6180000 0 0x0200>;
 408                         #power-domain-cells = <1>;
 409                 };
 410
 411                 irqc0: interrupt-controller@e61c0000 {
 412                         compatible = "renesas,irqc-r8a7790", "renesas,irqc";
 413                         #interrupt-cells = <2>;
 414                         interrupt-controller;
 415                         reg = <0 0xe61c0000 0 0x200>;
 416                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 417                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 418                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 419                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 420                         clocks = <&cpg CPG_MOD 407>;
 421                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 422                         resets = <&cpg 407>;
 423                 };
 424
 425                 thermal: thermal@e61f0000 {
 426                         compatible = "renesas,thermal-r8a7790",
 427                                      "renesas,rcar-gen2-thermal",
 428                                      "renesas,rcar-thermal";
 429                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 430                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 431                         clocks = <&cpg CPG_MOD 522>;
 432                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 433                         resets = <&cpg 522>;
 434                         #thermal-sensor-cells = <0>;
 435                 };
 436
 437                 ipmmu_sy0: iommu@e6280000 {
 438                         compatible = "renesas,ipmmu-r8a7790",
 439                                      "renesas,ipmmu-vmsa";
 440                         reg = <0 0xe6280000 0 0x1000>;
 441                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 442                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 443                         #iommu-cells = <1>;
 444                         status = "disabled";
 445                 };
 446
 447                 ipmmu_sy1: iommu@e6290000 {
 448                         compatible = "renesas,ipmmu-r8a7790",
 449                                      "renesas,ipmmu-vmsa";
 450                         reg = <0 0xe6290000 0 0x1000>;
 451                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 452                         #iommu-cells = <1>;
 453                         status = "disabled";
 454                 };
 455
 456                 ipmmu_ds: iommu@e6740000 {
 457                         compatible = "renesas,ipmmu-r8a7790",
 458                                      "renesas,ipmmu-vmsa";
 459                         reg = <0 0xe6740000 0 0x1000>;
 460                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 461                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 462                         #iommu-cells = <1>;
 463                         status = "disabled";
 464                 };
 465
 466                 ipmmu_mp: iommu@ec680000 {
 467                         compatible = "renesas,ipmmu-r8a7790",
 468                                      "renesas,ipmmu-vmsa";
 469                         reg = <0 0xec680000 0 0x1000>;
 470                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 471                         #iommu-cells = <1>;
 472                         status = "disabled";
 473                 };
 474
 475                 ipmmu_mx: iommu@fe951000 {
 476                         compatible = "renesas,ipmmu-r8a7790",
 477                                      "renesas,ipmmu-vmsa";
 478                         reg = <0 0xfe951000 0 0x1000>;
 479                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 481                         #iommu-cells = <1>;
 482                         status = "disabled";
 483                 };
 484
 485                 ipmmu_rt: iommu@ffc80000 {
 486                         compatible = "renesas,ipmmu-r8a7790",
 487                                      "renesas,ipmmu-vmsa";
 488                         reg = <0 0xffc80000 0 0x1000>;
 489                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
 490                         #iommu-cells = <1>;
 491                         status = "disabled";
 492                 };
 493
 494                 icram0: sram@e63a0000 {
 495                         compatible = "mmio-sram";
 496                         reg = <0 0xe63a0000 0 0x12000>;
 497                         #address-cells = <1>;
 498                         #size-cells = <1>;
 499                         ranges = <0 0 0xe63a0000 0x12000>;
 500                 };
 501
 502                 icram1: sram@e63c0000 {
 503                         compatible = "mmio-sram";
 504                         reg = <0 0xe63c0000 0 0x1000>;
 505                         #address-cells = <1>;
 506                         #size-cells = <1>;
 507                         ranges = <0 0 0xe63c0000 0x1000>;
 508
 509                         smp-sram@0 {
 510                                 compatible = "renesas,smp-sram";
 511                                 reg = <0 0x100>;
 512                         };
 513                 };
 514
 515                 i2c0: i2c@e6508000 {
 516                         #address-cells = <1>;
 517                         #size-cells = <0>;
 518                         compatible = "renesas,i2c-r8a7790",
 519                                      "renesas,rcar-gen2-i2c";
 520                         reg = <0 0xe6508000 0 0x40>;
 521                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 522                         clocks = <&cpg CPG_MOD 931>;
 523                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 524                         resets = <&cpg 931>;
 525                         i2c-scl-internal-delay-ns = <110>;
 526                         status = "disabled";
 527                 };
 528
 529                 i2c1: i2c@e6518000 {
 530                         #address-cells = <1>;
 531                         #size-cells = <0>;
 532                         compatible = "renesas,i2c-r8a7790",
 533                                      "renesas,rcar-gen2-i2c";
 534                         reg = <0 0xe6518000 0 0x40>;
 535                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 536                         clocks = <&cpg CPG_MOD 930>;
 537                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 538                         resets = <&cpg 930>;
 539                         i2c-scl-internal-delay-ns = <6>;
 540                         status = "disabled";
 541                 };
 542
 543                 i2c2: i2c@e6530000 {
 544                         #address-cells = <1>;
 545                         #size-cells = <0>;
 546                         compatible = "renesas,i2c-r8a7790",
 547                                      "renesas,rcar-gen2-i2c";
 548                         reg = <0 0xe6530000 0 0x40>;
 549                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 550                         clocks = <&cpg CPG_MOD 929>;
 551                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 552                         resets = <&cpg 929>;
 553                         i2c-scl-internal-delay-ns = <6>;
 554                         status = "disabled";
 555                 };
 556
 557                 i2c3: i2c@e6540000 {
 558                         #address-cells = <1>;
 559                         #size-cells = <0>;
 560                         compatible = "renesas,i2c-r8a7790",
 561                                      "renesas,rcar-gen2-i2c";
 562                         reg = <0 0xe6540000 0 0x40>;
 563                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 564                         clocks = <&cpg CPG_MOD 928>;
 565                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 566                         resets = <&cpg 928>;
 567                         i2c-scl-internal-delay-ns = <110>;
 568                         status = "disabled";
 569                 };
 570
 571                 iic0: i2c@e6500000 {
 572                         #address-cells = <1>;
 573                         #size-cells = <0>;
 574                         compatible = "renesas,iic-r8a7790",
 575                                      "renesas,rcar-gen2-iic",
 576                                      "renesas,rmobile-iic";
 577                         reg = <0 0xe6500000 0 0x425>;
 578                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 579                         clocks = <&cpg CPG_MOD 318>;
 580                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 581                                <&dmac1 0x61>, <&dmac1 0x62>;
 582                         dma-names = "tx", "rx", "tx", "rx";
 583                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 584                         resets = <&cpg 318>;
 585                         status = "disabled";
 586                 };
 587
 588                 iic1: i2c@e6510000 {
 589                         #address-cells = <1>;
 590                         #size-cells = <0>;
 591                         compatible = "renesas,iic-r8a7790",
 592                                      "renesas,rcar-gen2-iic",
 593                                      "renesas,rmobile-iic";
 594                         reg = <0 0xe6510000 0 0x425>;
 595                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 596                         clocks = <&cpg CPG_MOD 323>;
 597                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 598                                <&dmac1 0x65>, <&dmac1 0x66>;
 599                         dma-names = "tx", "rx", "tx", "rx";
 600                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 601                         resets = <&cpg 323>;
 602                         status = "disabled";
 603                 };
 604
 605                 iic2: i2c@e6520000 {
 606                         #address-cells = <1>;
 607                         #size-cells = <0>;
 608                         compatible = "renesas,iic-r8a7790",
 609                                      "renesas,rcar-gen2-iic",
 610                                      "renesas,rmobile-iic";
 611                         reg = <0 0xe6520000 0 0x425>;
 612                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 613                         clocks = <&cpg CPG_MOD 300>;
 614                         dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 615                                <&dmac1 0x69>, <&dmac1 0x6a>;
 616                         dma-names = "tx", "rx", "tx", "rx";
 617                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 618                         resets = <&cpg 300>;
 619                         status = "disabled";
 620                 };
 621
 622                 iic3: i2c@e60b0000 {
 623                         #address-cells = <1>;
 624                         #size-cells = <0>;
 625                         compatible = "renesas,iic-r8a7790",
 626                                      "renesas,rcar-gen2-iic",
 627                                      "renesas,rmobile-iic";
 628                         reg = <0 0xe60b0000 0 0x425>;
 629                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 630                         clocks = <&cpg CPG_MOD 926>;
 631                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 632                                <&dmac1 0x77>, <&dmac1 0x78>;
 633                         dma-names = "tx", "rx", "tx", "rx";
 634                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 635                         resets = <&cpg 926>;
 636                         status = "disabled";
 637                 };
 638
 639                 hsusb: usb@e6590000 {
 640                         compatible = "renesas,usbhs-r8a7790",
 641                                      "renesas,rcar-gen2-usbhs";
 642                         reg = <0 0xe6590000 0 0x100>;
 643                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 644                         clocks = <&cpg CPG_MOD 704>;
 645                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 646                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 647                         dma-names = "ch0", "ch1", "ch2", "ch3";
 648                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 649                         resets = <&cpg 704>;
 650                         renesas,buswait = <4>;
 651                         phys = <&usb0 1>;
 652                         phy-names = "usb";
 653                         status = "disabled";
 654                 };
 655
 656                 usbphy: usb-phy@e6590100 {
 657                         compatible = "renesas,usb-phy-r8a7790",
 658                                      "renesas,rcar-gen2-usb-phy";
 659                         reg = <0 0xe6590100 0 0x100>;
 660                         #address-cells = <1>;
 661                         #size-cells = <0>;
 662                         clocks = <&cpg CPG_MOD 704>;
 663                         clock-names = "usbhs";
 664                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 665                         resets = <&cpg 704>;
 666                         status = "disabled";
 667
 668                         usb0: usb-channel@0 {
 669                                 reg = <0>;
 670                                 #phy-cells = <1>;
 671                         };
 672                         usb2: usb-channel@2 {
 673                                 reg = <2>;
 674                                 #phy-cells = <1>;
 675                         };
 676                 };
 677
 678                 usb_dmac0: dma-controller@e65a0000 {
 679                         compatible = "renesas,r8a7790-usb-dmac",
 680                                      "renesas,usb-dmac";
 681                         reg = <0 0xe65a0000 0 0x100>;
 682                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 683                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 684                         interrupt-names = "ch0", "ch1";
 685                         clocks = <&cpg CPG_MOD 330>;
 686                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 687                         resets = <&cpg 330>;
 688                         #dma-cells = <1>;
 689                         dma-channels = <2>;
 690                 };
 691
 692                 usb_dmac1: dma-controller@e65b0000 {
 693                         compatible = "renesas,r8a7790-usb-dmac",
 694                                      "renesas,usb-dmac";
 695                         reg = <0 0xe65b0000 0 0x100>;
 696                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 697                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 698                         interrupt-names = "ch0", "ch1";
 699                         clocks = <&cpg CPG_MOD 331>;
 700                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 701                         resets = <&cpg 331>;
 702                         #dma-cells = <1>;
 703                         dma-channels = <2>;
 704                 };
 705
 706                 dmac0: dma-controller@e6700000 {
 707                         compatible = "renesas,dmac-r8a7790",
 708                                      "renesas,rcar-dmac";
 709                         reg = <0 0xe6700000 0 0x20000>;
 710                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 711                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 712                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 713                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 714                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 715                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 716                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 717                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 718                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 719                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 720                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 721                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 722                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 723                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 724                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 725                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 726                         interrupt-names = "error",
 727                                           "ch0", "ch1", "ch2", "ch3",
 728                                           "ch4", "ch5", "ch6", "ch7",
 729                                           "ch8", "ch9", "ch10", "ch11",
 730                                           "ch12", "ch13", "ch14";
 731                         clocks = <&cpg CPG_MOD 219>;
 732                         clock-names = "fck";
 733                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 734                         resets = <&cpg 219>;
 735                         #dma-cells = <1>;
 736                         dma-channels = <15>;
 737                 };
 738
 739                 dmac1: dma-controller@e6720000 {
 740                         compatible = "renesas,dmac-r8a7790",
 741                                      "renesas,rcar-dmac";
 742                         reg = <0 0xe6720000 0 0x20000>;
 743                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 744                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 745                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 746                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 747                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 748                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 749                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 750                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 751                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 752                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 753                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 754                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 755                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 756                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 757                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 758                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 759                         interrupt-names = "error",
 760                                           "ch0", "ch1", "ch2", "ch3",
 761                                           "ch4", "ch5", "ch6", "ch7",
 762                                           "ch8", "ch9", "ch10", "ch11",
 763                                           "ch12", "ch13", "ch14";
 764                         clocks = <&cpg CPG_MOD 218>;
 765                         clock-names = "fck";
 766                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 767                         resets = <&cpg 218>;
 768                         #dma-cells = <1>;
 769                         dma-channels = <15>;
 770                 };
 771
 772                 avb: ethernet@e6800000 {
 773                         compatible = "renesas,etheravb-r8a7790",
 774                                      "renesas,etheravb-rcar-gen2";
 775                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 776                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 777                         clocks = <&cpg CPG_MOD 812>;
 778                         clock-names = "fck";
 779                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 780                         resets = <&cpg 812>;
 781                         #address-cells = <1>;
 782                         #size-cells = <0>;
 783                         status = "disabled";
 784                 };
 785
 786                 qspi: spi@e6b10000 {
 787                         compatible = "renesas,qspi-r8a7790", "renesas,qspi";
 788                         reg = <0 0xe6b10000 0 0x2c>;
 789                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 790                         clocks = <&cpg CPG_MOD 917>;
 791                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 792                                <&dmac1 0x17>, <&dmac1 0x18>;
 793                         dma-names = "tx", "rx", "tx", "rx";
 794                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 795                         resets = <&cpg 917>;
 796                         num-cs = <1>;
 797                         #address-cells = <1>;
 798                         #size-cells = <0>;
 799                         status = "disabled";
 800                 };
 801
 802                 scifa0: serial@e6c40000 {
 803                         compatible = "renesas,scifa-r8a7790",
 804                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 805                         reg = <0 0xe6c40000 0 64>;
 806                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 807                         clocks = <&cpg CPG_MOD 204>;
 808                         clock-names = "fck";
 809                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 810                                <&dmac1 0x21>, <&dmac1 0x22>;
 811                         dma-names = "tx", "rx", "tx", "rx";
 812                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 813                         resets = <&cpg 204>;
 814                         status = "disabled";
 815                 };
 816
 817                 scifa1: serial@e6c50000 {
 818                         compatible = "renesas,scifa-r8a7790",
 819                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 820                         reg = <0 0xe6c50000 0 64>;
 821                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 822                         clocks = <&cpg CPG_MOD 203>;
 823                         clock-names = "fck";
 824                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 825                                <&dmac1 0x25>, <&dmac1 0x26>;
 826                         dma-names = "tx", "rx", "tx", "rx";
 827                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 828                         resets = <&cpg 203>;
 829                         status = "disabled";
 830                 };
 831
 832                 scifa2: serial@e6c60000 {
 833                         compatible = "renesas,scifa-r8a7790",
 834                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 835                         reg = <0 0xe6c60000 0 64>;
 836                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 837                         clocks = <&cpg CPG_MOD 202>;
 838                         clock-names = "fck";
 839                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 840                                <&dmac1 0x27>, <&dmac1 0x28>;
 841                         dma-names = "tx", "rx", "tx", "rx";
 842                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 843                         resets = <&cpg 202>;
 844                         status = "disabled";
 845                 };
 846
 847                 scifb0: serial@e6c20000 {
 848                         compatible = "renesas,scifb-r8a7790",
 849                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 850                         reg = <0 0xe6c20000 0 0x100>;
 851                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 852                         clocks = <&cpg CPG_MOD 206>;
 853                         clock-names = "fck";
 854                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 855                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 856                         dma-names = "tx", "rx", "tx", "rx";
 857                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 858                         resets = <&cpg 206>;
 859                         status = "disabled";
 860                 };
 861
 862                 scifb1: serial@e6c30000 {
 863                         compatible = "renesas,scifb-r8a7790",
 864                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 865                         reg = <0 0xe6c30000 0 0x100>;
 866                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 867                         clocks = <&cpg CPG_MOD 207>;
 868                         clock-names = "fck";
 869                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 870                                <&dmac1 0x19>, <&dmac1 0x1a>;
 871                         dma-names = "tx", "rx", "tx", "rx";
 872                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 873                         resets = <&cpg 207>;
 874                         status = "disabled";
 875                 };
 876
 877                 scifb2: serial@e6ce0000 {
 878                         compatible = "renesas,scifb-r8a7790",
 879                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 880                         reg = <0 0xe6ce0000 0 0x100>;
 881                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 882                         clocks = <&cpg CPG_MOD 216>;
 883                         clock-names = "fck";
 884                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 885                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 886                         dma-names = "tx", "rx", "tx", "rx";
 887                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 888                         resets = <&cpg 216>;
 889                         status = "disabled";
 890                 };
 891
 892                 scif0: serial@e6e60000 {
 893                         compatible = "renesas,scif-r8a7790",
 894                                      "renesas,rcar-gen2-scif",
 895                                      "renesas,scif";
 896                         reg = <0 0xe6e60000 0 64>;
 897                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 898                         clocks = <&cpg CPG_MOD 721>,
 899                                  <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
 900                         clock-names = "fck", "brg_int", "scif_clk";
 901                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 902                                <&dmac1 0x29>, <&dmac1 0x2a>;
 903                         dma-names = "tx", "rx", "tx", "rx";
 904                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 905                         resets = <&cpg 721>;
 906                         status = "disabled";
 907                 };
 908
 909                 scif1: serial@e6e68000 {
 910                         compatible = "renesas,scif-r8a7790",
 911                                      "renesas,rcar-gen2-scif",
 912                                      "renesas,scif";
 913                         reg = <0 0xe6e68000 0 64>;
 914                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 915                         clocks = <&cpg CPG_MOD 720>,
 916                                  <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
 917                         clock-names = "fck", "brg_int", "scif_clk";
 918                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 919                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 920                         dma-names = "tx", "rx", "tx", "rx";
 921                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 922                         resets = <&cpg 720>;
 923                         status = "disabled";
 924                 };
 925
 926                 scif2: serial@e6e56000 {
 927                         compatible = "renesas,scif-r8a7790",
 928                                      "renesas,rcar-gen2-scif",
 929                                      "renesas,scif";
 930                         reg = <0 0xe6e56000 0 64>;
 931                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 932                         clocks = <&cpg CPG_MOD 310>,
 933                                  <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
 934                         clock-names = "fck", "brg_int", "scif_clk";
 935                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 936                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 937                         dma-names = "tx", "rx", "tx", "rx";
 938                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 939                         resets = <&cpg 310>;
 940                         status = "disabled";
 941                 };
 942
 943                 hscif0: serial@e62c0000 {
 944                         compatible = "renesas,hscif-r8a7790",
 945                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 946                         reg = <0 0xe62c0000 0 96>;
 947                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 948                         clocks = <&cpg CPG_MOD 717>,
 949                                  <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
 950                         clock-names = "fck", "brg_int", "scif_clk";
 951                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 952                                <&dmac1 0x39>, <&dmac1 0x3a>;
 953                         dma-names = "tx", "rx", "tx", "rx";
 954                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 955                         resets = <&cpg 717>;
 956                         status = "disabled";
 957                 };
 958
 959                 hscif1: serial@e62c8000 {
 960                         compatible = "renesas,hscif-r8a7790",
 961                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 962                         reg = <0 0xe62c8000 0 96>;
 963                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 964                         clocks = <&cpg CPG_MOD 716>,
 965                                  <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
 966                         clock-names = "fck", "brg_int", "scif_clk";
 967                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 968                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 969                         dma-names = "tx", "rx", "tx", "rx";
 970                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 971                         resets = <&cpg 716>;
 972                         status = "disabled";
 973                 };
 974
 975                 msiof0: spi@e6e20000 {
 976                         compatible = "renesas,msiof-r8a7790",
 977                                      "renesas,rcar-gen2-msiof";
 978                         reg = <0 0xe6e20000 0 0x0064>;
 979                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 980                         clocks = <&cpg CPG_MOD 0>;
 981                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 982                                <&dmac1 0x51>, <&dmac1 0x52>;
 983                         dma-names = "tx", "rx", "tx", "rx";
 984                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 985                         resets = <&cpg 0>;
 986                         #address-cells = <1>;
 987                         #size-cells = <0>;
 988                         status = "disabled";
 989                 };
 990
 991                 msiof1: spi@e6e10000 {
 992                         compatible = "renesas,msiof-r8a7790",
 993                                      "renesas,rcar-gen2-msiof";
 994                         reg = <0 0xe6e10000 0 0x0064>;
 995                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 996                         clocks = <&cpg CPG_MOD 208>;
 997                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 998                                <&dmac1 0x55>, <&dmac1 0x56>;
 999                         dma-names = "tx", "rx", "tx", "rx";
1000                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1001                         resets = <&cpg 208>;
1002                         #address-cells = <1>;
1003                         #size-cells = <0>;
1004                         status = "disabled";
1005                 };
1006
1007                 msiof2: spi@e6e00000 {
1008                         compatible = "renesas,msiof-r8a7790",
1009                                      "renesas,rcar-gen2-msiof";
1010                         reg = <0 0xe6e00000 0 0x0064>;
1011                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1012                         clocks = <&cpg CPG_MOD 205>;
1013                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1014                                <&dmac1 0x41>, <&dmac1 0x42>;
1015                         dma-names = "tx", "rx", "tx", "rx";
1016                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1017                         resets = <&cpg 205>;
1018                         #address-cells = <1>;
1019                         #size-cells = <0>;
1020                         status = "disabled";
1021                 };
1022
1023                 msiof3: spi@e6c90000 {
1024                         compatible = "renesas,msiof-r8a7790",
1025                                      "renesas,rcar-gen2-msiof";
1026                         reg = <0 0xe6c90000 0 0x0064>;
1027                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1028                         clocks = <&cpg CPG_MOD 215>;
1029                         dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1030                                <&dmac1 0x45>, <&dmac1 0x46>;
1031                         dma-names = "tx", "rx", "tx", "rx";
1032                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1033                         resets = <&cpg 215>;
1034                         #address-cells = <1>;
1035                         #size-cells = <0>;
1036                         status = "disabled";
1037                 };
1038
1039                 can0: can@e6e80000 {
1040                         compatible = "renesas,can-r8a7790",
1041                                      "renesas,rcar-gen2-can";
1042                         reg = <0 0xe6e80000 0 0x1000>;
1043                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1044                         clocks = <&cpg CPG_MOD 916>,
1045                                  <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1046                         clock-names = "clkp1", "clkp2", "can_clk";
1047                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1048                         resets = <&cpg 916>;
1049                         status = "disabled";
1050                 };
1051
1052                 can1: can@e6e88000 {
1053                         compatible = "renesas,can-r8a7790",
1054                                      "renesas,rcar-gen2-can";
1055                         reg = <0 0xe6e88000 0 0x1000>;
1056                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1057                         clocks = <&cpg CPG_MOD 915>,
1058                                  <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1059                         clock-names = "clkp1", "clkp2", "can_clk";
1060                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1061                         resets = <&cpg 915>;
1062                         status = "disabled";
1063                 };
1064
1065                 vin0: video@e6ef0000 {
1066                         compatible = "renesas,vin-r8a7790",
1067                                      "renesas,rcar-gen2-vin";
1068                         reg = <0 0xe6ef0000 0 0x1000>;
1069                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1070                         clocks = <&cpg CPG_MOD 811>;
1071                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1072                         resets = <&cpg 811>;
1073                         status = "disabled";
1074                 };
1075
1076                 vin1: video@e6ef1000 {
1077                         compatible = "renesas,vin-r8a7790",
1078                                      "renesas,rcar-gen2-vin";
1079                         reg = <0 0xe6ef1000 0 0x1000>;
1080                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1081                         clocks = <&cpg CPG_MOD 810>;
1082                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1083                         resets = <&cpg 810>;
1084                         status = "disabled";
1085                 };
1086
1087                 vin2: video@e6ef2000 {
1088                         compatible = "renesas,vin-r8a7790",
1089                                      "renesas,rcar-gen2-vin";
1090                         reg = <0 0xe6ef2000 0 0x1000>;
1091                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1092                         clocks = <&cpg CPG_MOD 809>;
1093                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1094                         resets = <&cpg 809>;
1095                         status = "disabled";
1096                 };
1097
1098                 vin3: video@e6ef3000 {
1099                         compatible = "renesas,vin-r8a7790",
1100                                      "renesas,rcar-gen2-vin";
1101                         reg = <0 0xe6ef3000 0 0x1000>;
1102                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1103                         clocks = <&cpg CPG_MOD 808>;
1104                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1105                         resets = <&cpg 808>;
1106                         status = "disabled";
1107                 };
1108
1109                 rcar_sound: sound@ec500000 {
1110                         /*
1111                          * #sound-dai-cells is required
1112                          *
1113                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1114                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1115                          */
1116                         compatible = "renesas,rcar_sound-r8a7790",
1117                                      "renesas,rcar_sound-gen2";
1118                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1119                               <0 0xec5a0000 0 0x100>,  /* ADG */
1120                               <0 0xec540000 0 0x1000>, /* SSIU */
1121                               <0 0xec541000 0 0x280>,  /* SSI */
1122                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1123                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1124
1125                         clocks = <&cpg CPG_MOD 1005>,
1126                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1127                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1128                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1129                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1130                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1131                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1132                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1133                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1134                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1135                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1136                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1137                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1138                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1139                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1140                                  <&cpg CPG_CORE R8A7790_CLK_M2>;
1141                         clock-names = "ssi-all",
1142                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1143                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1144                                       "ssi.1", "ssi.0",
1145                                       "src.9", "src.8", "src.7", "src.6",
1146                                       "src.5", "src.4", "src.3", "src.2",
1147                                       "src.1", "src.0",
1148                                       "ctu.0", "ctu.1",
1149                                       "mix.0", "mix.1",
1150                                       "dvc.0", "dvc.1",
1151                                       "clk_a", "clk_b", "clk_c", "clk_i";
1152                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1153                         resets = <&cpg 1005>,
1154                                  <&cpg 1006>, <&cpg 1007>,
1155                                  <&cpg 1008>, <&cpg 1009>,
1156                                  <&cpg 1010>, <&cpg 1011>,
1157                                  <&cpg 1012>, <&cpg 1013>,
1158                                  <&cpg 1014>, <&cpg 1015>;
1159                         reset-names = "ssi-all",
1160                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1161                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1162                                       "ssi.1", "ssi.0";
1163
1164                         status = "disabled";
1165
1166                         rcar_sound,dvc {
1167                                 dvc0: dvc-0 {
1168                                         dmas = <&audma1 0xbc>;
1169                                         dma-names = "tx";
1170                                 };
1171                                 dvc1: dvc-1 {
1172                                         dmas = <&audma1 0xbe>;
1173                                         dma-names = "tx";
1174                                 };
1175                         };
1176
1177                         rcar_sound,mix {
1178                                 mix0: mix-0 { };
1179                                 mix1: mix-1 { };
1180                         };
1181
1182                         rcar_sound,ctu {
1183                                 ctu00: ctu-0 { };
1184                                 ctu01: ctu-1 { };
1185                                 ctu02: ctu-2 { };
1186                                 ctu03: ctu-3 { };
1187                                 ctu10: ctu-4 { };
1188                                 ctu11: ctu-5 { };
1189                                 ctu12: ctu-6 { };
1190                                 ctu13: ctu-7 { };
1191                         };
1192
1193                         rcar_sound,src {
1194                                 src0: src-0 {
1195                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1196                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1197                                         dma-names = "rx", "tx";
1198                                 };
1199                                 src1: src-1 {
1200                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1201                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1202                                         dma-names = "rx", "tx";
1203                                 };
1204                                 src2: src-2 {
1205                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1206                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1207                                         dma-names = "rx", "tx";
1208                                 };
1209                                 src3: src-3 {
1210                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1211                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1212                                         dma-names = "rx", "tx";
1213                                 };
1214                                 src4: src-4 {
1215                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1216                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1217                                         dma-names = "rx", "tx";
1218                                 };
1219                                 src5: src-5 {
1220                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1221                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1222                                         dma-names = "rx", "tx";
1223                                 };
1224                                 src6: src-6 {
1225                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1226                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1227                                         dma-names = "rx", "tx";
1228                                 };
1229                                 src7: src-7 {
1230                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1231                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1232                                         dma-names = "rx", "tx";
1233                                 };
1234                                 src8: src-8 {
1235                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1236                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1237                                         dma-names = "rx", "tx";
1238                                 };
1239                                 src9: src-9 {
1240                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1241                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1242                                         dma-names = "rx", "tx";
1243                                 };
1244                         };
1245
1246                         rcar_sound,ssi {
1247                                 ssi0: ssi-0 {
1248                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1249                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1250                                                <&audma0 0x15>, <&audma1 0x16>;
1251                                         dma-names = "rx", "tx", "rxu", "txu";
1252                                 };
1253                                 ssi1: ssi-1 {
1254                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1255                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1256                                                <&audma0 0x49>, <&audma1 0x4a>;
1257                                         dma-names = "rx", "tx", "rxu", "txu";
1258                                 };
1259                                 ssi2: ssi-2 {
1260                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1261                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1262                                                <&audma0 0x63>, <&audma1 0x64>;
1263                                         dma-names = "rx", "tx", "rxu", "txu";
1264                                 };
1265                                 ssi3: ssi-3 {
1266                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1267                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1268                                                <&audma0 0x6f>, <&audma1 0x70>;
1269                                         dma-names = "rx", "tx", "rxu", "txu";
1270                                 };
1271                                 ssi4: ssi-4 {
1272                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1273                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1274                                                <&audma0 0x71>, <&audma1 0x72>;
1275                                         dma-names = "rx", "tx", "rxu", "txu";
1276                                 };
1277                                 ssi5: ssi-5 {
1278                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1279                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1280                                                <&audma0 0x73>, <&audma1 0x74>;
1281                                         dma-names = "rx", "tx", "rxu", "txu";
1282                                 };
1283                                 ssi6: ssi-6 {
1284                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1285                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1286                                                <&audma0 0x75>, <&audma1 0x76>;
1287                                         dma-names = "rx", "tx", "rxu", "txu";
1288                                 };
1289                                 ssi7: ssi-7 {
1290                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1291                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1292                                                <&audma0 0x79>, <&audma1 0x7a>;
1293                                         dma-names = "rx", "tx", "rxu", "txu";
1294                                 };
1295                                 ssi8: ssi-8 {
1296                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1297                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1298                                                <&audma0 0x7b>, <&audma1 0x7c>;
1299                                         dma-names = "rx", "tx", "rxu", "txu";
1300                                 };
1301                                 ssi9: ssi-9 {
1302                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1303                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1304                                                <&audma0 0x7d>, <&audma1 0x7e>;
1305                                         dma-names = "rx", "tx", "rxu", "txu";
1306                                 };
1307                         };
1308                 };
1309
1310                 audma0: dma-controller@ec700000 {
1311                         compatible = "renesas,dmac-r8a7790",
1312                                      "renesas,rcar-dmac";
1313                         reg = <0 0xec700000 0 0x10000>;
1314                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1315                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1316                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1317                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1318                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1319                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1320                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1321                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1322                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1323                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1324                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1325                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1326                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1327                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1328                         interrupt-names = "error",
1329                                           "ch0", "ch1", "ch2", "ch3",
1330                                           "ch4", "ch5", "ch6", "ch7",
1331                                           "ch8", "ch9", "ch10", "ch11",
1332                                           "ch12";
1333                         clocks = <&cpg CPG_MOD 502>;
1334                         clock-names = "fck";
1335                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1336                         resets = <&cpg 502>;
1337                         #dma-cells = <1>;
1338                         dma-channels = <13>;
1339                 };
1340
1341                 audma1: dma-controller@ec720000 {
1342                         compatible = "renesas,dmac-r8a7790",
1343                                      "renesas,rcar-dmac";
1344                         reg = <0 0xec720000 0 0x10000>;
1345                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1346                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1347                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1348                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1349                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1350                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1351                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1352                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1353                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1354                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1355                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1356                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1357                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1358                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1359                         interrupt-names = "error",
1360                                           "ch0", "ch1", "ch2", "ch3",
1361                                           "ch4", "ch5", "ch6", "ch7",
1362                                           "ch8", "ch9", "ch10", "ch11",
1363                                           "ch12";
1364                         clocks = <&cpg CPG_MOD 501>;
1365                         clock-names = "fck";
1366                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1367                         resets = <&cpg 501>;
1368                         #dma-cells = <1>;
1369                         dma-channels = <13>;
1370                 };
1371
1372                 xhci: usb@ee000000 {
1373                         compatible = "renesas,xhci-r8a7790",
1374                                      "renesas,rcar-gen2-xhci";
1375                         reg = <0 0xee000000 0 0xc00>;
1376                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1377                         clocks = <&cpg CPG_MOD 328>;
1378                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1379                         resets = <&cpg 328>;
1380                         phys = <&usb2 1>;
1381                         phy-names = "usb";
1382                         status = "disabled";
1383                 };
1384
1385                 pci0: pci@ee090000 {
1386                         compatible = "renesas,pci-r8a7790",
1387                                      "renesas,pci-rcar-gen2";
1388                         device_type = "pci";
1389                         reg = <0 0xee090000 0 0xc00>,
1390                               <0 0xee080000 0 0x1100>;
1391                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1392                         clocks = <&cpg CPG_MOD 703>;
1393                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1394                         resets = <&cpg 703>;
1395                         status = "disabled";
1396
1397                         bus-range = <0 0>;
1398                         #address-cells = <3>;
1399                         #size-cells = <2>;
1400                         #interrupt-cells = <1>;
1401                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1402                         interrupt-map-mask = <0xf800 0 0 0x7>;
1403                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1404                                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1405                                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1406
1407                         usb@1,0 {
1408                                 reg = <0x800 0 0 0 0>;
1409                                 phys = <&usb0 0>;
1410                                 phy-names = "usb";
1411                         };
1412
1413                         usb@2,0 {
1414                                 reg = <0x1000 0 0 0 0>;
1415                                 phys = <&usb0 0>;
1416                                 phy-names = "usb";
1417                         };
1418                 };
1419
1420                 pci1: pci@ee0b0000 {
1421                         compatible = "renesas,pci-r8a7790",
1422                                      "renesas,pci-rcar-gen2";
1423                         device_type = "pci";
1424                         reg = <0 0xee0b0000 0 0xc00>,
1425                               <0 0xee0a0000 0 0x1100>;
1426                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1427                         clocks = <&cpg CPG_MOD 703>;
1428                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1429                         resets = <&cpg 703>;
1430                         status = "disabled";
1431
1432                         bus-range = <1 1>;
1433                         #address-cells = <3>;
1434                         #size-cells = <2>;
1435                         #interrupt-cells = <1>;
1436                         ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1437                         interrupt-map-mask = <0xf800 0 0 0x7>;
1438                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1439                                         <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1440                                         <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1441                 };
1442
1443                 pci2: pci@ee0d0000 {
1444                         compatible = "renesas,pci-r8a7790",
1445                                      "renesas,pci-rcar-gen2";
1446                         device_type = "pci";
1447                         clocks = <&cpg CPG_MOD 703>;
1448                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1449                         resets = <&cpg 703>;
1450                         reg = <0 0xee0d0000 0 0xc00>,
1451                               <0 0xee0c0000 0 0x1100>;
1452                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1453                         status = "disabled";
1454
1455                         bus-range = <2 2>;
1456                         #address-cells = <3>;
1457                         #size-cells = <2>;
1458                         #interrupt-cells = <1>;
1459                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1460                         interrupt-map-mask = <0xf800 0 0 0x7>;
1461                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1462                                         <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1463                                         <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1464
1465                         usb@1,0 {
1466                                 reg = <0x20800 0 0 0 0>;
1467                                 phys = <&usb2 0>;
1468                                 phy-names = "usb";
1469                         };
1470
1471                         usb@2,0 {
1472                                 reg = <0x21000 0 0 0 0>;
1473                                 phys = <&usb2 0>;
1474                                 phy-names = "usb";
1475                         };
1476                 };
1477
1478                 sdhi0: mmc@ee100000 {
1479                         compatible = "renesas,sdhi-r8a7790",
1480                                      "renesas,rcar-gen2-sdhi";
1481                         reg = <0 0xee100000 0 0x328>;
1482                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1483                         clocks = <&cpg CPG_MOD 314>;
1484                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1485                                <&dmac1 0xcd>, <&dmac1 0xce>;
1486                         dma-names = "tx", "rx", "tx", "rx";
1487                         max-frequency = <195000000>;
1488                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1489                         resets = <&cpg 314>;
1490                         status = "disabled";
1491                 };
1492
1493                 sdhi1: mmc@ee120000 {
1494                         compatible = "renesas,sdhi-r8a7790",
1495                                      "renesas,rcar-gen2-sdhi";
1496                         reg = <0 0xee120000 0 0x328>;
1497                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1498                         clocks = <&cpg CPG_MOD 313>;
1499                         dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1500                                <&dmac1 0xc9>, <&dmac1 0xca>;
1501                         dma-names = "tx", "rx", "tx", "rx";
1502                         max-frequency = <195000000>;
1503                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1504                         resets = <&cpg 313>;
1505                         status = "disabled";
1506                 };
1507
1508                 sdhi2: mmc@ee140000 {
1509                         compatible = "renesas,sdhi-r8a7790",
1510                                      "renesas,rcar-gen2-sdhi";
1511                         reg = <0 0xee140000 0 0x100>;
1512                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1513                         clocks = <&cpg CPG_MOD 312>;
1514                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1515                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1516                         dma-names = "tx", "rx", "tx", "rx";
1517                         max-frequency = <97500000>;
1518                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1519                         resets = <&cpg 312>;
1520                         status = "disabled";
1521                 };
1522
1523                 sdhi3: mmc@ee160000 {
1524                         compatible = "renesas,sdhi-r8a7790",
1525                                      "renesas,rcar-gen2-sdhi";
1526                         reg = <0 0xee160000 0 0x100>;
1527                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1528                         clocks = <&cpg CPG_MOD 311>;
1529                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1530                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1531                         dma-names = "tx", "rx", "tx", "rx";
1532                         max-frequency = <97500000>;
1533                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1534                         resets = <&cpg 311>;
1535                         status = "disabled";
1536                 };
1537
1538                 mmcif0: mmc@ee200000 {
1539                         compatible = "renesas,mmcif-r8a7790",
1540                                      "renesas,sh-mmcif";
1541                         reg = <0 0xee200000 0 0x80>;
1542                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1543                         clocks = <&cpg CPG_MOD 315>;
1544                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1545                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1546                         dma-names = "tx", "rx", "tx", "rx";
1547                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1548                         resets = <&cpg 315>;
1549                         reg-io-width = <4>;
1550                         status = "disabled";
1551                         max-frequency = <97500000>;
1552                 };
1553
1554                 mmcif1: mmc@ee220000 {
1555                         compatible = "renesas,mmcif-r8a7790",
1556                                      "renesas,sh-mmcif";
1557                         reg = <0 0xee220000 0 0x80>;
1558                         interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1559                         clocks = <&cpg CPG_MOD 305>;
1560                         dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1561                                <&dmac1 0xe1>, <&dmac1 0xe2>;
1562                         dma-names = "tx", "rx", "tx", "rx";
1563                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1564                         resets = <&cpg 305>;
1565                         reg-io-width = <4>;
1566                         status = "disabled";
1567                         max-frequency = <97500000>;
1568                 };
1569
1570                 sata0: sata@ee300000 {
1571                         compatible = "renesas,sata-r8a7790",
1572                                      "renesas,rcar-gen2-sata";
1573                         reg = <0 0xee300000 0 0x200000>;
1574                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1575                         clocks = <&cpg CPG_MOD 815>;
1576                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1577                         resets = <&cpg 815>;
1578                         status = "disabled";
1579                 };
1580
1581                 sata1: sata@ee500000 {
1582                         compatible = "renesas,sata-r8a7790",
1583                                      "renesas,rcar-gen2-sata";
1584                         reg = <0 0xee500000 0 0x200000>;
1585                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1586                         clocks = <&cpg CPG_MOD 814>;
1587                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1588                         resets = <&cpg 814>;
1589                         status = "disabled";
1590                 };
1591
1592                 ether: ethernet@ee700000 {
1593                         compatible = "renesas,ether-r8a7790",
1594                                      "renesas,rcar-gen2-ether";
1595                         reg = <0 0xee700000 0 0x400>;
1596                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1597                         clocks = <&cpg CPG_MOD 813>;
1598                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1599                         resets = <&cpg 813>;
1600                         phy-mode = "rmii";
1601                         #address-cells = <1>;
1602                         #size-cells = <0>;
1603                         status = "disabled";
1604                 };
1605
1606                 gic: interrupt-controller@f1001000 {
1607                         compatible = "arm,gic-400";
1608                         #interrupt-cells = <3>;
1609                         #address-cells = <0>;
1610                         interrupt-controller;
1611                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1612                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1613                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1614                         clocks = <&cpg CPG_MOD 408>;
1615                         clock-names = "clk";
1616                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1617                         resets = <&cpg 408>;
1618                 };
1619
1620                 pciec: pcie@fe000000 {
1621                         compatible = "renesas,pcie-r8a7790",
1622                                      "renesas,pcie-rcar-gen2";
1623                         reg = <0 0xfe000000 0 0x80000>;
1624                         #address-cells = <3>;
1625                         #size-cells = <2>;
1626                         bus-range = <0x00 0xff>;
1627                         device_type = "pci";
1628                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1629                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1630                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1631                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1632                         /* Map all possible DDR as inbound ranges */
1633                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1634                                      <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1635                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1636                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1637                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1638                         #interrupt-cells = <1>;
1639                         interrupt-map-mask = <0 0 0 0>;
1640                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1641                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1642                         clock-names = "pcie", "pcie_bus";
1643                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1644                         resets = <&cpg 319>;
1645                         status = "disabled";
1646                 };
1647
1648                 vsp@fe920000 {
1649                         compatible = "renesas,vsp1";
1650                         reg = <0 0xfe920000 0 0x8000>;
1651                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1652                         clocks = <&cpg CPG_MOD 130>;
1653                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1654                         resets = <&cpg 130>;
1655                 };
1656
1657                 vsp@fe928000 {
1658                         compatible = "renesas,vsp1";
1659                         reg = <0 0xfe928000 0 0x8000>;
1660                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1661                         clocks = <&cpg CPG_MOD 131>;
1662                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1663                         resets = <&cpg 131>;
1664                 };
1665
1666                 vsp@fe930000 {
1667                         compatible = "renesas,vsp1";
1668                         reg = <0 0xfe930000 0 0x8000>;
1669                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1670                         clocks = <&cpg CPG_MOD 128>;
1671                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1672                         resets = <&cpg 128>;
1673                 };
1674
1675                 vsp@fe938000 {
1676                         compatible = "renesas,vsp1";
1677                         reg = <0 0xfe938000 0 0x8000>;
1678                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1679                         clocks = <&cpg CPG_MOD 127>;
1680                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1681                         resets = <&cpg 127>;
1682                 };
1683
1684                 fdp1@fe940000 {
1685                         compatible = "renesas,fdp1";
1686                         reg = <0 0xfe940000 0 0x2400>;
1687                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1688                         clocks = <&cpg CPG_MOD 119>;
1689                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1690                         resets = <&cpg 119>;
1691                 };
1692
1693                 fdp1@fe944000 {
1694                         compatible = "renesas,fdp1";
1695                         reg = <0 0xfe944000 0 0x2400>;
1696                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1697                         clocks = <&cpg CPG_MOD 118>;
1698                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1699                         resets = <&cpg 118>;
1700                 };
1701
1702                 fdp1@fe948000 {
1703                         compatible = "renesas,fdp1";
1704                         reg = <0 0xfe948000 0 0x2400>;
1705                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1706                         clocks = <&cpg CPG_MOD 117>;
1707                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1708                         resets = <&cpg 117>;
1709                 };
1710
1711                 jpu: jpeg-codec@fe980000 {
1712                         compatible = "renesas,jpu-r8a7790",
1713                                      "renesas,rcar-gen2-jpu";
1714                         reg = <0 0xfe980000 0 0x10300>;
1715                         interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1716                         clocks = <&cpg CPG_MOD 106>;
1717                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1718                         resets = <&cpg 106>;
1719                 };
1720
1721                 du: display@feb00000 {
1722                         compatible = "renesas,du-r8a7790";
1723                         reg = <0 0xfeb00000 0 0x70000>;
1724                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1725                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1726                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1727                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1728                                  <&cpg CPG_MOD 722>;
1729                         clock-names = "du.0", "du.1", "du.2";
1730                         resets = <&cpg 724>;
1731                         reset-names = "du.0";
1732                         status = "disabled";
1733
1734                         ports {
1735                                 #address-cells = <1>;
1736                                 #size-cells = <0>;
1737
1738                                 port@0 {
1739                                         reg = <0>;
1740                                         du_out_rgb: endpoint {
1741                                         };
1742                                 };
1743                                 port@1 {
1744                                         reg = <1>;
1745                                         du_out_lvds0: endpoint {
1746                                                 remote-endpoint = <&lvds0_in>;
1747                                         };
1748                                 };
1749                                 port@2 {
1750                                         reg = <2>;
1751                                         du_out_lvds1: endpoint {
1752                                                 remote-endpoint = <&lvds1_in>;
1753                                         };
1754                                 };
1755                         };
1756                 };
1757
1758                 lvds0: lvds@feb90000 {
1759                         compatible = "renesas,r8a7790-lvds";
1760                         reg = <0 0xfeb90000 0 0x1c>;
1761                         clocks = <&cpg CPG_MOD 726>;
1762                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1763                         resets = <&cpg 726>;
1764                         status = "disabled";
1765
1766                         ports {
1767                                 #address-cells = <1>;
1768                                 #size-cells = <0>;
1769
1770                                 port@0 {
1771                                         reg = <0>;
1772                                         lvds0_in: endpoint {
1773                                                 remote-endpoint = <&du_out_lvds0>;
1774                                         };
1775                                 };
1776                                 port@1 {
1777                                         reg = <1>;
1778                                         lvds0_out: endpoint {
1779                                         };
1780                                 };
1781                         };
1782                 };
1783
1784                 lvds1: lvds@feb94000 {
1785                         compatible = "renesas,r8a7790-lvds";
1786                         reg = <0 0xfeb94000 0 0x1c>;
1787                         clocks = <&cpg CPG_MOD 725>;
1788                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1789                         resets = <&cpg 725>;
1790                         status = "disabled";
1791
1792                         ports {
1793                                 #address-cells = <1>;
1794                                 #size-cells = <0>;
1795
1796                                 port@0 {
1797                                         reg = <0>;
1798                                         lvds1_in: endpoint {
1799                                                 remote-endpoint = <&du_out_lvds1>;
1800                                         };
1801                                 };
1802                                 port@1 {
1803                                         reg = <1>;
1804                                         lvds1_out: endpoint {
1805                                         };
1806                                 };
1807                         };
1808                 };
1809
1810                 prr: chipid@ff000044 {
1811                         compatible = "renesas,prr";
1812                         reg = <0 0xff000044 0 4>;
1813                 };
1814
1815                 cmt0: timer@ffca0000 {
1816                         compatible = "renesas,r8a7790-cmt0",
1817                                      "renesas,rcar-gen2-cmt0";
1818                         reg = <0 0xffca0000 0 0x1004>;
1819                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1820                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1821                         clocks = <&cpg CPG_MOD 124>;
1822                         clock-names = "fck";
1823                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1824                         resets = <&cpg 124>;
1825
1826                         status = "disabled";
1827                 };
1828
1829                 cmt1: timer@e6130000 {
1830                         compatible = "renesas,r8a7790-cmt1",
1831                                      "renesas,rcar-gen2-cmt1";
1832                         reg = <0 0xe6130000 0 0x1004>;
1833                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1834                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1835                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1836                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1837                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1838                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1839                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1840                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1841                         clocks = <&cpg CPG_MOD 329>;
1842                         clock-names = "fck";
1843                         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1844                         resets = <&cpg 329>;
1845
1846                         status = "disabled";
1847                 };
1848         };
1849
1850         thermal-zones {
1851                 cpu_thermal: cpu-thermal {
1852                         polling-delay-passive = <0>;
1853                         polling-delay = <0>;
1854
1855                         thermal-sensors = <&thermal>;
1856
1857                         trips {
1858                                 cpu-crit {
1859                                         temperature = <95000>;
1860                                         hysteresis = <0>;
1861                                         type = "critical";
1862                                 };
1863                         };
1864                         cooling-maps {
1865                         };
1866                 };
1867         };
1868
1869         timer {
1870                 compatible = "arm,armv7-timer";
1871                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1872                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1873                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1874                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1875         };
1876
1877         /* External USB clock - can be overridden by the board */
1878         usb_extal_clk: usb_extal {
1879                 compatible = "fixed-clock";
1880                 #clock-cells = <0>;
1881                 clock-frequency = <48000000>;
1882         };
1883 };