arch/arm/boot/dts/r8a7744.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7744 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a7744-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7744";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28
  29         audio_clk_b: audio_clk_b {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         audio_clk_c: audio_clk_c {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         /* External CAN clock */
  42         can_clk: can {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 /* This value must be overridden by the board. */
  46                 clock-frequency = <0>;
  47         };
  48
  49         cpus {
  50                 #address-cells = <1>;
  51                 #size-cells = <0>;
  52
  53                 cpu0: cpu@0 {
  54                         device_type = "cpu";
  55                         compatible = "arm,cortex-a15";
  56                         reg = <0>;
  57                         clock-frequency = <1500000000>;
  58                         clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
  59                         clock-latency = <300000>; /* 300 us */
  60                         power-domains = <&sysc R8A7744_PD_CA15_CPU0>;
  61                         enable-method = "renesas,apmu";
  62                         next-level-cache = <&L2_CA15>;
  63
  64                         /* kHz - uV - OPPs unknown yet */
  65                         operating-points = <1500000 1000000>,
  66                                            <1312500 1000000>,
  67                                            <1125000 1000000>,
  68                                            < 937500 1000000>,
  69                                            < 750000 1000000>,
  70                                            < 375000 1000000>;
  71                 };
  72
  73                 cpu1: cpu@1 {
  74                         device_type = "cpu";
  75                         compatible = "arm,cortex-a15";
  76                         reg = <1>;
  77                         clock-frequency = <1500000000>;
  78                         clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
  79                         clock-latency = <300000>; /* 300 us */
  80                         power-domains = <&sysc R8A7744_PD_CA15_CPU1>;
  81                         enable-method = "renesas,apmu";
  82                         next-level-cache = <&L2_CA15>;
  83
  84                         /* kHz - uV - OPPs unknown yet */
  85                         operating-points = <1500000 1000000>,
  86                                            <1312500 1000000>,
  87                                            <1125000 1000000>,
  88                                            < 937500 1000000>,
  89                                            < 750000 1000000>,
  90                                            < 375000 1000000>;
  91                 };
  92
  93                 L2_CA15: cache-controller-0 {
  94                         compatible = "cache";
  95                         cache-unified;
  96                         cache-level = <2>;
  97                         power-domains = <&sysc R8A7744_PD_CA15_SCU>;
  98                 };
  99         };
 100
 101         /* External root clock */
 102         extal_clk: extal {
 103                 compatible = "fixed-clock";
 104                 #clock-cells = <0>;
 105                 /* This value must be overridden by the board. */
 106                 clock-frequency = <0>;
 107         };
 108
 109         /* External PCIe clock - can be overridden by the board */
 110         pcie_bus_clk: pcie_bus {
 111                 compatible = "fixed-clock";
 112                 #clock-cells = <0>;
 113                 clock-frequency = <0>;
 114         };
 115
 116         pmu {
 117                 compatible = "arm,cortex-a15-pmu";
 118                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 119                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 120                 interrupt-affinity = <&cpu0>, <&cpu1>;
 121         };
 122
 123         /* External SCIF clock */
 124         scif_clk: scif {
 125                 compatible = "fixed-clock";
 126                 #clock-cells = <0>;
 127                 /* This value must be overridden by the board. */
 128                 clock-frequency = <0>;
 129         };
 130
 131         soc {
 132                 compatible = "simple-bus";
 133                 interrupt-parent = <&gic>;
 134
 135                 #address-cells = <2>;
 136                 #size-cells = <2>;
 137                 ranges;
 138
 139                 rwdt: watchdog@e6020000 {
 140                         compatible = "renesas,r8a7744-wdt",
 141                                      "renesas,rcar-gen2-wdt";
 142                         reg = <0 0xe6020000 0 0x0c>;
 143                         clocks = <&cpg CPG_MOD 402>;
 144                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 145                         resets = <&cpg 402>;
 146                         status = "disabled";
 147                 };
 148
 149                 gpio0: gpio@e6050000 {
 150                         compatible = "renesas,gpio-r8a7744",
 151                                      "renesas,rcar-gen2-gpio";
 152                         reg = <0 0xe6050000 0 0x50>;
 153                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 154                         #gpio-cells = <2>;
 155                         gpio-controller;
 156                         gpio-ranges = <&pfc 0 0 32>;
 157                         #interrupt-cells = <2>;
 158                         interrupt-controller;
 159                         clocks = <&cpg CPG_MOD 912>;
 160                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 161                         resets = <&cpg 912>;
 162                 };
 163
 164                 gpio1: gpio@e6051000 {
 165                         compatible = "renesas,gpio-r8a7744",
 166                                      "renesas,rcar-gen2-gpio";
 167                         reg = <0 0xe6051000 0 0x50>;
 168                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 169                         #gpio-cells = <2>;
 170                         gpio-controller;
 171                         gpio-ranges = <&pfc 0 32 26>;
 172                         #interrupt-cells = <2>;
 173                         interrupt-controller;
 174                         clocks = <&cpg CPG_MOD 911>;
 175                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 176                         resets = <&cpg 911>;
 177                 };
 178
 179                 gpio2: gpio@e6052000 {
 180                         compatible = "renesas,gpio-r8a7744",
 181                                      "renesas,rcar-gen2-gpio";
 182                         reg = <0 0xe6052000 0 0x50>;
 183                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 184                         #gpio-cells = <2>;
 185                         gpio-controller;
 186                         gpio-ranges = <&pfc 0 64 32>;
 187                         #interrupt-cells = <2>;
 188                         interrupt-controller;
 189                         clocks = <&cpg CPG_MOD 910>;
 190                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 191                         resets = <&cpg 910>;
 192                 };
 193
 194                 gpio3: gpio@e6053000 {
 195                         compatible = "renesas,gpio-r8a7744",
 196                                      "renesas,rcar-gen2-gpio";
 197                         reg = <0 0xe6053000 0 0x50>;
 198                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 199                         #gpio-cells = <2>;
 200                         gpio-controller;
 201                         gpio-ranges = <&pfc 0 96 32>;
 202                         #interrupt-cells = <2>;
 203                         interrupt-controller;
 204                         clocks = <&cpg CPG_MOD 909>;
 205                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 206                         resets = <&cpg 909>;
 207                 };
 208
 209                 gpio4: gpio@e6054000 {
 210                         compatible = "renesas,gpio-r8a7744",
 211                                      "renesas,rcar-gen2-gpio";
 212                         reg = <0 0xe6054000 0 0x50>;
 213                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 214                         #gpio-cells = <2>;
 215                         gpio-controller;
 216                         gpio-ranges = <&pfc 0 128 32>;
 217                         #interrupt-cells = <2>;
 218                         interrupt-controller;
 219                         clocks = <&cpg CPG_MOD 908>;
 220                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 221                         resets = <&cpg 908>;
 222                 };
 223
 224                 gpio5: gpio@e6055000 {
 225                         compatible = "renesas,gpio-r8a7744",
 226                                      "renesas,rcar-gen2-gpio";
 227                         reg = <0 0xe6055000 0 0x50>;
 228                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 229                         #gpio-cells = <2>;
 230                         gpio-controller;
 231                         gpio-ranges = <&pfc 0 160 32>;
 232                         #interrupt-cells = <2>;
 233                         interrupt-controller;
 234                         clocks = <&cpg CPG_MOD 907>;
 235                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 236                         resets = <&cpg 907>;
 237                 };
 238
 239                 gpio6: gpio@e6055400 {
 240                         compatible = "renesas,gpio-r8a7744",
 241                                      "renesas,rcar-gen2-gpio";
 242                         reg = <0 0xe6055400 0 0x50>;
 243                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 244                         #gpio-cells = <2>;
 245                         gpio-controller;
 246                         gpio-ranges = <&pfc 0 192 32>;
 247                         #interrupt-cells = <2>;
 248                         interrupt-controller;
 249                         clocks = <&cpg CPG_MOD 905>;
 250                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 251                         resets = <&cpg 905>;
 252                 };
 253
 254                 gpio7: gpio@e6055800 {
 255                         compatible = "renesas,gpio-r8a7744",
 256                                      "renesas,rcar-gen2-gpio";
 257                         reg = <0 0xe6055800 0 0x50>;
 258                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 259                         #gpio-cells = <2>;
 260                         gpio-controller;
 261                         gpio-ranges = <&pfc 0 224 26>;
 262                         #interrupt-cells = <2>;
 263                         interrupt-controller;
 264                         clocks = <&cpg CPG_MOD 904>;
 265                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 266                         resets = <&cpg 904>;
 267                 };
 268
 269                 pfc: pinctrl@e6060000 {
 270                         compatible = "renesas,pfc-r8a7744";
 271                         reg = <0 0xe6060000 0 0x250>;
 272                 };
 273
 274                 tpu: pwm@e60f0000 {
 275                         compatible = "renesas,tpu-r8a7744", "renesas,tpu";
 276                         reg = <0 0xe60f0000 0 0x148>;
 277                         clocks = <&cpg CPG_MOD 304>;
 278                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 279                         resets = <&cpg 304>;
 280                         #pwm-cells = <3>;
 281                         status = "disabled";
 282                 };
 283
 284                 cpg: clock-controller@e6150000 {
 285                         compatible = "renesas,r8a7744-cpg-mssr";
 286                         reg = <0 0xe6150000 0 0x1000>;
 287                         clocks = <&extal_clk>, <&usb_extal_clk>;
 288                         clock-names = "extal", "usb_extal";
 289                         #clock-cells = <2>;
 290                         #power-domain-cells = <0>;
 291                         #reset-cells = <1>;
 292                 };
 293
 294                 apmu@e6152000 {
 295                         compatible = "renesas,r8a7744-apmu", "renesas,apmu";
 296                         reg = <0 0xe6152000 0 0x188>;
 297                         cpus = <&cpu0>, <&cpu1>;
 298                 };
 299
 300                 rst: reset-controller@e6160000 {
 301                         compatible = "renesas,r8a7744-rst";
 302                         reg = <0 0xe6160000 0 0x100>;
 303                 };
 304
 305                 sysc: system-controller@e6180000 {
 306                         compatible = "renesas,r8a7744-sysc";
 307                         reg = <0 0xe6180000 0 0x200>;
 308                         #power-domain-cells = <1>;
 309                 };
 310
 311                 irqc: interrupt-controller@e61c0000 {
 312                         compatible = "renesas,irqc-r8a7744", "renesas,irqc";
 313                         #interrupt-cells = <2>;
 314                         interrupt-controller;
 315                         reg = <0 0xe61c0000 0 0x200>;
 316                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 317                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 318                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 320                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 321                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 322                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 323                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 324                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 325                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 326                         clocks = <&cpg CPG_MOD 407>;
 327                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 328                         resets = <&cpg 407>;
 329                 };
 330
 331                 thermal: thermal@e61f0000 {
 332                         compatible = "renesas,thermal-r8a7744",
 333                                      "renesas,rcar-gen2-thermal";
 334                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 335                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 336                         clocks = <&cpg CPG_MOD 522>;
 337                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 338                         resets = <&cpg 522>;
 339                         #thermal-sensor-cells = <0>;
 340                 };
 341
 342                 ipmmu_sy0: iommu@e6280000 {
 343                         compatible = "renesas,ipmmu-r8a7744",
 344                                      "renesas,ipmmu-vmsa";
 345                         reg = <0 0xe6280000 0 0x1000>;
 346                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 348                         #iommu-cells = <1>;
 349                         status = "disabled";
 350                 };
 351
 352                 ipmmu_sy1: iommu@e6290000 {
 353                         compatible = "renesas,ipmmu-r8a7744",
 354                                      "renesas,ipmmu-vmsa";
 355                         reg = <0 0xe6290000 0 0x1000>;
 356                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 357                         #iommu-cells = <1>;
 358                         status = "disabled";
 359                 };
 360
 361                 ipmmu_ds: iommu@e6740000 {
 362                         compatible = "renesas,ipmmu-r8a7744",
 363                                      "renesas,ipmmu-vmsa";
 364                         reg = <0 0xe6740000 0 0x1000>;
 365                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 366                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 367                         #iommu-cells = <1>;
 368                         status = "disabled";
 369                 };
 370
 371                 ipmmu_mp: iommu@ec680000 {
 372                         compatible = "renesas,ipmmu-r8a7744",
 373                                      "renesas,ipmmu-vmsa";
 374                         reg = <0 0xec680000 0 0x1000>;
 375                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 376                         #iommu-cells = <1>;
 377                         status = "disabled";
 378                 };
 379
 380                 ipmmu_mx: iommu@fe951000 {
 381                         compatible = "renesas,ipmmu-r8a7744",
 382                                      "renesas,ipmmu-vmsa";
 383                         reg = <0 0xfe951000 0 0x1000>;
 384                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 385                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 386                         #iommu-cells = <1>;
 387                         status = "disabled";
 388                 };
 389
 390                 ipmmu_gp: iommu@e62a0000 {
 391                         compatible = "renesas,ipmmu-r8a7744",
 392                                      "renesas,ipmmu-vmsa";
 393                         reg = <0 0xe62a0000 0 0x1000>;
 394                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 395                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 396                         #iommu-cells = <1>;
 397                         status = "disabled";
 398                 };
 399
 400                 icram0: sram@e63a0000 {
 401                         compatible = "mmio-sram";
 402                         reg = <0 0xe63a0000 0 0x12000>;
 403                         #address-cells = <1>;
 404                         #size-cells = <1>;
 405                         ranges = <0 0 0xe63a0000 0x12000>;
 406                 };
 407
 408                 icram1: sram@e63c0000 {
 409                         compatible = "mmio-sram";
 410                         reg = <0 0xe63c0000 0 0x1000>;
 411                         #address-cells = <1>;
 412                         #size-cells = <1>;
 413                         ranges = <0 0 0xe63c0000 0x1000>;
 414
 415                         smp-sram@0 {
 416                                 compatible = "renesas,smp-sram";
 417                                 reg = <0 0x100>;
 418                         };
 419                 };
 420
 421                 icram2: sram@e6300000 {
 422                         compatible = "mmio-sram";
 423                         reg = <0 0xe6300000 0 0x40000>;
 424                         #address-cells = <1>;
 425                         #size-cells = <1>;
 426                         ranges = <0 0 0xe6300000 0x40000>;
 427                 };
 428
 429                 /* The memory map in the User's Manual maps the cores to
 430                  * bus numbers
 431                  */
 432                 i2c0: i2c@e6508000 {
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         compatible = "renesas,i2c-r8a7744",
 436                                      "renesas,rcar-gen2-i2c";
 437                         reg = <0 0xe6508000 0 0x40>;
 438                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 931>;
 440                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 441                         resets = <&cpg 931>;
 442                         i2c-scl-internal-delay-ns = <6>;
 443                         status = "disabled";
 444                 };
 445
 446                 i2c1: i2c@e6518000 {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         compatible = "renesas,i2c-r8a7744",
 450                                      "renesas,rcar-gen2-i2c";
 451                         reg = <0 0xe6518000 0 0x40>;
 452                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 930>;
 454                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 455                         resets = <&cpg 930>;
 456                         i2c-scl-internal-delay-ns = <6>;
 457                         status = "disabled";
 458                 };
 459
 460                 i2c2: i2c@e6530000 {
 461                         #address-cells = <1>;
 462                         #size-cells = <0>;
 463                         compatible = "renesas,i2c-r8a7744",
 464                                      "renesas,rcar-gen2-i2c";
 465                         reg = <0 0xe6530000 0 0x40>;
 466                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 467                         clocks = <&cpg CPG_MOD 929>;
 468                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 469                         resets = <&cpg 929>;
 470                         i2c-scl-internal-delay-ns = <6>;
 471                         status = "disabled";
 472                 };
 473
 474                 i2c3: i2c@e6540000 {
 475                         #address-cells = <1>;
 476                         #size-cells = <0>;
 477                         compatible = "renesas,i2c-r8a7744",
 478                                      "renesas,rcar-gen2-i2c";
 479                         reg = <0 0xe6540000 0 0x40>;
 480                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 481                         clocks = <&cpg CPG_MOD 928>;
 482                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 483                         resets = <&cpg 928>;
 484                         i2c-scl-internal-delay-ns = <6>;
 485                         status = "disabled";
 486                 };
 487
 488                 i2c4: i2c@e6520000 {
 489                         #address-cells = <1>;
 490                         #size-cells = <0>;
 491                         compatible = "renesas,i2c-r8a7744",
 492                                      "renesas,rcar-gen2-i2c";
 493                         reg = <0 0xe6520000 0 0x40>;
 494                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 495                         clocks = <&cpg CPG_MOD 927>;
 496                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 497                         resets = <&cpg 927>;
 498                         i2c-scl-internal-delay-ns = <6>;
 499                         status = "disabled";
 500                 };
 501
 502                 i2c5: i2c@e6528000 {
 503                         /* doesn't need pinmux */
 504                         #address-cells = <1>;
 505                         #size-cells = <0>;
 506                         compatible = "renesas,i2c-r8a7744",
 507                                      "renesas,rcar-gen2-i2c";
 508                         reg = <0 0xe6528000 0 0x40>;
 509                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 510                         clocks = <&cpg CPG_MOD 925>;
 511                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 512                         resets = <&cpg 925>;
 513                         i2c-scl-internal-delay-ns = <110>;
 514                         status = "disabled";
 515                 };
 516
 517                 iic0: i2c@e6500000 {
 518                         #address-cells = <1>;
 519                         #size-cells = <0>;
 520                         compatible = "renesas,iic-r8a7744",
 521                                      "renesas,rcar-gen2-iic",
 522                                      "renesas,rmobile-iic";
 523                         reg = <0 0xe6500000 0 0x425>;
 524                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 525                         clocks = <&cpg CPG_MOD 318>;
 526                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 527                                <&dmac1 0x61>, <&dmac1 0x62>;
 528                         dma-names = "tx", "rx", "tx", "rx";
 529                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 530                         resets = <&cpg 318>;
 531                         status = "disabled";
 532                 };
 533
 534                 iic1: i2c@e6510000 {
 535                         #address-cells = <1>;
 536                         #size-cells = <0>;
 537                         compatible = "renesas,iic-r8a7744",
 538                                      "renesas,rcar-gen2-iic",
 539                                      "renesas,rmobile-iic";
 540                         reg = <0 0xe6510000 0 0x425>;
 541                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 542                         clocks = <&cpg CPG_MOD 323>;
 543                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 544                                <&dmac1 0x65>, <&dmac1 0x66>;
 545                         dma-names = "tx", "rx", "tx", "rx";
 546                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 547                         resets = <&cpg 323>;
 548                         status = "disabled";
 549                 };
 550
 551                 iic3: i2c@e60b0000 {
 552                         /* doesn't need pinmux */
 553                         #address-cells = <1>;
 554                         #size-cells = <0>;
 555                         compatible = "renesas,iic-r8a7744";
 556                         reg = <0 0xe60b0000 0 0x425>;
 557                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 558                         clocks = <&cpg CPG_MOD 926>;
 559                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 560                                <&dmac1 0x77>, <&dmac1 0x78>;
 561                         dma-names = "tx", "rx", "tx", "rx";
 562                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 563                         resets = <&cpg 926>;
 564                         status = "disabled";
 565                 };
 566
 567                 hsusb: usb@e6590000 {
 568                         compatible = "renesas,usbhs-r8a7744",
 569                                      "renesas,rcar-gen2-usbhs";
 570                         reg = <0 0xe6590000 0 0x100>;
 571                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 572                         clocks = <&cpg CPG_MOD 704>;
 573                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 574                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 575                         dma-names = "ch0", "ch1", "ch2", "ch3";
 576                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 577                         resets = <&cpg 704>;
 578                         renesas,buswait = <4>;
 579                         phys = <&usb0 1>;
 580                         phy-names = "usb";
 581                         status = "disabled";
 582                 };
 583
 584                 usbphy: usb-phy@e6590100 {
 585                         compatible = "renesas,usb-phy-r8a7744",
 586                                      "renesas,rcar-gen2-usb-phy";
 587                         reg = <0 0xe6590100 0 0x100>;
 588                         #address-cells = <1>;
 589                         #size-cells = <0>;
 590                         clocks = <&cpg CPG_MOD 704>;
 591                         clock-names = "usbhs";
 592                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 593                         resets = <&cpg 704>;
 594                         status = "disabled";
 595
 596                         usb0: usb-channel@0 {
 597                                 reg = <0>;
 598                                 #phy-cells = <1>;
 599                         };
 600                         usb2: usb-channel@2 {
 601                                 reg = <2>;
 602                                 #phy-cells = <1>;
 603                         };
 604                 };
 605
 606                 usb_dmac0: dma-controller@e65a0000 {
 607                         compatible = "renesas,r8a7744-usb-dmac",
 608                                      "renesas,usb-dmac";
 609                         reg = <0 0xe65a0000 0 0x100>;
 610                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 612                         interrupt-names = "ch0", "ch1";
 613                         clocks = <&cpg CPG_MOD 330>;
 614                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 615                         resets = <&cpg 330>;
 616                         #dma-cells = <1>;
 617                         dma-channels = <2>;
 618                 };
 619
 620                 usb_dmac1: dma-controller@e65b0000 {
 621                         compatible = "renesas,r8a7744-usb-dmac",
 622                                      "renesas,usb-dmac";
 623                         reg = <0 0xe65b0000 0 0x100>;
 624                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 625                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 626                         interrupt-names = "ch0", "ch1";
 627                         clocks = <&cpg CPG_MOD 331>;
 628                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 629                         resets = <&cpg 331>;
 630                         #dma-cells = <1>;
 631                         dma-channels = <2>;
 632                 };
 633
 634                 dmac0: dma-controller@e6700000 {
 635                         compatible = "renesas,dmac-r8a7744",
 636                                      "renesas,rcar-dmac";
 637                         reg = <0 0xe6700000 0 0x20000>;
 638                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 639                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 640                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 641                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 642                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 643                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 644                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 647                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 651                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 652                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 653                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 654                         interrupt-names = "error",
 655                                           "ch0", "ch1", "ch2", "ch3",
 656                                           "ch4", "ch5", "ch6", "ch7",
 657                                           "ch8", "ch9", "ch10", "ch11",
 658                                           "ch12", "ch13", "ch14";
 659                         clocks = <&cpg CPG_MOD 219>;
 660                         clock-names = "fck";
 661                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 662                         resets = <&cpg 219>;
 663                         #dma-cells = <1>;
 664                         dma-channels = <15>;
 665                 };
 666
 667                 dmac1: dma-controller@e6720000 {
 668                         compatible = "renesas,dmac-r8a7744",
 669                                      "renesas,rcar-dmac";
 670                         reg = <0 0xe6720000 0 0x20000>;
 671                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 672                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 673                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 674                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 675                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 676                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 677                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 678                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 679                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 680                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 681                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 682                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 683                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 684                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 685                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 686                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 687                         interrupt-names = "error",
 688                                           "ch0", "ch1", "ch2", "ch3",
 689                                           "ch4", "ch5", "ch6", "ch7",
 690                                           "ch8", "ch9", "ch10", "ch11",
 691                                           "ch12", "ch13", "ch14";
 692                         clocks = <&cpg CPG_MOD 218>;
 693                         clock-names = "fck";
 694                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 695                         resets = <&cpg 218>;
 696                         #dma-cells = <1>;
 697                         dma-channels = <15>;
 698                 };
 699
 700                 avb: ethernet@e6800000 {
 701                         compatible = "renesas,etheravb-r8a7744",
 702                                      "renesas,etheravb-rcar-gen2";
 703                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 704                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 705                         clocks = <&cpg CPG_MOD 812>;
 706                         clock-names = "fck";
 707                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 708                         resets = <&cpg 812>;
 709                         #address-cells = <1>;
 710                         #size-cells = <0>;
 711                         status = "disabled";
 712                 };
 713
 714                 qspi: spi@e6b10000 {
 715                         compatible = "renesas,qspi-r8a7744", "renesas,qspi";
 716                         reg = <0 0xe6b10000 0 0x2c>;
 717                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 718                         clocks = <&cpg CPG_MOD 917>;
 719                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 720                                <&dmac1 0x17>, <&dmac1 0x18>;
 721                         dma-names = "tx", "rx", "tx", "rx";
 722                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 723                         num-cs = <1>;
 724                         #address-cells = <1>;
 725                         #size-cells = <0>;
 726                         resets = <&cpg 917>;
 727                         status = "disabled";
 728                 };
 729
 730                 scifa0: serial@e6c40000 {
 731                         compatible = "renesas,scifa-r8a7744",
 732                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 733                         reg = <0 0xe6c40000 0 0x40>;
 734                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 735                         clocks = <&cpg CPG_MOD 204>;
 736                         clock-names = "fck";
 737                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 738                                <&dmac1 0x21>, <&dmac1 0x22>;
 739                         dma-names = "tx", "rx", "tx", "rx";
 740                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 741                         resets = <&cpg 204>;
 742                         status = "disabled";
 743                 };
 744
 745                 scifa1: serial@e6c50000 {
 746                         compatible = "renesas,scifa-r8a7744",
 747                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 748                         reg = <0 0xe6c50000 0 0x40>;
 749                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 750                         clocks = <&cpg CPG_MOD 203>;
 751                         clock-names = "fck";
 752                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 753                                <&dmac1 0x25>, <&dmac1 0x26>;
 754                         dma-names = "tx", "rx", "tx", "rx";
 755                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 756                         resets = <&cpg 203>;
 757                         status = "disabled";
 758                 };
 759
 760                 scifa2: serial@e6c60000 {
 761                         compatible = "renesas,scifa-r8a7744",
 762                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 763                         reg = <0 0xe6c60000 0 0x40>;
 764                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 765                         clocks = <&cpg CPG_MOD 202>;
 766                         clock-names = "fck";
 767                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 768                                <&dmac1 0x27>, <&dmac1 0x28>;
 769                         dma-names = "tx", "rx", "tx", "rx";
 770                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 771                         resets = <&cpg 202>;
 772                         status = "disabled";
 773                 };
 774
 775                 scifa3: serial@e6c70000 {
 776                         compatible = "renesas,scifa-r8a7744",
 777                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 778                         reg = <0 0xe6c70000 0 0x40>;
 779                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 780                         clocks = <&cpg CPG_MOD 1106>;
 781                         clock-names = "fck";
 782                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 783                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 784                         dma-names = "tx", "rx", "tx", "rx";
 785                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 786                         resets = <&cpg 1106>;
 787                         status = "disabled";
 788                 };
 789
 790                 scifa4: serial@e6c78000 {
 791                         compatible = "renesas,scifa-r8a7744",
 792                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 793                         reg = <0 0xe6c78000 0 0x40>;
 794                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 795                         clocks = <&cpg CPG_MOD 1107>;
 796                         clock-names = "fck";
 797                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 798                                <&dmac1 0x1f>, <&dmac1 0x20>;
 799                         dma-names = "tx", "rx", "tx", "rx";
 800                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 801                         resets = <&cpg 1107>;
 802                         status = "disabled";
 803                 };
 804
 805                 scifa5: serial@e6c80000 {
 806                         compatible = "renesas,scifa-r8a7744",
 807                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 808                         reg = <0 0xe6c80000 0 0x40>;
 809                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 810                         clocks = <&cpg CPG_MOD 1108>;
 811                         clock-names = "fck";
 812                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 813                                <&dmac1 0x23>, <&dmac1 0x24>;
 814                         dma-names = "tx", "rx", "tx", "rx";
 815                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 816                         resets = <&cpg 1108>;
 817                         status = "disabled";
 818                 };
 819
 820                 scifb0: serial@e6c20000 {
 821                         compatible = "renesas,scifb-r8a7744",
 822                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 823                         reg = <0 0xe6c20000 0 0x100>;
 824                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 825                         clocks = <&cpg CPG_MOD 206>;
 826                         clock-names = "fck";
 827                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 828                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 829                         dma-names = "tx", "rx", "tx", "rx";
 830                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 831                         resets = <&cpg 206>;
 832                         status = "disabled";
 833                 };
 834
 835                 scifb1: serial@e6c30000 {
 836                         compatible = "renesas,scifb-r8a7744",
 837                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 838                         reg = <0 0xe6c30000 0 0x100>;
 839                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 840                         clocks = <&cpg CPG_MOD 207>;
 841                         clock-names = "fck";
 842                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 843                                <&dmac1 0x19>, <&dmac1 0x1a>;
 844                         dma-names = "tx", "rx", "tx", "rx";
 845                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 846                         resets = <&cpg 207>;
 847                         status = "disabled";
 848                 };
 849
 850                 scifb2: serial@e6ce0000 {
 851                         compatible = "renesas,scifb-r8a7744",
 852                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 853                         reg = <0 0xe6ce0000 0 0x100>;
 854                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 855                         clocks = <&cpg CPG_MOD 216>;
 856                         clock-names = "fck";
 857                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 858                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 859                         dma-names = "tx", "rx", "tx", "rx";
 860                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 861                         resets = <&cpg 216>;
 862                         status = "disabled";
 863                 };
 864
 865                 scif0: serial@e6e60000 {
 866                         compatible = "renesas,scif-r8a7744",
 867                                      "renesas,rcar-gen2-scif", "renesas,scif";
 868                         reg = <0 0xe6e60000 0 0x40>;
 869                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 870                         clocks = <&cpg CPG_MOD 721>,
 871                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 872                         clock-names = "fck", "brg_int", "scif_clk";
 873                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 874                                <&dmac1 0x29>, <&dmac1 0x2a>;
 875                         dma-names = "tx", "rx", "tx", "rx";
 876                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 877                         resets = <&cpg 721>;
 878                         status = "disabled";
 879                 };
 880
 881                 scif1: serial@e6e68000 {
 882                         compatible = "renesas,scif-r8a7744",
 883                                      "renesas,rcar-gen2-scif", "renesas,scif";
 884                         reg = <0 0xe6e68000 0 0x40>;
 885                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 886                         clocks = <&cpg CPG_MOD 720>,
 887                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 888                         clock-names = "fck", "brg_int", "scif_clk";
 889                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 890                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 891                         dma-names = "tx", "rx", "tx", "rx";
 892                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 893                         resets = <&cpg 720>;
 894                         status = "disabled";
 895                 };
 896
 897                 scif2: serial@e6e58000 {
 898                         compatible = "renesas,scif-r8a7744",
 899                                      "renesas,rcar-gen2-scif", "renesas,scif";
 900                         reg = <0 0xe6e58000 0 0x40>;
 901                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 902                         clocks = <&cpg CPG_MOD 719>,
 903                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 904                         clock-names = "fck", "brg_int", "scif_clk";
 905                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 906                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 907                         dma-names = "tx", "rx", "tx", "rx";
 908                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 909                         resets = <&cpg 719>;
 910                         status = "disabled";
 911                 };
 912
 913                 scif3: serial@e6ea8000 {
 914                         compatible = "renesas,scif-r8a7744",
 915                                      "renesas,rcar-gen2-scif", "renesas,scif";
 916                         reg = <0 0xe6ea8000 0 0x40>;
 917                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 918                         clocks = <&cpg CPG_MOD 718>,
 919                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 920                         clock-names = "fck", "brg_int", "scif_clk";
 921                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 922                                <&dmac1 0x2f>, <&dmac1 0x30>;
 923                         dma-names = "tx", "rx", "tx", "rx";
 924                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 925                         resets = <&cpg 718>;
 926                         status = "disabled";
 927                 };
 928
 929                 scif4: serial@e6ee0000 {
 930                         compatible = "renesas,scif-r8a7744",
 931                                      "renesas,rcar-gen2-scif", "renesas,scif";
 932                         reg = <0 0xe6ee0000 0 0x40>;
 933                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 934                         clocks = <&cpg CPG_MOD 715>,
 935                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 936                         clock-names = "fck", "brg_int", "scif_clk";
 937                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 938                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 939                         dma-names = "tx", "rx", "tx", "rx";
 940                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 941                         resets = <&cpg 715>;
 942                         status = "disabled";
 943                 };
 944
 945                 scif5: serial@e6ee8000 {
 946                         compatible = "renesas,scif-r8a7744",
 947                                      "renesas,rcar-gen2-scif", "renesas,scif";
 948                         reg = <0 0xe6ee8000 0 0x40>;
 949                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 950                         clocks = <&cpg CPG_MOD 714>,
 951                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 952                         clock-names = "fck", "brg_int", "scif_clk";
 953                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 954                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 955                         dma-names = "tx", "rx", "tx", "rx";
 956                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 957                         resets = <&cpg 714>;
 958                         status = "disabled";
 959                 };
 960
 961                 hscif0: serial@e62c0000 {
 962                         compatible = "renesas,hscif-r8a7744",
 963                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 964                         reg = <0 0xe62c0000 0 0x60>;
 965                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 966                         clocks = <&cpg CPG_MOD 717>,
 967                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 968                         clock-names = "fck", "brg_int", "scif_clk";
 969                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 970                                <&dmac1 0x39>, <&dmac1 0x3a>;
 971                         dma-names = "tx", "rx", "tx", "rx";
 972                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 973                         resets = <&cpg 717>;
 974                         status = "disabled";
 975                 };
 976
 977                 hscif1: serial@e62c8000 {
 978                         compatible = "renesas,hscif-r8a7744",
 979                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 980                         reg = <0 0xe62c8000 0 0x60>;
 981                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 982                         clocks = <&cpg CPG_MOD 716>,
 983                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
 984                         clock-names = "fck", "brg_int", "scif_clk";
 985                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 986                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 987                         dma-names = "tx", "rx", "tx", "rx";
 988                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
 989                         resets = <&cpg 716>;
 990                         status = "disabled";
 991                 };
 992
 993                 hscif2: serial@e62d0000 {
 994                         compatible = "renesas,hscif-r8a7744",
 995                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 996                         reg = <0 0xe62d0000 0 0x60>;
 997                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 998                         clocks = <&cpg CPG_MOD 713>,
 999                                  <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
1000                         clock-names = "fck", "brg_int", "scif_clk";
1001                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1002                                <&dmac1 0x3b>, <&dmac1 0x3c>;
1003                         dma-names = "tx", "rx", "tx", "rx";
1004                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1005                         resets = <&cpg 713>;
1006                         status = "disabled";
1007                 };
1008
1009                 msiof0: spi@e6e20000 {
1010                         compatible = "renesas,msiof-r8a7744",
1011                                      "renesas,rcar-gen2-msiof";
1012                         reg = <0 0xe6e20000 0 0x0064>;
1013                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1014                         clocks = <&cpg CPG_MOD 000>;
1015                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1016                                <&dmac1 0x51>, <&dmac1 0x52>;
1017                         dma-names = "tx", "rx", "tx", "rx";
1018                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1019                         #address-cells = <1>;
1020                         #size-cells = <0>;
1021                         resets = <&cpg 000>;
1022                         status = "disabled";
1023                 };
1024
1025                 msiof1: spi@e6e10000 {
1026                         compatible = "renesas,msiof-r8a7744",
1027                                      "renesas,rcar-gen2-msiof";
1028                         reg = <0 0xe6e10000 0 0x0064>;
1029                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1030                         clocks = <&cpg CPG_MOD 208>;
1031                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1032                                <&dmac1 0x55>, <&dmac1 0x56>;
1033                         dma-names = "tx", "rx", "tx", "rx";
1034                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1035                         #address-cells = <1>;
1036                         #size-cells = <0>;
1037                         resets = <&cpg 208>;
1038                         status = "disabled";
1039                 };
1040
1041                 msiof2: spi@e6e00000 {
1042                         compatible = "renesas,msiof-r8a7744",
1043                                      "renesas,rcar-gen2-msiof";
1044                         reg = <0 0xe6e00000 0 0x0064>;
1045                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1046                         clocks = <&cpg CPG_MOD 205>;
1047                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1048                                <&dmac1 0x41>, <&dmac1 0x42>;
1049                         dma-names = "tx", "rx", "tx", "rx";
1050                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1051                         #address-cells = <1>;
1052                         #size-cells = <0>;
1053                         resets = <&cpg 205>;
1054                         status = "disabled";
1055                 };
1056
1057                 pwm0: pwm@e6e30000 {
1058                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1059                         reg = <0 0xe6e30000 0 0x8>;
1060                         clocks = <&cpg CPG_MOD 523>;
1061                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1062                         resets = <&cpg 523>;
1063                         #pwm-cells = <2>;
1064                         status = "disabled";
1065                 };
1066
1067                 pwm1: pwm@e6e31000 {
1068                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1069                         reg = <0 0xe6e31000 0 0x8>;
1070                         clocks = <&cpg CPG_MOD 523>;
1071                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1072                         resets = <&cpg 523>;
1073                         #pwm-cells = <2>;
1074                         status = "disabled";
1075                 };
1076
1077                 pwm2: pwm@e6e32000 {
1078                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1079                         reg = <0 0xe6e32000 0 0x8>;
1080                         clocks = <&cpg CPG_MOD 523>;
1081                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1082                         resets = <&cpg 523>;
1083                         #pwm-cells = <2>;
1084                         status = "disabled";
1085                 };
1086
1087                 pwm3: pwm@e6e33000 {
1088                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1089                         reg = <0 0xe6e33000 0 0x8>;
1090                         clocks = <&cpg CPG_MOD 523>;
1091                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1092                         resets = <&cpg 523>;
1093                         #pwm-cells = <2>;
1094                         status = "disabled";
1095                 };
1096
1097                 pwm4: pwm@e6e34000 {
1098                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1099                         reg = <0 0xe6e34000 0 0x8>;
1100                         clocks = <&cpg CPG_MOD 523>;
1101                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1102                         resets = <&cpg 523>;
1103                         #pwm-cells = <2>;
1104                         status = "disabled";
1105                 };
1106
1107                 pwm5: pwm@e6e35000 {
1108                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1109                         reg = <0 0xe6e35000 0 0x8>;
1110                         clocks = <&cpg CPG_MOD 523>;
1111                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1112                         resets = <&cpg 523>;
1113                         #pwm-cells = <2>;
1114                         status = "disabled";
1115                 };
1116
1117                 pwm6: pwm@e6e36000 {
1118                         compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1119                         reg = <0 0xe6e36000 0 0x8>;
1120                         clocks = <&cpg CPG_MOD 523>;
1121                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1122                         resets = <&cpg 523>;
1123                         #pwm-cells = <2>;
1124                         status = "disabled";
1125                 };
1126
1127                 can0: can@e6e80000 {
1128                         compatible = "renesas,can-r8a7744",
1129                                      "renesas,rcar-gen2-can";
1130                         reg = <0 0xe6e80000 0 0x1000>;
1131                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1132                         clocks = <&cpg CPG_MOD 916>,
1133                                  <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1134                                  <&can_clk>;
1135                         clock-names = "clkp1", "clkp2", "can_clk";
1136                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1137                         resets = <&cpg 916>;
1138                         status = "disabled";
1139                 };
1140
1141                 can1: can@e6e88000 {
1142                         compatible = "renesas,can-r8a7744",
1143                                      "renesas,rcar-gen2-can";
1144                         reg = <0 0xe6e88000 0 0x1000>;
1145                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1146                         clocks = <&cpg CPG_MOD 915>,
1147                                  <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1148                                  <&can_clk>;
1149                         clock-names = "clkp1", "clkp2", "can_clk";
1150                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1151                         resets = <&cpg 915>;
1152                         status = "disabled";
1153                 };
1154
1155                 vin0: video@e6ef0000 {
1156                         compatible = "renesas,vin-r8a7744",
1157                                      "renesas,rcar-gen2-vin";
1158                         reg = <0 0xe6ef0000 0 0x1000>;
1159                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1160                         clocks = <&cpg CPG_MOD 811>;
1161                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1162                         resets = <&cpg 811>;
1163                         status = "disabled";
1164                 };
1165
1166                 vin1: video@e6ef1000 {
1167                         compatible = "renesas,vin-r8a7744",
1168                                      "renesas,rcar-gen2-vin";
1169                         reg = <0 0xe6ef1000 0 0x1000>;
1170                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1171                         clocks = <&cpg CPG_MOD 810>;
1172                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1173                         resets = <&cpg 810>;
1174                         status = "disabled";
1175                 };
1176
1177                 vin2: video@e6ef2000 {
1178                         compatible = "renesas,vin-r8a7744",
1179                                      "renesas,rcar-gen2-vin";
1180                         reg = <0 0xe6ef2000 0 0x1000>;
1181                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1182                         clocks = <&cpg CPG_MOD 809>;
1183                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1184                         resets = <&cpg 809>;
1185                         status = "disabled";
1186                 };
1187
1188                 rcar_sound: sound@ec500000 {
1189                         /*
1190                          * #sound-dai-cells is required
1191                          *
1192                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1193                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1194                          */
1195                         compatible = "renesas,rcar_sound-r8a7744",
1196                                      "renesas,rcar_sound-gen2";
1197                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1198                               <0 0xec5a0000 0 0x100>,  /* ADG */
1199                               <0 0xec540000 0 0x1000>, /* SSIU */
1200                               <0 0xec541000 0 0x280>,  /* SSI */
1201                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1202                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1203
1204                         clocks = <&cpg CPG_MOD 1005>,
1205                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1206                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1207                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1208                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1209                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1210                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1211                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1212                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1213                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1214                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1215                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1216                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1217                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1218                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1219                                  <&cpg CPG_CORE R8A7744_CLK_M2>;
1220                         clock-names = "ssi-all",
1221                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1222                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1223                                       "src.9", "src.8", "src.7", "src.6", "src.5",
1224                                       "src.4", "src.3", "src.2", "src.1", "src.0",
1225                                       "ctu.0", "ctu.1",
1226                                       "mix.0", "mix.1",
1227                                       "dvc.0", "dvc.1",
1228                                       "clk_a", "clk_b", "clk_c", "clk_i";
1229                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1230                         resets = <&cpg 1005>,
1231                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1232                                  <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1233                                  <&cpg 1014>, <&cpg 1015>;
1234                         reset-names = "ssi-all",
1235                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1236                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1237                         status = "disabled";
1238
1239                         rcar_sound,dvc {
1240                                 dvc0: dvc-0 {
1241                                         dmas = <&audma1 0xbc>;
1242                                         dma-names = "tx";
1243                                 };
1244                                 dvc1: dvc-1 {
1245                                         dmas = <&audma1 0xbe>;
1246                                         dma-names = "tx";
1247                                 };
1248                         };
1249
1250                         rcar_sound,mix {
1251                                 mix0: mix-0 { };
1252                                 mix1: mix-1 { };
1253                         };
1254
1255                         rcar_sound,ctu {
1256                                 ctu00: ctu-0 { };
1257                                 ctu01: ctu-1 { };
1258                                 ctu02: ctu-2 { };
1259                                 ctu03: ctu-3 { };
1260                                 ctu10: ctu-4 { };
1261                                 ctu11: ctu-5 { };
1262                                 ctu12: ctu-6 { };
1263                                 ctu13: ctu-7 { };
1264                         };
1265
1266                         rcar_sound,src {
1267                                 src0: src-0 {
1268                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1269                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1270                                         dma-names = "rx", "tx";
1271                                 };
1272                                 src1: src-1 {
1273                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1274                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1275                                         dma-names = "rx", "tx";
1276                                 };
1277                                 src2: src-2 {
1278                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1279                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1280                                         dma-names = "rx", "tx";
1281                                 };
1282                                 src3: src-3 {
1283                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1284                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1285                                         dma-names = "rx", "tx";
1286                                 };
1287                                 src4: src-4 {
1288                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1289                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1290                                         dma-names = "rx", "tx";
1291                                 };
1292                                 src5: src-5 {
1293                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1294                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1295                                         dma-names = "rx", "tx";
1296                                 };
1297                                 src6: src-6 {
1298                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1299                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1300                                         dma-names = "rx", "tx";
1301                                 };
1302                                 src7: src-7 {
1303                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1304                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1305                                         dma-names = "rx", "tx";
1306                                 };
1307                                 src8: src-8 {
1308                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1309                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1310                                         dma-names = "rx", "tx";
1311                                 };
1312                                 src9: src-9 {
1313                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1314                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1315                                         dma-names = "rx", "tx";
1316                                 };
1317                         };
1318
1319                         rcar_sound,ssi {
1320                                 ssi0: ssi-0 {
1321                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1322                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1323                                         dma-names = "rx", "tx", "rxu", "txu";
1324                                 };
1325                                 ssi1: ssi-1 {
1326                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1327                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1328                                         dma-names = "rx", "tx", "rxu", "txu";
1329                                 };
1330                                 ssi2: ssi-2 {
1331                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1332                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1333                                         dma-names = "rx", "tx", "rxu", "txu";
1334                                 };
1335                                 ssi3: ssi-3 {
1336                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1337                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1338                                         dma-names = "rx", "tx", "rxu", "txu";
1339                                 };
1340                                 ssi4: ssi-4 {
1341                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1342                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1343                                         dma-names = "rx", "tx", "rxu", "txu";
1344                                 };
1345                                 ssi5: ssi-5 {
1346                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1347                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1348                                         dma-names = "rx", "tx", "rxu", "txu";
1349                                 };
1350                                 ssi6: ssi-6 {
1351                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1352                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1353                                         dma-names = "rx", "tx", "rxu", "txu";
1354                                 };
1355                                 ssi7: ssi-7 {
1356                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1357                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1358                                         dma-names = "rx", "tx", "rxu", "txu";
1359                                 };
1360                                 ssi8: ssi-8 {
1361                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1362                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1363                                         dma-names = "rx", "tx", "rxu", "txu";
1364                                 };
1365                                 ssi9: ssi-9 {
1366                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1367                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1368                                         dma-names = "rx", "tx", "rxu", "txu";
1369                                 };
1370                         };
1371                 };
1372
1373                 audma0: dma-controller@ec700000 {
1374                         compatible = "renesas,dmac-r8a7744",
1375                                      "renesas,rcar-dmac";
1376                         reg = <0 0xec700000 0 0x10000>;
1377                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1378                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1379                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1380                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1381                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1382                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1383                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1384                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1385                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1386                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1387                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1388                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1389                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1390                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1391                         interrupt-names = "error",
1392                                           "ch0", "ch1", "ch2", "ch3",
1393                                           "ch4", "ch5", "ch6", "ch7",
1394                                           "ch8", "ch9", "ch10", "ch11",
1395                                           "ch12";
1396                         clocks = <&cpg CPG_MOD 502>;
1397                         clock-names = "fck";
1398                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1399                         resets = <&cpg 502>;
1400                         #dma-cells = <1>;
1401                         dma-channels = <13>;
1402                 };
1403
1404                 audma1: dma-controller@ec720000 {
1405                         compatible = "renesas,dmac-r8a7744",
1406                                      "renesas,rcar-dmac";
1407                         reg = <0 0xec720000 0 0x10000>;
1408                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1409                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1410                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1411                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1412                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1413                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1414                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1415                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1416                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1417                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1418                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1419                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1420                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1421                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1422                         interrupt-names = "error",
1423                                           "ch0", "ch1", "ch2", "ch3",
1424                                           "ch4", "ch5", "ch6", "ch7",
1425                                           "ch8", "ch9", "ch10", "ch11",
1426                                           "ch12";
1427                         clocks = <&cpg CPG_MOD 501>;
1428                         clock-names = "fck";
1429                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1430                         resets = <&cpg 501>;
1431                         #dma-cells = <1>;
1432                         dma-channels = <13>;
1433                 };
1434
1435                 /*
1436                  * pci1 and xhci share the same phy, therefore only one of them
1437                  * can be active at any one time. If both of them are enabled,
1438                  * a race condition will determine who'll control the phy.
1439                  * A firmware file is needed by the xhci driver in order for
1440                  * USB 3.0 to work properly.
1441                  */
1442                 xhci: usb@ee000000 {
1443                         compatible = "renesas,xhci-r8a7744",
1444                                      "renesas,rcar-gen2-xhci";
1445                         reg = <0 0xee000000 0 0xc00>;
1446                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1447                         clocks = <&cpg CPG_MOD 328>;
1448                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1449                         resets = <&cpg 328>;
1450                         phys = <&usb2 1>;
1451                         phy-names = "usb";
1452                         status = "disabled";
1453                 };
1454
1455                 pci0: pci@ee090000 {
1456                         compatible = "renesas,pci-r8a7744",
1457                                      "renesas,pci-rcar-gen2";
1458                         device_type = "pci";
1459                         reg = <0 0xee090000 0 0xc00>,
1460                               <0 0xee080000 0 0x1100>;
1461                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1462                         clocks = <&cpg CPG_MOD 703>;
1463                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1464                         resets = <&cpg 703>;
1465                         status = "disabled";
1466
1467                         bus-range = <0 0>;
1468                         #address-cells = <3>;
1469                         #size-cells = <2>;
1470                         #interrupt-cells = <1>;
1471                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1472                         interrupt-map-mask = <0xf800 0 0 0x7>;
1473                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1474                                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1475                                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1476
1477                         usb@1,0 {
1478                                 reg = <0x800 0 0 0 0>;
1479                                 phys = <&usb0 0>;
1480                                 phy-names = "usb";
1481                         };
1482
1483                         usb@2,0 {
1484                                 reg = <0x1000 0 0 0 0>;
1485                                 phys = <&usb0 0>;
1486                                 phy-names = "usb";
1487                         };
1488                 };
1489
1490                 pci1: pci@ee0d0000 {
1491                         compatible = "renesas,pci-r8a7744",
1492                                      "renesas,pci-rcar-gen2";
1493                         device_type = "pci";
1494                         reg = <0 0xee0d0000 0 0xc00>,
1495                               <0 0xee0c0000 0 0x1100>;
1496                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1497                         clocks = <&cpg CPG_MOD 703>;
1498                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1499                         resets = <&cpg 703>;
1500                         status = "disabled";
1501
1502                         bus-range = <1 1>;
1503                         #address-cells = <3>;
1504                         #size-cells = <2>;
1505                         #interrupt-cells = <1>;
1506                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1507                         interrupt-map-mask = <0xf800 0 0 0x7>;
1508                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1509                                         <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1510                                         <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1511
1512                         usb@1,0 {
1513                                 reg = <0x10800 0 0 0 0>;
1514                                 phys = <&usb2 0>;
1515                                 phy-names = "usb";
1516                         };
1517
1518                         usb@2,0 {
1519                                 reg = <0x11000 0 0 0 0>;
1520                                 phys = <&usb2 0>;
1521                                 phy-names = "usb";
1522                         };
1523                 };
1524
1525                 sdhi0: mmc@ee100000 {
1526                         compatible = "renesas,sdhi-r8a7744",
1527                                      "renesas,rcar-gen2-sdhi";
1528                         reg = <0 0xee100000 0 0x328>;
1529                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1530                         clocks = <&cpg CPG_MOD 314>;
1531                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1532                                <&dmac1 0xcd>, <&dmac1 0xce>;
1533                         dma-names = "tx", "rx", "tx", "rx";
1534                         max-frequency = <195000000>;
1535                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1536                         resets = <&cpg 314>;
1537                         status = "disabled";
1538                 };
1539
1540                 sdhi1: mmc@ee140000 {
1541                         compatible = "renesas,sdhi-r8a7744",
1542                                      "renesas,rcar-gen2-sdhi";
1543                         reg = <0 0xee140000 0 0x100>;
1544                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1545                         clocks = <&cpg CPG_MOD 312>;
1546                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1547                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1548                         dma-names = "tx", "rx", "tx", "rx";
1549                         max-frequency = <97500000>;
1550                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1551                         resets = <&cpg 312>;
1552                         status = "disabled";
1553                 };
1554
1555                 sdhi2: mmc@ee160000 {
1556                         compatible = "renesas,sdhi-r8a7744",
1557                                      "renesas,rcar-gen2-sdhi";
1558                         reg = <0 0xee160000 0 0x100>;
1559                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1560                         clocks = <&cpg CPG_MOD 311>;
1561                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1562                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1563                         dma-names = "tx", "rx", "tx", "rx";
1564                         max-frequency = <97500000>;
1565                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1566                         resets = <&cpg 311>;
1567                         status = "disabled";
1568                 };
1569
1570                 mmcif0: mmc@ee200000 {
1571                         compatible = "renesas,mmcif-r8a7744",
1572                                      "renesas,sh-mmcif";
1573                         reg = <0 0xee200000 0 0x80>;
1574                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1575                         clocks = <&cpg CPG_MOD 315>;
1576                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1577                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1578                         dma-names = "tx", "rx", "tx", "rx";
1579                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1580                         resets = <&cpg 315>;
1581                         reg-io-width = <4>;
1582                         max-frequency = <97500000>;
1583                         status = "disabled";
1584                 };
1585
1586                 gic: interrupt-controller@f1001000 {
1587                         compatible = "arm,gic-400";
1588                         #interrupt-cells = <3>;
1589                         #address-cells = <0>;
1590                         interrupt-controller;
1591                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1592                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1593                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1594                         clocks = <&cpg CPG_MOD 408>;
1595                         clock-names = "clk";
1596                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1597                         resets = <&cpg 408>;
1598                 };
1599
1600                 pciec: pcie@fe000000 {
1601                         compatible = "renesas,pcie-r8a7744",
1602                                      "renesas,pcie-rcar-gen2";
1603                         reg = <0 0xfe000000 0 0x80000>;
1604                         #address-cells = <3>;
1605                         #size-cells = <2>;
1606                         bus-range = <0x00 0xff>;
1607                         device_type = "pci";
1608                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1609                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1610                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1611                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1612                         /* Map all possible DDR as inbound ranges */
1613                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1614                                      <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1615                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1616                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1617                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1618                         #interrupt-cells = <1>;
1619                         interrupt-map-mask = <0 0 0 0>;
1620                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1621                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1622                         clock-names = "pcie", "pcie_bus";
1623                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1624                         resets = <&cpg 319>;
1625                         status = "disabled";
1626                 };
1627
1628                 vsp@fe928000 {
1629                         compatible = "renesas,vsp1";
1630                         reg = <0 0xfe928000 0 0x8000>;
1631                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1632                         clocks = <&cpg CPG_MOD 131>;
1633                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1634                         resets = <&cpg 131>;
1635                 };
1636
1637                 vsp@fe930000 {
1638                         compatible = "renesas,vsp1";
1639                         reg = <0 0xfe930000 0 0x8000>;
1640                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1641                         clocks = <&cpg CPG_MOD 128>;
1642                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1643                         resets = <&cpg 128>;
1644                 };
1645
1646                 vsp@fe938000 {
1647                         compatible = "renesas,vsp1";
1648                         reg = <0 0xfe938000 0 0x8000>;
1649                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1650                         clocks = <&cpg CPG_MOD 127>;
1651                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1652                         resets = <&cpg 127>;
1653                 };
1654
1655                 du: display@feb00000 {
1656                         compatible = "renesas,du-r8a7744";
1657                         reg = <0 0xfeb00000 0 0x40000>;
1658                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1659                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1660                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1661                         clock-names = "du.0", "du.1";
1662                         resets = <&cpg 724>;
1663                         reset-names = "du.0";
1664                         status = "disabled";
1665
1666                         ports {
1667                                 #address-cells = <1>;
1668                                 #size-cells = <0>;
1669
1670                                 port@0 {
1671                                         reg = <0>;
1672                                         du_out_rgb: endpoint {
1673                                         };
1674                                 };
1675                                 port@1 {
1676                                         reg = <1>;
1677                                         du_out_lvds0: endpoint {
1678                                                 remote-endpoint = <&lvds0_in>;
1679                                         };
1680                                 };
1681                         };
1682                 };
1683
1684                 lvds0: lvds@feb90000 {
1685                         compatible = "renesas,r8a7744-lvds";
1686                         reg = <0 0xfeb90000 0 0x1c>;
1687                         clocks = <&cpg CPG_MOD 726>;
1688                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1689                         resets = <&cpg 726>;
1690                         status = "disabled";
1691
1692                         ports {
1693                                 #address-cells = <1>;
1694                                 #size-cells = <0>;
1695
1696                                 port@0 {
1697                                         reg = <0>;
1698                                         lvds0_in: endpoint {
1699                                                 remote-endpoint = <&du_out_lvds0>;
1700                                         };
1701                                 };
1702                                 port@1 {
1703                                         reg = <1>;
1704                                         lvds0_out: endpoint {
1705                                         };
1706                                 };
1707                         };
1708                 };
1709
1710                 prr: chipid@ff000044 {
1711                         compatible = "renesas,prr";
1712                         reg = <0 0xff000044 0 4>;
1713                 };
1714
1715                 cmt0: timer@ffca0000 {
1716                         compatible = "renesas,r8a7744-cmt0",
1717                                      "renesas,rcar-gen2-cmt0";
1718                         reg = <0 0xffca0000 0 0x1004>;
1719                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1720                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1721                         clocks = <&cpg CPG_MOD 124>;
1722                         clock-names = "fck";
1723                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1724                         resets = <&cpg 124>;
1725                         status = "disabled";
1726                 };
1727
1728                 cmt1: timer@e6130000 {
1729                         compatible = "renesas,r8a7744-cmt1",
1730                                      "renesas,rcar-gen2-cmt1";
1731                         reg = <0 0xe6130000 0 0x1004>;
1732                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1733                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1734                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1735                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1736                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1737                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1738                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1739                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1740                         clocks = <&cpg CPG_MOD 329>;
1741                         clock-names = "fck";
1742                         power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1743                         resets = <&cpg 329>;
1744                         status = "disabled";
1745                 };
1746         };
1747
1748         thermal-zones {
1749                 cpu_thermal: cpu-thermal {
1750                         polling-delay-passive = <0>;
1751                         polling-delay = <0>;
1752
1753                         thermal-sensors = <&thermal>;
1754
1755                         trips {
1756                                 cpu-crit {
1757                                         temperature = <95000>;
1758                                         hysteresis = <0>;
1759                                         type = "critical";
1760                                 };
1761                         };
1762
1763                         cooling-maps {
1764                         };
1765                 };
1766         };
1767
1768         timer {
1769                 compatible = "arm,armv7-timer";
1770                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1771                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1772                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1773                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1774         };
1775
1776         /* External USB clock - can be overridden by the board */
1777         usb_extal_clk: usb_extal {
1778                 compatible = "fixed-clock";
1779                 #clock-cells = <0>;
1780                 clock-frequency = <48000000>;
1781         };
1782 };