arch/arm/boot/dts/omap5-l4.dtsi

   1 &l4_cfg {                                               /* 0x4a000000 */
   2         compatible = "ti,omap5-l4-cfg", "simple-bus";
   3         reg = <0x4a000000 0x800>,
   4               <0x4a000800 0x800>,
   5               <0x4a001000 0x1000>;
   6         reg-names = "ap", "la", "ia0";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  10                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  11                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  12                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  13                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  14                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  15                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  16
  17         segment@0 {                                     /* 0x4a000000 */
  18                 compatible = "simple-bus";
  19                 #address-cells = <1>;
  20                 #size-cells = <1>;
  21                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  22                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  23                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  24                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  25                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  26                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  27                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  28                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  29                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  30                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  31                          <0x00058000 0x00058000 0x001000>,      /* ap 10 */
  32                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  33                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  34                          <0x00008000 0x00008000 0x002000>,      /* ap 21 */
  35                          <0x0000a000 0x0000a000 0x001000>,      /* ap 22 */
  36                          <0x00066000 0x00066000 0x001000>,      /* ap 23 */
  37                          <0x00067000 0x00067000 0x001000>,      /* ap 24 */
  38                          <0x0005e000 0x0005e000 0x002000>,      /* ap 69 */
  39                          <0x00060000 0x00060000 0x001000>,      /* ap 70 */
  40                          <0x00064000 0x00064000 0x001000>,      /* ap 71 */
  41                          <0x00065000 0x00065000 0x001000>,      /* ap 72 */
  42                          <0x0005a000 0x0005a000 0x001000>,      /* ap 77 */
  43                          <0x0005b000 0x0005b000 0x001000>,      /* ap 78 */
  44                          <0x00070000 0x00070000 0x004000>,      /* ap 79 */
  45                          <0x00074000 0x00074000 0x001000>,      /* ap 80 */
  46                          <0x00075000 0x00075000 0x001000>,      /* ap 81 */
  47                          <0x00076000 0x00076000 0x001000>,      /* ap 82 */
  48                          <0x00020000 0x00020000 0x020000>,      /* ap 109 */
  49                          <0x00040000 0x00040000 0x001000>,      /* ap 110 */
  50                          <0x00059000 0x00059000 0x001000>;      /* ap 111 */
  51
  52                 target-module@2000 {                    /* 0x4a002000, ap 3 44.0 */
  53                         compatible = "ti,sysc-omap4", "ti,sysc";
  54                         reg = <0x2000 0x4>;
  55                         reg-names = "rev";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         ranges = <0x0 0x2000 0x1000>;
  59
  60                         scm_core: scm@0 {
  61                                 compatible = "ti,omap5-scm-core", "simple-bus";
  62                                 reg = <0x0 0x1000>;
  63                                 #address-cells = <1>;
  64                                 #size-cells = <1>;
  65                                 ranges = <0 0 0x800>;
  66
  67                                 scm_conf: scm_conf@0 {
  68                                         compatible = "syscon";
  69                                         reg = <0x0 0x800>;
  70                                         #address-cells = <1>;
  71                                         #size-cells = <1>;
  72                                 };
  73                         };
  74
  75                         scm_padconf_core: scm@800 {
  76                                 compatible = "ti,omap5-scm-padconf-core",
  77                                              "simple-bus";
  78                                 #address-cells = <1>;
  79                                 #size-cells = <1>;
  80                                 ranges = <0 0x800 0x800>;
  81
  82                                 omap5_pmx_core: pinmux@40 {
  83                                         compatible = "ti,omap5-padconf",
  84                                                      "pinctrl-single";
  85                                         reg = <0x40 0x01b6>;
  86                                         #address-cells = <1>;
  87                                         #size-cells = <0>;
  88                                         #pinctrl-cells = <1>;
  89                                         #interrupt-cells = <1>;
  90                                         interrupt-controller;
  91                                         pinctrl-single,register-width = <16>;
  92                                         pinctrl-single,function-mask = <0x7fff>;
  93                                 };
  94
  95                                 omap5_padconf_global: omap5_padconf_global@5a0 {
  96                                         compatible = "syscon",
  97                                                      "simple-bus";
  98                                         reg = <0x5a0 0xec>;
  99                                         #address-cells = <1>;
 100                                         #size-cells = <1>;
 101                                         ranges = <0 0x5a0 0xec>;
 102
 103                                         pbias_regulator: pbias_regulator@60 {
 104                                                 compatible = "ti,pbias-omap5", "ti,pbias-omap";
 105                                                 reg = <0x60 0x4>;
 106                                                 syscon = <&omap5_padconf_global>;
 107                                                 pbias_mmc_reg: pbias_mmc_omap5 {
 108                                                         regulator-name = "pbias_mmc_omap5";
 109                                                         regulator-min-microvolt = <1800000>;
 110                                                         regulator-max-microvolt = <3300000>;
 111                                                 };
 112                                         };
 113                                 };
 114                         };
 115                 };
 116
 117                 target-module@4000 {                    /* 0x4a004000, ap 5 5c.0 */
 118                         compatible = "ti,sysc-omap4", "ti,sysc";
 119                         reg = <0x4000 0x4>;
 120                         reg-names = "rev";
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123                         ranges = <0x0 0x4000 0x1000>;
 124
 125                         cm_core_aon: cm_core_aon@0 {
 126                                 compatible = "ti,omap5-cm-core-aon",
 127                                              "simple-bus";
 128                                 reg = <0x0 0x2000>;
 129                                 #address-cells = <1>;
 130                                 #size-cells = <1>;
 131                                 ranges = <0 0 0x1000>;
 132
 133                                 cm_core_aon_clocks: clocks {
 134                                         #address-cells = <1>;
 135                                         #size-cells = <0>;
 136                                 };
 137
 138                                 cm_core_aon_clockdomains: clockdomains {
 139                                 };
 140                         };
 141                 };
 142
 143                 target-module@8000 {                    /* 0x4a008000, ap 21 4c.0 */
 144                         compatible = "ti,sysc-omap4", "ti,sysc";
 145                         reg = <0x8000 0x4>;
 146                         reg-names = "rev";
 147                         #address-cells = <1>;
 148                         #size-cells = <1>;
 149                         ranges = <0x0 0x8000 0x2000>;
 150
 151                         cm_core: cm_core@0 {
 152                                 compatible = "ti,omap5-cm-core", "simple-bus";
 153                                 reg = <0x0 0x2000>;
 154                                 #address-cells = <1>;
 155                                 #size-cells = <1>;
 156                                 ranges = <0 0 0x2000>;
 157
 158                                 cm_core_clocks: clocks {
 159                                         #address-cells = <1>;
 160                                         #size-cells = <0>;
 161                                 };
 162
 163                                 cm_core_clockdomains: clockdomains {
 164                                 };
 165                         };
 166                 };
 167
 168                 target-module@20000 {                   /* 0x4a020000, ap 109 08.0 */
 169                         compatible = "ti,sysc-omap4", "ti,sysc";
 170                         reg = <0x20000 0x4>,
 171                               <0x20010 0x4>;
 172                         reg-names = "rev", "sysc";
 173                         ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
 174                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 175                                         <SYSC_IDLE_NO>,
 176                                         <SYSC_IDLE_SMART>,
 177                                         <SYSC_IDLE_SMART_WKUP>;
 178                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 179                                         <SYSC_IDLE_NO>,
 180                                         <SYSC_IDLE_SMART>,
 181                                         <SYSC_IDLE_SMART_WKUP>;
 182                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 183                         clocks = <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 0>;
 184                         clock-names = "fck";
 185                         #address-cells = <1>;
 186                         #size-cells = <1>;
 187                         ranges = <0x0 0x20000 0x20000>;
 188
 189                         usb3: omap_dwc3@0 {
 190                                 compatible = "ti,dwc3";
 191                                 reg = <0x0 0x10000>;
 192                                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 193                                 #address-cells = <1>;
 194                                 #size-cells = <1>;
 195                                 utmi-mode = <2>;
 196                                 ranges = <0 0 0x20000>;
 197                                 dwc3: usb@10000 {
 198                                         compatible = "snps,dwc3";
 199                                         reg = <0x10000 0x10000>;
 200                                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 201                                                      <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 202                                                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 203                                         interrupt-names = "peripheral",
 204                                                           "host",
 205                                                           "otg";
 206                                         phys = <&usb2_phy>, <&usb3_phy>;
 207                                         phy-names = "usb2-phy", "usb3-phy";
 208                                         dr_mode = "peripheral";
 209                                 };
 210                         };
 211                 };
 212
 213                 target-module@56000 {                   /* 0x4a056000, ap 7 02.0 */
 214                         compatible = "ti,sysc-omap2", "ti,sysc";
 215                         reg = <0x56000 0x4>,
 216                               <0x5602c 0x4>,
 217                               <0x56028 0x4>;
 218                         reg-names = "rev", "sysc", "syss";
 219                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 220                                          SYSC_OMAP2_EMUFREE |
 221                                          SYSC_OMAP2_SOFTRESET |
 222                                          SYSC_OMAP2_AUTOIDLE)>;
 223                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 224                                         <SYSC_IDLE_NO>,
 225                                         <SYSC_IDLE_SMART>;
 226                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 227                                         <SYSC_IDLE_NO>,
 228                                         <SYSC_IDLE_SMART>;
 229                         ti,syss-mask = <1>;
 230                         /* Domains (V, P, C): core, core_pwrdm, dma_clkdm */
 231                         clocks = <&dma_clkctrl OMAP5_DMA_SYSTEM_CLKCTRL 0>;
 232                         clock-names = "fck";
 233                         #address-cells = <1>;
 234                         #size-cells = <1>;
 235                         ranges = <0x0 0x56000 0x1000>;
 236
 237                         sdma: dma-controller@0 {
 238                                 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
 239                                 reg = <0x0 0x1000>;
 240                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 241                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 242                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 243                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 244                                 #dma-cells = <1>;
 245                                 dma-channels = <32>;
 246                                 dma-requests = <127>;
 247                         };
 248                 };
 249
 250                 target-module@58000 {                   /* 0x4a058000, ap 10 06.0 */
 251                         compatible = "ti,sysc";
 252                         status = "disabled";
 253                         #address-cells = <1>;
 254                         #size-cells = <1>;
 255                         ranges = <0x00000000 0x00058000 0x00001000>,
 256                                  <0x00001000 0x00059000 0x00001000>,
 257                                  <0x00002000 0x0005a000 0x00001000>,
 258                                  <0x00003000 0x0005b000 0x00001000>;
 259                 };
 260
 261                 target-module@5e000 {                   /* 0x4a05e000, ap 69 2a.0 */
 262                         compatible = "ti,sysc";
 263                         status = "disabled";
 264                         #address-cells = <1>;
 265                         #size-cells = <1>;
 266                         ranges = <0x0 0x5e000 0x2000>;
 267                 };
 268
 269                 target-module@62000 {                   /* 0x4a062000, ap 11 0e.0 */
 270                         compatible = "ti,sysc-omap2", "ti,sysc";
 271                         reg = <0x62000 0x4>,
 272                               <0x62010 0x4>,
 273                               <0x62014 0x4>;
 274                         reg-names = "rev", "sysc", "syss";
 275                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 276                                          SYSC_OMAP2_ENAWAKEUP |
 277                                          SYSC_OMAP2_SOFTRESET |
 278                                          SYSC_OMAP2_AUTOIDLE)>;
 279                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 280                                         <SYSC_IDLE_NO>,
 281                                         <SYSC_IDLE_SMART>;
 282                         ti,syss-mask = <1>;
 283                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 284                         clocks = <&l3init_clkctrl OMAP5_USB_TLL_HS_CLKCTRL 0>;
 285                         clock-names = "fck";
 286                         #address-cells = <1>;
 287                         #size-cells = <1>;
 288                         ranges = <0x0 0x62000 0x1000>;
 289
 290                         usbhstll: usbhstll@0 {
 291                                 compatible = "ti,usbhs-tll";
 292                                 reg = <0x0 0x1000>;
 293                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 294                         };
 295                 };
 296
 297                 target-module@64000 {                   /* 0x4a064000, ap 71 1e.0 */
 298                         compatible = "ti,sysc-omap4", "ti,sysc";
 299                         reg = <0x64000 0x4>,
 300                               <0x64010 0x4>;
 301                         reg-names = "rev", "sysc";
 302                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 303                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 304                                         <SYSC_IDLE_NO>,
 305                                         <SYSC_IDLE_SMART>,
 306                                         <SYSC_IDLE_SMART_WKUP>;
 307                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 308                                         <SYSC_IDLE_NO>,
 309                                         <SYSC_IDLE_SMART>,
 310                                         <SYSC_IDLE_SMART_WKUP>;
 311                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 312                         clocks = <&l3init_clkctrl OMAP5_USB_HOST_HS_CLKCTRL 0>;
 313                         clock-names = "fck";
 314                         #address-cells = <1>;
 315                         #size-cells = <1>;
 316                         ranges = <0x0 0x64000 0x1000>;
 317
 318                         usbhshost: usbhshost@0 {
 319                                 compatible = "ti,usbhs-host";
 320                                 reg = <0x0 0x800>;
 321                                 #address-cells = <1>;
 322                                 #size-cells = <1>;
 323                                 ranges = <0 0 0x1000>;
 324                                 clocks = <&l3init_60m_fclk>,
 325                                          <&xclk60mhsp1_ck>,
 326                                          <&xclk60mhsp2_ck>;
 327                                 clock-names = "refclk_60m_int",
 328                                               "refclk_60m_ext_p1",
 329                                               "refclk_60m_ext_p2";
 330
 331                                 usbhsohci: ohci@800 {
 332                                         compatible = "ti,ohci-omap3";
 333                                         reg = <0x800 0x400>;
 334                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 335                                         remote-wakeup-connected;
 336                                 };
 337
 338                                 usbhsehci: ehci@c00 {
 339                                         compatible = "ti,ehci-omap";
 340                                         reg = <0xc00 0x400>;
 341                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 342                                 };
 343                         };
 344                 };
 345
 346                 target-module@66000 {                   /* 0x4a066000, ap 23 0a.0 */
 347                         compatible = "ti,sysc-omap2", "ti,sysc";
 348                         reg = <0x66000 0x4>,
 349                               <0x66010 0x4>,
 350                               <0x66014 0x4>;
 351                         reg-names = "rev", "sysc", "syss";
 352                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 353                                          SYSC_OMAP2_SOFTRESET |
 354                                          SYSC_OMAP2_AUTOIDLE)>;
 355                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 356                                         <SYSC_IDLE_NO>,
 357                                         <SYSC_IDLE_SMART>;
 358                         ti,syss-mask = <1>;
 359                         /* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
 360                         clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
 361                         clock-names = "fck";
 362                         resets = <&prm_dsp 1>;
 363                         reset-names = "rstctrl";
 364                         #address-cells = <1>;
 365                         #size-cells = <1>;
 366                         ranges = <0x0 0x66000 0x1000>;
 367
 368                         mmu_dsp: mmu@0 {
 369                                 compatible = "ti,omap4-iommu";
 370                                 reg = <0x0 0x100>;
 371                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 372                                 #iommu-cells = <0>;
 373                         };
 374                 };
 375
 376                 target-module@70000 {                   /* 0x4a070000, ap 79 2e.0 */
 377                         compatible = "ti,sysc";
 378                         status = "disabled";
 379                         #address-cells = <1>;
 380                         #size-cells = <1>;
 381                         ranges = <0x0 0x70000 0x4000>;
 382                 };
 383
 384                 target-module@75000 {                   /* 0x4a075000, ap 81 32.0 */
 385                         compatible = "ti,sysc";
 386                         status = "disabled";
 387                         #address-cells = <1>;
 388                         #size-cells = <1>;
 389                         ranges = <0x0 0x75000 0x1000>;
 390                 };
 391         };
 392
 393         segment@80000 {                                 /* 0x4a080000 */
 394                 compatible = "simple-bus";
 395                 #address-cells = <1>;
 396                 #size-cells = <1>;
 397                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 398                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 399                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 400                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 401                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 402                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 403                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 404                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 405                          <0x00074000 0x000f4000 0x001000>,      /* ap 25 */
 406                          <0x00075000 0x000f5000 0x001000>,      /* ap 26 */
 407                          <0x00076000 0x000f6000 0x001000>,      /* ap 27 */
 408                          <0x00077000 0x000f7000 0x001000>,      /* ap 28 */
 409                          <0x00036000 0x000b6000 0x001000>,      /* ap 65 */
 410                          <0x00037000 0x000b7000 0x001000>,      /* ap 66 */
 411                          <0x0004d000 0x000cd000 0x001000>,      /* ap 67 */
 412                          <0x0004e000 0x000ce000 0x001000>,      /* ap 68 */
 413                          <0x00000000 0x00080000 0x004000>,      /* ap 83 */
 414                          <0x00004000 0x00084000 0x001000>,      /* ap 84 */
 415                          <0x00005000 0x00085000 0x001000>,      /* ap 85 */
 416                          <0x00006000 0x00086000 0x001000>,      /* ap 86 */
 417                          <0x00007000 0x00087000 0x001000>,      /* ap 87 */
 418                          <0x00008000 0x00088000 0x001000>,      /* ap 88 */
 419                          <0x00010000 0x00090000 0x004000>,      /* ap 89 */
 420                          <0x00014000 0x00094000 0x001000>,      /* ap 90 */
 421                          <0x00015000 0x00095000 0x001000>,      /* ap 91 */
 422                          <0x00016000 0x00096000 0x001000>,      /* ap 92 */
 423                          <0x00017000 0x00097000 0x001000>,      /* ap 93 */
 424                          <0x00018000 0x00098000 0x001000>,      /* ap 94 */
 425                          <0x00020000 0x000a0000 0x004000>,      /* ap 95 */
 426                          <0x00024000 0x000a4000 0x001000>,      /* ap 96 */
 427                          <0x00025000 0x000a5000 0x001000>,      /* ap 97 */
 428                          <0x00026000 0x000a6000 0x001000>,      /* ap 98 */
 429                          <0x00027000 0x000a7000 0x001000>,      /* ap 99 */
 430                          <0x00028000 0x000a8000 0x001000>;      /* ap 100 */
 431
 432                 target-module@0 {                       /* 0x4a080000, ap 83 28.0 */
 433                         compatible = "ti,sysc-omap2", "ti,sysc";
 434                         reg = <0x0 0x4>,
 435                               <0x10 0x4>,
 436                               <0x14 0x4>;
 437                         reg-names = "rev", "sysc", "syss";
 438                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 439                                          SYSC_OMAP2_AUTOIDLE)>;
 440                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 441                                         <SYSC_IDLE_NO>,
 442                                         <SYSC_IDLE_SMART>;
 443                         ti,syss-mask = <1>;
 444                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 445                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP1_CLKCTRL 0>;
 446                         clock-names = "fck";
 447                         #address-cells = <1>;
 448                         #size-cells = <1>;
 449                         ranges = <0x00000000 0x00000000 0x00004000>,
 450                                  <0x00004000 0x00004000 0x00001000>,
 451                                  <0x00005000 0x00005000 0x00001000>,
 452                                  <0x00006000 0x00006000 0x00001000>,
 453                                  <0x00007000 0x00007000 0x00001000>;
 454
 455                         ocp2scp@0 {
 456                                 compatible = "ti,omap-ocp2scp";
 457                                 #address-cells = <1>;
 458                                 #size-cells = <1>;
 459                                 reg = <0 0x20>;
 460                         };
 461
 462                         usb2_phy: usb2phy@4000 {
 463                                 compatible = "ti,omap-usb2";
 464                                 reg = <0x4000 0x7c>;
 465                                 syscon-phy-power = <&scm_conf 0x300>;
 466                                 clocks = <&usb_phy_cm_clk32k>,
 467                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 468                                 clock-names = "wkupclk", "refclk";
 469                                 #phy-cells = <0>;
 470                         };
 471
 472                         usb3_phy: usb3phy@4400 {
 473                                 compatible = "ti,omap-usb3";
 474                                 reg = <0x4400 0x80>,
 475                                 <0x4800 0x64>,
 476                                 <0x4c00 0x40>;
 477                                 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 478                                 syscon-phy-power = <&scm_conf 0x370>;
 479                                 clocks = <&usb_phy_cm_clk32k>,
 480                                 <&sys_clkin>,
 481                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 482                                 clock-names =   "wkupclk",
 483                                 "sysclk",
 484                                 "refclk";
 485                                 #phy-cells = <0>;
 486                         };
 487                 };
 488
 489                 target-module@10000 {                   /* 0x4a090000, ap 89 36.0 */
 490                         compatible = "ti,sysc-omap2", "ti,sysc";
 491                         reg = <0x10000 0x4>,
 492                               <0x10010 0x4>,
 493                               <0x10014 0x4>;
 494                         reg-names = "rev", "sysc", "syss";
 495                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 496                                          SYSC_OMAP2_AUTOIDLE)>;
 497                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 498                                         <SYSC_IDLE_NO>,
 499                                         <SYSC_IDLE_SMART>;
 500                         ti,syss-mask = <1>;
 501                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 502                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP3_CLKCTRL 0>;
 503                         clock-names = "fck";
 504                         #address-cells = <1>;
 505                         #size-cells = <1>;
 506                         ranges = <0x00000000 0x00010000 0x00004000>,
 507                                  <0x00004000 0x00014000 0x00001000>,
 508                                  <0x00005000 0x00015000 0x00001000>,
 509                                  <0x00006000 0x00016000 0x00001000>,
 510                                  <0x00007000 0x00017000 0x00001000>;
 511
 512                                 ocp2scp@0 {
 513                                         compatible = "ti,omap-ocp2scp";
 514                                         #address-cells = <1>;
 515                                         #size-cells = <1>;
 516                                         reg = <0x0 0x20>;
 517                                 };
 518
 519                                 sata_phy: phy@6000 {
 520                                         compatible = "ti,phy-pipe3-sata";
 521                                         reg = <0x6000 0x80>, /* phy_rx */
 522                                               <0x6400 0x64>, /* phy_tx */
 523                                               <0x6800 0x40>; /* pll_ctrl */
 524                                         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 525                                         syscon-phy-power = <&scm_conf 0x374>;
 526                                         clocks = <&sys_clkin>,
 527                                                  <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
 528                                         clock-names = "sysclk", "refclk";
 529                                         #phy-cells = <0>;
 530                                 };
 531                 };
 532
 533                 target-module@20000 {                   /* 0x4a0a0000, ap 95 50.0 */
 534                         compatible = "ti,sysc";
 535                         status = "disabled";
 536                         #address-cells = <1>;
 537                         #size-cells = <1>;
 538                         ranges = <0x00000000 0x00020000 0x00004000>,
 539                                  <0x00004000 0x00024000 0x00001000>,
 540                                  <0x00005000 0x00025000 0x00001000>,
 541                                  <0x00006000 0x00026000 0x00001000>,
 542                                  <0x00007000 0x00027000 0x00001000>;
 543                 };
 544
 545                 target-module@36000 {                   /* 0x4a0b6000, ap 65 6c.0 */
 546                         compatible = "ti,sysc";
 547                         status = "disabled";
 548                         #address-cells = <1>;
 549                         #size-cells = <1>;
 550                         ranges = <0x0 0x36000 0x1000>;
 551                 };
 552
 553                 target-module@4d000 {                   /* 0x4a0cd000, ap 67 64.0 */
 554                         compatible = "ti,sysc";
 555                         status = "disabled";
 556                         #address-cells = <1>;
 557                         #size-cells = <1>;
 558                         ranges = <0x0 0x4d000 0x1000>;
 559                 };
 560
 561                 target-module@59000 {                   /* 0x4a0d9000, ap 13 20.0 */
 562                         compatible = "ti,sysc";
 563                         status = "disabled";
 564                         #address-cells = <1>;
 565                         #size-cells = <1>;
 566                         ranges = <0x0 0x59000 0x1000>;
 567                 };
 568
 569                 target-module@5b000 {                   /* 0x4a0db000, ap 15 10.0 */
 570                         compatible = "ti,sysc";
 571                         status = "disabled";
 572                         #address-cells = <1>;
 573                         #size-cells = <1>;
 574                         ranges = <0x0 0x5b000 0x1000>;
 575                 };
 576
 577                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 18.0 */
 578                         compatible = "ti,sysc";
 579                         status = "disabled";
 580                         #address-cells = <1>;
 581                         #size-cells = <1>;
 582                         ranges = <0x0 0x5d000 0x1000>;
 583                 };
 584
 585                 target-module@60000 {                   /* 0x4a0e0000, ap 19 54.0 */
 586                         compatible = "ti,sysc";
 587                         status = "disabled";
 588                         #address-cells = <1>;
 589                         #size-cells = <1>;
 590                         ranges = <0x0 0x60000 0x1000>;
 591                 };
 592
 593                 target-module@74000 {                   /* 0x4a0f4000, ap 25 04.0 */
 594                         compatible = "ti,sysc-omap4", "ti,sysc";
 595                         reg = <0x74000 0x4>,
 596                               <0x74010 0x4>;
 597                         reg-names = "rev", "sysc";
 598                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 599                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 600                                         <SYSC_IDLE_NO>,
 601                                         <SYSC_IDLE_SMART>;
 602                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 603                         clocks = <&l4cfg_clkctrl OMAP5_MAILBOX_CLKCTRL 0>;
 604                         clock-names = "fck";
 605                         #address-cells = <1>;
 606                         #size-cells = <1>;
 607                         ranges = <0x0 0x74000 0x1000>;
 608
 609                         mailbox: mailbox@0 {
 610                                 compatible = "ti,omap4-mailbox";
 611                                 reg = <0x0 0x200>;
 612                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 613                                 #mbox-cells = <1>;
 614                                 ti,mbox-num-users = <3>;
 615                                 ti,mbox-num-fifos = <8>;
 616                                 mbox_ipu: mbox_ipu {
 617                                         ti,mbox-tx = <0 0 0>;
 618                                         ti,mbox-rx = <1 0 0>;
 619                                 };
 620                                 mbox_dsp: mbox_dsp {
 621                                         ti,mbox-tx = <3 0 0>;
 622                                         ti,mbox-rx = <2 0 0>;
 623                                 };
 624                         };
 625                 };
 626
 627                 target-module@76000 {                   /* 0x4a0f6000, ap 27 0c.0 */
 628                         compatible = "ti,sysc-omap2", "ti,sysc";
 629                         reg = <0x76000 0x4>,
 630                               <0x76010 0x4>,
 631                               <0x76014 0x4>;
 632                         reg-names = "rev", "sysc", "syss";
 633                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 634                                          SYSC_OMAP2_ENAWAKEUP |
 635                                          SYSC_OMAP2_SOFTRESET |
 636                                          SYSC_OMAP2_AUTOIDLE)>;
 637                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 638                                         <SYSC_IDLE_NO>,
 639                                         <SYSC_IDLE_SMART>;
 640                         ti,syss-mask = <1>;
 641                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 642                         clocks = <&l4cfg_clkctrl OMAP5_SPINLOCK_CLKCTRL 0>;
 643                         clock-names = "fck";
 644                         #address-cells = <1>;
 645                         #size-cells = <1>;
 646                         ranges = <0x0 0x76000 0x1000>;
 647
 648                         hwspinlock: spinlock@0 {
 649                                 compatible = "ti,omap4-hwspinlock";
 650                                 reg = <0x0 0x1000>;
 651                                 #hwlock-cells = <1>;
 652                         };
 653                 };
 654         };
 655
 656         segment@100000 {                                        /* 0x4a100000 */
 657                 compatible = "simple-bus";
 658                 #address-cells = <1>;
 659                 #size-cells = <1>;
 660                 ranges = <0x00002000 0x00102000 0x001000>,      /* ap 59 */
 661                          <0x00003000 0x00103000 0x001000>,      /* ap 60 */
 662                          <0x00008000 0x00108000 0x001000>,      /* ap 61 */
 663                          <0x00009000 0x00109000 0x001000>,      /* ap 62 */
 664                          <0x0000a000 0x0010a000 0x001000>,      /* ap 63 */
 665                          <0x0000b000 0x0010b000 0x001000>,      /* ap 64 */
 666                          <0x00040000 0x00140000 0x010000>,      /* ap 101 */
 667                          <0x00050000 0x00150000 0x001000>;      /* ap 102 */
 668
 669                 target-module@2000 {                    /* 0x4a102000, ap 59 2c.0 */
 670                         compatible = "ti,sysc";
 671                         status = "disabled";
 672                         #address-cells = <1>;
 673                         #size-cells = <1>;
 674                         ranges = <0x0 0x2000 0x1000>;
 675                 };
 676
 677                 target-module@8000 {                    /* 0x4a108000, ap 61 26.0 */
 678                         compatible = "ti,sysc";
 679                         status = "disabled";
 680                         #address-cells = <1>;
 681                         #size-cells = <1>;
 682                         ranges = <0x0 0x8000 0x1000>;
 683                 };
 684
 685                 target-module@a000 {                    /* 0x4a10a000, ap 63 22.0 */
 686                         compatible = "ti,sysc";
 687                         status = "disabled";
 688                         #address-cells = <1>;
 689                         #size-cells = <1>;
 690                         ranges = <0x0 0xa000 0x1000>;
 691                 };
 692
 693                 target-module@40000 {                   /* 0x4a140000, ap 101 16.0 */
 694                         compatible = "ti,sysc";
 695                         status = "disabled";
 696                         #address-cells = <1>;
 697                         #size-cells = <1>;
 698                         ranges = <0x0 0x40000 0x10000>;
 699                 };
 700         };
 701
 702         segment@180000 {                                        /* 0x4a180000 */
 703                 compatible = "simple-bus";
 704                 #address-cells = <1>;
 705                 #size-cells = <1>;
 706         };
 707
 708         segment@200000 {                                        /* 0x4a200000 */
 709                 compatible = "simple-bus";
 710                 #address-cells = <1>;
 711                 #size-cells = <1>;
 712                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 29 */
 713                          <0x0001f000 0x0021f000 0x001000>,      /* ap 30 */
 714                          <0x0000a000 0x0020a000 0x001000>,      /* ap 31 */
 715                          <0x0000b000 0x0020b000 0x001000>,      /* ap 32 */
 716                          <0x00006000 0x00206000 0x001000>,      /* ap 33 */
 717                          <0x00007000 0x00207000 0x001000>,      /* ap 34 */
 718                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 719                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 720                          <0x00012000 0x00212000 0x001000>,      /* ap 37 */
 721                          <0x00013000 0x00213000 0x001000>,      /* ap 38 */
 722                          <0x0000c000 0x0020c000 0x001000>,      /* ap 39 */
 723                          <0x0000d000 0x0020d000 0x001000>,      /* ap 40 */
 724                          <0x00010000 0x00210000 0x001000>,      /* ap 41 */
 725                          <0x00011000 0x00211000 0x001000>,      /* ap 42 */
 726                          <0x00016000 0x00216000 0x001000>,      /* ap 43 */
 727                          <0x00017000 0x00217000 0x001000>,      /* ap 44 */
 728                          <0x00014000 0x00214000 0x001000>,      /* ap 45 */
 729                          <0x00015000 0x00215000 0x001000>,      /* ap 46 */
 730                          <0x00018000 0x00218000 0x001000>,      /* ap 47 */
 731                          <0x00019000 0x00219000 0x001000>,      /* ap 48 */
 732                          <0x00020000 0x00220000 0x001000>,      /* ap 49 */
 733                          <0x00021000 0x00221000 0x001000>,      /* ap 50 */
 734                          <0x00026000 0x00226000 0x001000>,      /* ap 51 */
 735                          <0x00027000 0x00227000 0x001000>,      /* ap 52 */
 736                          <0x00028000 0x00228000 0x001000>,      /* ap 53 */
 737                          <0x00029000 0x00229000 0x001000>,      /* ap 54 */
 738                          <0x0002a000 0x0022a000 0x001000>,      /* ap 55 */
 739                          <0x0002b000 0x0022b000 0x001000>,      /* ap 56 */
 740                          <0x0001c000 0x0021c000 0x001000>,      /* ap 57 */
 741                          <0x0001d000 0x0021d000 0x001000>,      /* ap 58 */
 742                          <0x0001a000 0x0021a000 0x001000>,      /* ap 73 */
 743                          <0x0001b000 0x0021b000 0x001000>,      /* ap 74 */
 744                          <0x00024000 0x00224000 0x001000>,      /* ap 75 */
 745                          <0x00025000 0x00225000 0x001000>,      /* ap 76 */
 746                          <0x00002000 0x00202000 0x001000>,      /* ap 103 */
 747                          <0x00003000 0x00203000 0x001000>,      /* ap 104 */
 748                          <0x00008000 0x00208000 0x001000>,      /* ap 105 */
 749                          <0x00009000 0x00209000 0x001000>,      /* ap 106 */
 750                          <0x00022000 0x00222000 0x001000>,      /* ap 107 */
 751                          <0x00023000 0x00223000 0x001000>;      /* ap 108 */
 752
 753                 target-module@2000 {                    /* 0x4a202000, ap 103 3c.0 */
 754                         compatible = "ti,sysc";
 755                         status = "disabled";
 756                         #address-cells = <1>;
 757                         #size-cells = <1>;
 758                         ranges = <0x0 0x2000 0x1000>;
 759                 };
 760
 761                 target-module@4000 {                    /* 0x4a204000, ap 35 46.0 */
 762                         compatible = "ti,sysc";
 763                         status = "disabled";
 764                         #address-cells = <1>;
 765                         #size-cells = <1>;
 766                         ranges = <0x0 0x4000 0x1000>;
 767                 };
 768
 769                 target-module@6000 {                    /* 0x4a206000, ap 33 4e.0 */
 770                         compatible = "ti,sysc";
 771                         status = "disabled";
 772                         #address-cells = <1>;
 773                         #size-cells = <1>;
 774                         ranges = <0x0 0x6000 0x1000>;
 775                 };
 776
 777                 target-module@8000 {                    /* 0x4a208000, ap 105 34.0 */
 778                         compatible = "ti,sysc";
 779                         status = "disabled";
 780                         #address-cells = <1>;
 781                         #size-cells = <1>;
 782                         ranges = <0x0 0x8000 0x1000>;
 783                 };
 784
 785                 target-module@a000 {                    /* 0x4a20a000, ap 31 30.0 */
 786                         compatible = "ti,sysc";
 787                         status = "disabled";
 788                         #address-cells = <1>;
 789                         #size-cells = <1>;
 790                         ranges = <0x0 0xa000 0x1000>;
 791                 };
 792
 793                 target-module@c000 {                    /* 0x4a20c000, ap 39 14.0 */
 794                         compatible = "ti,sysc";
 795                         status = "disabled";
 796                         #address-cells = <1>;
 797                         #size-cells = <1>;
 798                         ranges = <0x0 0xc000 0x1000>;
 799                 };
 800
 801                 target-module@10000 {                   /* 0x4a210000, ap 41 56.0 */
 802                         compatible = "ti,sysc";
 803                         status = "disabled";
 804                         #address-cells = <1>;
 805                         #size-cells = <1>;
 806                         ranges = <0x0 0x10000 0x1000>;
 807                 };
 808
 809                 target-module@12000 {                   /* 0x4a212000, ap 37 52.0 */
 810                         compatible = "ti,sysc";
 811                         status = "disabled";
 812                         #address-cells = <1>;
 813                         #size-cells = <1>;
 814                         ranges = <0x0 0x12000 0x1000>;
 815                 };
 816
 817                 target-module@14000 {                   /* 0x4a214000, ap 45 1c.0 */
 818                         compatible = "ti,sysc";
 819                         status = "disabled";
 820                         #address-cells = <1>;
 821                         #size-cells = <1>;
 822                         ranges = <0x0 0x14000 0x1000>;
 823                 };
 824
 825                 target-module@16000 {                   /* 0x4a216000, ap 43 42.0 */
 826                         compatible = "ti,sysc";
 827                         status = "disabled";
 828                         #address-cells = <1>;
 829                         #size-cells = <1>;
 830                         ranges = <0x0 0x16000 0x1000>;
 831                 };
 832
 833                 target-module@18000 {                   /* 0x4a218000, ap 47 1a.0 */
 834                         compatible = "ti,sysc";
 835                         status = "disabled";
 836                         #address-cells = <1>;
 837                         #size-cells = <1>;
 838                         ranges = <0x0 0x18000 0x1000>;
 839                 };
 840
 841                 target-module@1a000 {                   /* 0x4a21a000, ap 73 3e.0 */
 842                         compatible = "ti,sysc";
 843                         status = "disabled";
 844                         #address-cells = <1>;
 845                         #size-cells = <1>;
 846                         ranges = <0x0 0x1a000 0x1000>;
 847                 };
 848
 849                 target-module@1c000 {                   /* 0x4a21c000, ap 57 40.0 */
 850                         compatible = "ti,sysc";
 851                         status = "disabled";
 852                         #address-cells = <1>;
 853                         #size-cells = <1>;
 854                         ranges = <0x0 0x1c000 0x1000>;
 855                 };
 856
 857                 target-module@1e000 {                   /* 0x4a21e000, ap 29 12.0 */
 858                         compatible = "ti,sysc";
 859                         status = "disabled";
 860                         #address-cells = <1>;
 861                         #size-cells = <1>;
 862                         ranges = <0x0 0x1e000 0x1000>;
 863                 };
 864
 865                 target-module@20000 {                   /* 0x4a220000, ap 49 4a.0 */
 866                         compatible = "ti,sysc";
 867                         status = "disabled";
 868                         #address-cells = <1>;
 869                         #size-cells = <1>;
 870                         ranges = <0x0 0x20000 0x1000>;
 871                 };
 872
 873                 target-module@22000 {                   /* 0x4a222000, ap 107 3a.0 */
 874                         compatible = "ti,sysc";
 875                         status = "disabled";
 876                         #address-cells = <1>;
 877                         #size-cells = <1>;
 878                         ranges = <0x0 0x22000 0x1000>;
 879                 };
 880
 881                 target-module@24000 {                   /* 0x4a224000, ap 75 48.0 */
 882                         compatible = "ti,sysc";
 883                         status = "disabled";
 884                         #address-cells = <1>;
 885                         #size-cells = <1>;
 886                         ranges = <0x0 0x24000 0x1000>;
 887                 };
 888
 889                 target-module@26000 {                   /* 0x4a226000, ap 51 24.0 */
 890                         compatible = "ti,sysc";
 891                         status = "disabled";
 892                         #address-cells = <1>;
 893                         #size-cells = <1>;
 894                         ranges = <0x0 0x26000 0x1000>;
 895                 };
 896
 897                 target-module@28000 {                   /* 0x4a228000, ap 53 38.0 */
 898                         compatible = "ti,sysc";
 899                         status = "disabled";
 900                         #address-cells = <1>;
 901                         #size-cells = <1>;
 902                         ranges = <0x0 0x28000 0x1000>;
 903                 };
 904
 905                 target-module@2a000 {                   /* 0x4a22a000, ap 55 5a.0 */
 906                         compatible = "ti,sysc";
 907                         status = "disabled";
 908                         #address-cells = <1>;
 909                         #size-cells = <1>;
 910                         ranges = <0x0 0x2a000 0x1000>;
 911                 };
 912         };
 913
 914         segment@280000 {                                        /* 0x4a280000 */
 915                 compatible = "simple-bus";
 916                 #address-cells = <1>;
 917                 #size-cells = <1>;
 918         };
 919
 920         segment@300000 {                                        /* 0x4a300000 */
 921                 compatible = "simple-bus";
 922                 #address-cells = <1>;
 923                 #size-cells = <1>;
 924         };
 925 };
 926
 927 &l4_per {                                               /* 0x48000000 */
 928         compatible = "ti,omap5-l4-per", "simple-bus";
 929         reg = <0x48000000 0x800>,
 930               <0x48000800 0x800>,
 931               <0x48001000 0x400>,
 932               <0x48001400 0x400>,
 933               <0x48001800 0x400>,
 934               <0x48001c00 0x400>;
 935         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 936         #address-cells = <1>;
 937         #size-cells = <1>;
 938         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
 939                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
 940
 941         segment@0 {                                     /* 0x48000000 */
 942                 compatible = "simple-bus";
 943                 #address-cells = <1>;
 944                 #size-cells = <1>;
 945                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 946                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
 947                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 948                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
 949                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
 950                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
 951                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
 952                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
 953                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
 954                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
 955                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
 956                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
 957                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
 958                          <0x00055000 0x00055000 0x001000>,      /* ap 13 */
 959                          <0x00056000 0x00056000 0x001000>,      /* ap 14 */
 960                          <0x00057000 0x00057000 0x001000>,      /* ap 15 */
 961                          <0x00058000 0x00058000 0x001000>,      /* ap 16 */
 962                          <0x00059000 0x00059000 0x001000>,      /* ap 17 */
 963                          <0x0005a000 0x0005a000 0x001000>,      /* ap 18 */
 964                          <0x0005b000 0x0005b000 0x001000>,      /* ap 19 */
 965                          <0x0005c000 0x0005c000 0x001000>,      /* ap 20 */
 966                          <0x0005d000 0x0005d000 0x001000>,      /* ap 21 */
 967                          <0x0005e000 0x0005e000 0x001000>,      /* ap 22 */
 968                          <0x00060000 0x00060000 0x001000>,      /* ap 23 */
 969                          <0x0006a000 0x0006a000 0x001000>,      /* ap 24 */
 970                          <0x0006b000 0x0006b000 0x001000>,      /* ap 25 */
 971                          <0x0006c000 0x0006c000 0x001000>,      /* ap 26 */
 972                          <0x0006d000 0x0006d000 0x001000>,      /* ap 27 */
 973                          <0x0006e000 0x0006e000 0x001000>,      /* ap 28 */
 974                          <0x0006f000 0x0006f000 0x001000>,      /* ap 29 */
 975                          <0x00070000 0x00070000 0x001000>,      /* ap 30 */
 976                          <0x00071000 0x00071000 0x001000>,      /* ap 31 */
 977                          <0x00072000 0x00072000 0x001000>,      /* ap 32 */
 978                          <0x00073000 0x00073000 0x001000>,      /* ap 33 */
 979                          <0x00061000 0x00061000 0x001000>,      /* ap 34 */
 980                          <0x00053000 0x00053000 0x001000>,      /* ap 35 */
 981                          <0x00054000 0x00054000 0x001000>,      /* ap 36 */
 982                          <0x000b2000 0x000b2000 0x001000>,      /* ap 37 */
 983                          <0x000b3000 0x000b3000 0x001000>,      /* ap 38 */
 984                          <0x00078000 0x00078000 0x001000>,      /* ap 39 */
 985                          <0x00079000 0x00079000 0x001000>,      /* ap 40 */
 986                          <0x00086000 0x00086000 0x001000>,      /* ap 41 */
 987                          <0x00087000 0x00087000 0x001000>,      /* ap 42 */
 988                          <0x00088000 0x00088000 0x001000>,      /* ap 43 */
 989                          <0x00089000 0x00089000 0x001000>,      /* ap 44 */
 990                          <0x00051000 0x00051000 0x001000>,      /* ap 45 */
 991                          <0x00052000 0x00052000 0x001000>,      /* ap 46 */
 992                          <0x00098000 0x00098000 0x001000>,      /* ap 47 */
 993                          <0x00099000 0x00099000 0x001000>,      /* ap 48 */
 994                          <0x0009a000 0x0009a000 0x001000>,      /* ap 49 */
 995                          <0x0009b000 0x0009b000 0x001000>,      /* ap 50 */
 996                          <0x0009c000 0x0009c000 0x001000>,      /* ap 51 */
 997                          <0x0009d000 0x0009d000 0x001000>,      /* ap 52 */
 998                          <0x00068000 0x00068000 0x001000>,      /* ap 53 */
 999                          <0x00069000 0x00069000 0x001000>,      /* ap 54 */
1000                          <0x00090000 0x00090000 0x002000>,      /* ap 55 */
1001                          <0x00092000 0x00092000 0x001000>,      /* ap 56 */
1002                          <0x000a4000 0x000a4000 0x001000>,      /* ap 57 */
1003                          <0x000a5000 0x000a5000 0x001000>,
1004                          <0x000a6000 0x000a6000 0x001000>,      /* ap 58 */
1005                          <0x000a8000 0x000a8000 0x004000>,      /* ap 59 */
1006                          <0x000ac000 0x000ac000 0x001000>,      /* ap 60 */
1007                          <0x000ad000 0x000ad000 0x001000>,      /* ap 61 */
1008                          <0x000ae000 0x000ae000 0x001000>,      /* ap 62 */
1009                          <0x00066000 0x00066000 0x001000>,      /* ap 63 */
1010                          <0x00067000 0x00067000 0x001000>,      /* ap 64 */
1011                          <0x000b4000 0x000b4000 0x001000>,      /* ap 65 */
1012                          <0x000b5000 0x000b5000 0x001000>,      /* ap 66 */
1013                          <0x000b8000 0x000b8000 0x001000>,      /* ap 67 */
1014                          <0x000b9000 0x000b9000 0x001000>,      /* ap 68 */
1015                          <0x000ba000 0x000ba000 0x001000>,      /* ap 69 */
1016                          <0x000bb000 0x000bb000 0x001000>,      /* ap 70 */
1017                          <0x000d1000 0x000d1000 0x001000>,      /* ap 71 */
1018                          <0x000d2000 0x000d2000 0x001000>,      /* ap 72 */
1019                          <0x000d5000 0x000d5000 0x001000>,      /* ap 73 */
1020                          <0x000d6000 0x000d6000 0x001000>,      /* ap 74 */
1021                          <0x000a2000 0x000a2000 0x001000>,      /* ap 75 */
1022                          <0x000a3000 0x000a3000 0x001000>,      /* ap 76 */
1023                          <0x00001400 0x00001400 0x000400>,      /* ap 77 */
1024                          <0x00001800 0x00001800 0x000400>,      /* ap 78 */
1025                          <0x00001c00 0x00001c00 0x000400>,      /* ap 79 */
1026                          <0x000a5000 0x000a5000 0x001000>,      /* ap 80 */
1027                          <0x0007a000 0x0007a000 0x001000>,      /* ap 81 */
1028                          <0x0007b000 0x0007b000 0x001000>,      /* ap 82 */
1029                          <0x0007c000 0x0007c000 0x001000>,      /* ap 83 */
1030                          <0x0007d000 0x0007d000 0x001000>;      /* ap 84 */
1031
1032                 target-module@20000 {                   /* 0x48020000, ap 3 04.0 */
1033                         compatible = "ti,sysc-omap2", "ti,sysc";
1034                         reg = <0x20050 0x4>,
1035                               <0x20054 0x4>,
1036                               <0x20058 0x4>;
1037                         reg-names = "rev", "sysc", "syss";
1038                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1039                                          SYSC_OMAP2_SOFTRESET |
1040                                          SYSC_OMAP2_AUTOIDLE)>;
1041                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1042                                         <SYSC_IDLE_NO>,
1043                                         <SYSC_IDLE_SMART>,
1044                                         <SYSC_IDLE_SMART_WKUP>;
1045                         ti,syss-mask = <1>;
1046                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1047                         clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1048                         clock-names = "fck";
1049                         #address-cells = <1>;
1050                         #size-cells = <1>;
1051                         ranges = <0x0 0x20000 0x1000>;
1052
1053                         uart3: serial@0 {
1054                                 compatible = "ti,omap4-uart";
1055                                 reg = <0x0 0x100>;
1056                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1057                                 clock-frequency = <48000000>;
1058                         };
1059                 };
1060
1061                 target-module@32000 {                   /* 0x48032000, ap 5 3e.0 */
1062                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1063                         reg = <0x32000 0x4>,
1064                               <0x32010 0x4>;
1065                         reg-names = "rev", "sysc";
1066                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1067                                          SYSC_OMAP4_SOFTRESET)>;
1068                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1069                                         <SYSC_IDLE_NO>,
1070                                         <SYSC_IDLE_SMART>,
1071                                         <SYSC_IDLE_SMART_WKUP>;
1072                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1073                         clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 0>;
1074                         clock-names = "fck";
1075                         #address-cells = <1>;
1076                         #size-cells = <1>;
1077                         ranges = <0x0 0x32000 0x1000>;
1078
1079                         timer2: timer@0 {
1080                                 compatible = "ti,omap5430-timer";
1081                                 reg = <0x0 0x80>;
1082                                 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>,
1083                                          <&sys_clkin>;
1084                                 clock-names = "fck", "timer_sys_ck";
1085                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1086                         };
1087                 };
1088
1089                 target-module@34000 {                   /* 0x48034000, ap 7 46.0 */
1090                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1091                         reg = <0x34000 0x4>,
1092                               <0x34010 0x4>;
1093                         reg-names = "rev", "sysc";
1094                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1095                                          SYSC_OMAP4_SOFTRESET)>;
1096                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1097                                         <SYSC_IDLE_NO>,
1098                                         <SYSC_IDLE_SMART>,
1099                                         <SYSC_IDLE_SMART_WKUP>;
1100                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1101                         clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 0>;
1102                         clock-names = "fck";
1103                         #address-cells = <1>;
1104                         #size-cells = <1>;
1105                         ranges = <0x0 0x34000 0x1000>;
1106
1107                         timer3: timer@0 {
1108                                 compatible = "ti,omap5430-timer";
1109                                 reg = <0x0 0x80>;
1110                                 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>,
1111                                          <&sys_clkin>;
1112                                 clock-names = "fck", "timer_sys_ck";
1113                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1114                         };
1115                 };
1116
1117                 target-module@36000 {                   /* 0x48036000, ap 9 4e.0 */
1118                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1119                         reg = <0x36000 0x4>,
1120                               <0x36010 0x4>;
1121                         reg-names = "rev", "sysc";
1122                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1123                                          SYSC_OMAP4_SOFTRESET)>;
1124                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1125                                         <SYSC_IDLE_NO>,
1126                                         <SYSC_IDLE_SMART>,
1127                                         <SYSC_IDLE_SMART_WKUP>;
1128                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1129                         clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 0>;
1130                         clock-names = "fck";
1131                         #address-cells = <1>;
1132                         #size-cells = <1>;
1133                         ranges = <0x0 0x36000 0x1000>;
1134
1135                         timer4: timer@0 {
1136                                 compatible = "ti,omap5430-timer";
1137                                 reg = <0x0 0x80>;
1138                                 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>,
1139                                          <&sys_clkin>;
1140                                 clock-names = "fck", "timer_sys_ck";
1141                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1142                         };
1143                 };
1144
1145                 target-module@3e000 {                   /* 0x4803e000, ap 11 56.0 */
1146                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1147                         reg = <0x3e000 0x4>,
1148                               <0x3e010 0x4>;
1149                         reg-names = "rev", "sysc";
1150                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1151                                          SYSC_OMAP4_SOFTRESET)>;
1152                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1153                                         <SYSC_IDLE_NO>,
1154                                         <SYSC_IDLE_SMART>,
1155                                         <SYSC_IDLE_SMART_WKUP>;
1156                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1157                         clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 0>;
1158                         clock-names = "fck";
1159                         #address-cells = <1>;
1160                         #size-cells = <1>;
1161                         ranges = <0x0 0x3e000 0x1000>;
1162
1163                         timer9: timer@0 {
1164                                 compatible = "ti,omap5430-timer";
1165                                 reg = <0x0 0x80>;
1166                                 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>,
1167                                          <&sys_clkin>;
1168                                 clock-names = "fck", "timer_sys_ck";
1169                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1170                                 ti,timer-pwm;
1171                         };
1172                 };
1173
1174                 target-module@51000 {                   /* 0x48051000, ap 45 2e.0 */
1175                         compatible = "ti,sysc-omap2", "ti,sysc";
1176                         reg = <0x51000 0x4>,
1177                               <0x51010 0x4>,
1178                               <0x51114 0x4>;
1179                         reg-names = "rev", "sysc", "syss";
1180                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1181                                          SYSC_OMAP2_SOFTRESET |
1182                                          SYSC_OMAP2_AUTOIDLE)>;
1183                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1184                                         <SYSC_IDLE_NO>,
1185                                         <SYSC_IDLE_SMART>,
1186                                         <SYSC_IDLE_SMART_WKUP>;
1187                         ti,syss-mask = <1>;
1188                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1189                         clocks = <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 0>,
1190                                  <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 8>;
1191                         clock-names = "fck", "dbclk";
1192                         #address-cells = <1>;
1193                         #size-cells = <1>;
1194                         ranges = <0x0 0x51000 0x1000>;
1195
1196                         gpio7: gpio@0 {
1197                                 compatible = "ti,omap4-gpio";
1198                                 reg = <0x0 0x200>;
1199                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1200                                 gpio-controller;
1201                                 #gpio-cells = <2>;
1202                                 interrupt-controller;
1203                                 #interrupt-cells = <2>;
1204                         };
1205                 };
1206
1207                 target-module@53000 {                   /* 0x48053000, ap 35 36.0 */
1208                         compatible = "ti,sysc-omap2", "ti,sysc";
1209                         reg = <0x53000 0x4>,
1210                               <0x53010 0x4>,
1211                               <0x53114 0x4>;
1212                         reg-names = "rev", "sysc", "syss";
1213                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1214                                          SYSC_OMAP2_SOFTRESET |
1215                                          SYSC_OMAP2_AUTOIDLE)>;
1216                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1217                                         <SYSC_IDLE_NO>,
1218                                         <SYSC_IDLE_SMART>,
1219                                         <SYSC_IDLE_SMART_WKUP>;
1220                         ti,syss-mask = <1>;
1221                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1222                         clocks = <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 0>,
1223                                  <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 8>;
1224                         clock-names = "fck", "dbclk";
1225                         #address-cells = <1>;
1226                         #size-cells = <1>;
1227                         ranges = <0x0 0x53000 0x1000>;
1228
1229                         gpio8: gpio@0 {
1230                                 compatible = "ti,omap4-gpio";
1231                                 reg = <0x0 0x200>;
1232                                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1233                                 gpio-controller;
1234                                 #gpio-cells = <2>;
1235                                 interrupt-controller;
1236                                 #interrupt-cells = <2>;
1237                         };
1238                 };
1239
1240                 target-module@55000 {                   /* 0x48055000, ap 13 0e.0 */
1241                         compatible = "ti,sysc-omap2", "ti,sysc";
1242                         reg = <0x55000 0x4>,
1243                               <0x55010 0x4>,
1244                               <0x55114 0x4>;
1245                         reg-names = "rev", "sysc", "syss";
1246                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1247                                          SYSC_OMAP2_SOFTRESET |
1248                                          SYSC_OMAP2_AUTOIDLE)>;
1249                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1250                                         <SYSC_IDLE_NO>,
1251                                         <SYSC_IDLE_SMART>,
1252                                         <SYSC_IDLE_SMART_WKUP>;
1253                         ti,syss-mask = <1>;
1254                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1255                         clocks = <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 0>,
1256                                  <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 8>;
1257                         clock-names = "fck", "dbclk";
1258                         #address-cells = <1>;
1259                         #size-cells = <1>;
1260                         ranges = <0x0 0x55000 0x1000>;
1261
1262                         gpio2: gpio@0 {
1263                                 compatible = "ti,omap4-gpio";
1264                                 reg = <0x0 0x200>;
1265                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1266                                 gpio-controller;
1267                                 #gpio-cells = <2>;
1268                                 interrupt-controller;
1269                                 #interrupt-cells = <2>;
1270                         };
1271                 };
1272
1273                 target-module@57000 {                   /* 0x48057000, ap 15 06.0 */
1274                         compatible = "ti,sysc-omap2", "ti,sysc";
1275                         reg = <0x57000 0x4>,
1276                               <0x57010 0x4>,
1277                               <0x57114 0x4>;
1278                         reg-names = "rev", "sysc", "syss";
1279                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1280                                          SYSC_OMAP2_SOFTRESET |
1281                                          SYSC_OMAP2_AUTOIDLE)>;
1282                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1283                                         <SYSC_IDLE_NO>,
1284                                         <SYSC_IDLE_SMART>,
1285                                         <SYSC_IDLE_SMART_WKUP>;
1286                         ti,syss-mask = <1>;
1287                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1288                         clocks = <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 0>,
1289                                  <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 8>;
1290                         clock-names = "fck", "dbclk";
1291                         #address-cells = <1>;
1292                         #size-cells = <1>;
1293                         ranges = <0x0 0x57000 0x1000>;
1294
1295                         gpio3: gpio@0 {
1296                                 compatible = "ti,omap4-gpio";
1297                                 reg = <0x0 0x200>;
1298                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1299                                 gpio-controller;
1300                                 #gpio-cells = <2>;
1301                                 interrupt-controller;
1302                                 #interrupt-cells = <2>;
1303                         };
1304                 };
1305
1306                 target-module@59000 {                   /* 0x48059000, ap 17 16.0 */
1307                         compatible = "ti,sysc-omap2", "ti,sysc";
1308                         reg = <0x59000 0x4>,
1309                               <0x59010 0x4>,
1310                               <0x59114 0x4>;
1311                         reg-names = "rev", "sysc", "syss";
1312                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1313                                          SYSC_OMAP2_SOFTRESET |
1314                                          SYSC_OMAP2_AUTOIDLE)>;
1315                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1316                                         <SYSC_IDLE_NO>,
1317                                         <SYSC_IDLE_SMART>,
1318                                         <SYSC_IDLE_SMART_WKUP>;
1319                         ti,syss-mask = <1>;
1320                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1321                         clocks = <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 0>,
1322                                  <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 8>;
1323                         clock-names = "fck", "dbclk";
1324                         #address-cells = <1>;
1325                         #size-cells = <1>;
1326                         ranges = <0x0 0x59000 0x1000>;
1327
1328                         gpio4: gpio@0 {
1329                                 compatible = "ti,omap4-gpio";
1330                                 reg = <0x0 0x200>;
1331                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1332                                 gpio-controller;
1333                                 #gpio-cells = <2>;
1334                                 interrupt-controller;
1335                                 #interrupt-cells = <2>;
1336                         };
1337                 };
1338
1339                 target-module@5b000 {                   /* 0x4805b000, ap 19 1e.0 */
1340                         compatible = "ti,sysc-omap2", "ti,sysc";
1341                         reg = <0x5b000 0x4>,
1342                               <0x5b010 0x4>,
1343                               <0x5b114 0x4>;
1344                         reg-names = "rev", "sysc", "syss";
1345                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1346                                          SYSC_OMAP2_SOFTRESET |
1347                                          SYSC_OMAP2_AUTOIDLE)>;
1348                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1349                                         <SYSC_IDLE_NO>,
1350                                         <SYSC_IDLE_SMART>,
1351                                         <SYSC_IDLE_SMART_WKUP>;
1352                         ti,syss-mask = <1>;
1353                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1354                         clocks = <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 0>,
1355                                  <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 8>;
1356                         clock-names = "fck", "dbclk";
1357                         #address-cells = <1>;
1358                         #size-cells = <1>;
1359                         ranges = <0x0 0x5b000 0x1000>;
1360
1361                         gpio5: gpio@0 {
1362                                 compatible = "ti,omap4-gpio";
1363                                 reg = <0x0 0x200>;
1364                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1365                                 gpio-controller;
1366                                 #gpio-cells = <2>;
1367                                 interrupt-controller;
1368                                 #interrupt-cells = <2>;
1369                         };
1370                 };
1371
1372                 target-module@5d000 {                   /* 0x4805d000, ap 21 26.0 */
1373                         compatible = "ti,sysc-omap2", "ti,sysc";
1374                         reg = <0x5d000 0x4>,
1375                               <0x5d010 0x4>,
1376                               <0x5d114 0x4>;
1377                         reg-names = "rev", "sysc", "syss";
1378                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1379                                          SYSC_OMAP2_SOFTRESET |
1380                                          SYSC_OMAP2_AUTOIDLE)>;
1381                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1382                                         <SYSC_IDLE_NO>,
1383                                         <SYSC_IDLE_SMART>,
1384                                         <SYSC_IDLE_SMART_WKUP>;
1385                         ti,syss-mask = <1>;
1386                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1387                         clocks = <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 0>,
1388                                  <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 8>;
1389                         clock-names = "fck", "dbclk";
1390                         #address-cells = <1>;
1391                         #size-cells = <1>;
1392                         ranges = <0x0 0x5d000 0x1000>;
1393
1394                         gpio6: gpio@0 {
1395                                 compatible = "ti,omap4-gpio";
1396                                 reg = <0x0 0x200>;
1397                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1398                                 gpio-controller;
1399                                 #gpio-cells = <2>;
1400                                 interrupt-controller;
1401                                 #interrupt-cells = <2>;
1402                         };
1403                 };
1404
1405                 target-module@60000 {                   /* 0x48060000, ap 23 24.0 */
1406                         compatible = "ti,sysc-omap2", "ti,sysc";
1407                         reg = <0x60000 0x8>,
1408                               <0x60010 0x8>,
1409                               <0x60090 0x8>;
1410                         reg-names = "rev", "sysc", "syss";
1411                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1412                                          SYSC_OMAP2_ENAWAKEUP |
1413                                          SYSC_OMAP2_SOFTRESET |
1414                                          SYSC_OMAP2_AUTOIDLE)>;
1415                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1416                                         <SYSC_IDLE_NO>,
1417                                         <SYSC_IDLE_SMART>,
1418                                         <SYSC_IDLE_SMART_WKUP>;
1419                         ti,syss-mask = <1>;
1420                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1421                         clocks = <&l4per_clkctrl OMAP5_I2C3_CLKCTRL 0>;
1422                         clock-names = "fck";
1423                         #address-cells = <1>;
1424                         #size-cells = <1>;
1425                         ranges = <0x0 0x60000 0x1000>;
1426
1427                         i2c3: i2c@0 {
1428                                 compatible = "ti,omap4-i2c";
1429                                 reg = <0x0 0x100>;
1430                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1431                                 #address-cells = <1>;
1432                                 #size-cells = <0>;
1433                         };
1434                 };
1435
1436                 target-module@66000 {                   /* 0x48066000, ap 63 4c.0 */
1437                         compatible = "ti,sysc-omap2", "ti,sysc";
1438                         reg = <0x66050 0x4>,
1439                               <0x66054 0x4>,
1440                               <0x66058 0x4>;
1441                         reg-names = "rev", "sysc", "syss";
1442                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1443                                          SYSC_OMAP2_SOFTRESET |
1444                                          SYSC_OMAP2_AUTOIDLE)>;
1445                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1446                                         <SYSC_IDLE_NO>,
1447                                         <SYSC_IDLE_SMART>,
1448                                         <SYSC_IDLE_SMART_WKUP>;
1449                         ti,syss-mask = <1>;
1450                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1451                         clocks = <&l4per_clkctrl OMAP5_UART5_CLKCTRL 0>;
1452                         clock-names = "fck";
1453                         #address-cells = <1>;
1454                         #size-cells = <1>;
1455                         ranges = <0x0 0x66000 0x1000>;
1456
1457                         uart5: serial@0 {
1458                                 compatible = "ti,omap4-uart";
1459                                 reg = <0x0 0x100>;
1460                                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1461                                 clock-frequency = <48000000>;
1462                         };
1463                 };
1464
1465                 target-module@68000 {                   /* 0x48068000, ap 53 54.0 */
1466                         compatible = "ti,sysc-omap2", "ti,sysc";
1467                         reg = <0x68050 0x4>,
1468                               <0x68054 0x4>,
1469                               <0x68058 0x4>;
1470                         reg-names = "rev", "sysc", "syss";
1471                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1472                                          SYSC_OMAP2_SOFTRESET |
1473                                          SYSC_OMAP2_AUTOIDLE)>;
1474                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1475                                         <SYSC_IDLE_NO>,
1476                                         <SYSC_IDLE_SMART>,
1477                                         <SYSC_IDLE_SMART_WKUP>;
1478                         ti,syss-mask = <1>;
1479                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1480                         clocks = <&l4per_clkctrl OMAP5_UART6_CLKCTRL 0>;
1481                         clock-names = "fck";
1482                         #address-cells = <1>;
1483                         #size-cells = <1>;
1484                         ranges = <0x0 0x68000 0x1000>;
1485
1486                         uart6: serial@0 {
1487                                 compatible = "ti,omap4-uart";
1488                                 reg = <0x0 0x100>;
1489                                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1490                                 clock-frequency = <48000000>;
1491                         };
1492                 };
1493
1494                 target-module@6a000 {                   /* 0x4806a000, ap 24 0a.0 */
1495                         compatible = "ti,sysc-omap2", "ti,sysc";
1496                         reg = <0x6a050 0x4>,
1497                               <0x6a054 0x4>,
1498                               <0x6a058 0x4>;
1499                         reg-names = "rev", "sysc", "syss";
1500                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1501                                          SYSC_OMAP2_SOFTRESET |
1502                                          SYSC_OMAP2_AUTOIDLE)>;
1503                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1504                                         <SYSC_IDLE_NO>,
1505                                         <SYSC_IDLE_SMART>,
1506                                         <SYSC_IDLE_SMART_WKUP>;
1507                         ti,syss-mask = <1>;
1508                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1509                         clocks = <&l4per_clkctrl OMAP5_UART1_CLKCTRL 0>;
1510                         clock-names = "fck";
1511                         #address-cells = <1>;
1512                         #size-cells = <1>;
1513                         ranges = <0x0 0x6a000 0x1000>;
1514
1515                         uart1: serial@0 {
1516                                 compatible = "ti,omap4-uart";
1517                                 reg = <0x0 0x100>;
1518                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1519                                 clock-frequency = <48000000>;
1520                         };
1521                 };
1522
1523                 target-module@6c000 {                   /* 0x4806c000, ap 26 22.0 */
1524                         compatible = "ti,sysc-omap2", "ti,sysc";
1525                         reg = <0x6c050 0x4>,
1526                               <0x6c054 0x4>,
1527                               <0x6c058 0x4>;
1528                         reg-names = "rev", "sysc", "syss";
1529                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1530                                          SYSC_OMAP2_SOFTRESET |
1531                                          SYSC_OMAP2_AUTOIDLE)>;
1532                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1533                                         <SYSC_IDLE_NO>,
1534                                         <SYSC_IDLE_SMART>,
1535                                         <SYSC_IDLE_SMART_WKUP>;
1536                         ti,syss-mask = <1>;
1537                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1538                         clocks = <&l4per_clkctrl OMAP5_UART2_CLKCTRL 0>;
1539                         clock-names = "fck";
1540                         #address-cells = <1>;
1541                         #size-cells = <1>;
1542                         ranges = <0x0 0x6c000 0x1000>;
1543
1544                         uart2: serial@0 {
1545                                 compatible = "ti,omap4-uart";
1546                                 reg = <0x0 0x100>;
1547                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1548                                 clock-frequency = <48000000>;
1549                         };
1550                 };
1551
1552                 target-module@6e000 {                   /* 0x4806e000, ap 28 44.1 */
1553                         compatible = "ti,sysc-omap2", "ti,sysc";
1554                         reg = <0x6e050 0x4>,
1555                               <0x6e054 0x4>,
1556                               <0x6e058 0x4>;
1557                         reg-names = "rev", "sysc", "syss";
1558                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1559                                          SYSC_OMAP2_SOFTRESET |
1560                                          SYSC_OMAP2_AUTOIDLE)>;
1561                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1562                                         <SYSC_IDLE_NO>,
1563                                         <SYSC_IDLE_SMART>,
1564                                         <SYSC_IDLE_SMART_WKUP>;
1565                         ti,syss-mask = <1>;
1566                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1567                         clocks = <&l4per_clkctrl OMAP5_UART4_CLKCTRL 0>;
1568                         clock-names = "fck";
1569                         #address-cells = <1>;
1570                         #size-cells = <1>;
1571                         ranges = <0x0 0x6e000 0x1000>;
1572
1573                         uart4: serial@0 {
1574                                 compatible = "ti,omap4-uart";
1575                                 reg = <0x0 0x100>;
1576                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1577                                 clock-frequency = <48000000>;
1578                         };
1579                 };
1580
1581                 target-module@70000 {                   /* 0x48070000, ap 30 14.0 */
1582                         compatible = "ti,sysc-omap2", "ti,sysc";
1583                         reg = <0x70000 0x8>,
1584                               <0x70010 0x8>,
1585                               <0x70090 0x8>;
1586                         reg-names = "rev", "sysc", "syss";
1587                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1588                                          SYSC_OMAP2_ENAWAKEUP |
1589                                          SYSC_OMAP2_SOFTRESET |
1590                                          SYSC_OMAP2_AUTOIDLE)>;
1591                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1592                                         <SYSC_IDLE_NO>,
1593                                         <SYSC_IDLE_SMART>,
1594                                         <SYSC_IDLE_SMART_WKUP>;
1595                         ti,syss-mask = <1>;
1596                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1597                         clocks = <&l4per_clkctrl OMAP5_I2C1_CLKCTRL 0>;
1598                         clock-names = "fck";
1599                         #address-cells = <1>;
1600                         #size-cells = <1>;
1601                         ranges = <0x0 0x70000 0x1000>;
1602
1603                         i2c1: i2c@0 {
1604                                 compatible = "ti,omap4-i2c";
1605                                 reg = <0x0 0x100>;
1606                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1607                                 #address-cells = <1>;
1608                                 #size-cells = <0>;
1609                         };
1610                 };
1611
1612                 target-module@72000 {                   /* 0x48072000, ap 32 1c.0 */
1613                         compatible = "ti,sysc-omap2", "ti,sysc";
1614                         reg = <0x72000 0x8>,
1615                               <0x72010 0x8>,
1616                               <0x72090 0x8>;
1617                         reg-names = "rev", "sysc", "syss";
1618                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1619                                          SYSC_OMAP2_ENAWAKEUP |
1620                                          SYSC_OMAP2_SOFTRESET |
1621                                          SYSC_OMAP2_AUTOIDLE)>;
1622                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1623                                         <SYSC_IDLE_NO>,
1624                                         <SYSC_IDLE_SMART>,
1625                                         <SYSC_IDLE_SMART_WKUP>;
1626                         ti,syss-mask = <1>;
1627                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1628                         clocks = <&l4per_clkctrl OMAP5_I2C2_CLKCTRL 0>;
1629                         clock-names = "fck";
1630                         #address-cells = <1>;
1631                         #size-cells = <1>;
1632                         ranges = <0x0 0x72000 0x1000>;
1633
1634                         i2c2: i2c@0 {
1635                                 compatible = "ti,omap4-i2c";
1636                                 reg = <0x0 0x100>;
1637                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1638                                 #address-cells = <1>;
1639                                 #size-cells = <0>;
1640                         };
1641                 };
1642
1643                 target-module@78000 {                   /* 0x48078000, ap 39 12.0 */
1644                         compatible = "ti,sysc";
1645                         status = "disabled";
1646                         #address-cells = <1>;
1647                         #size-cells = <1>;
1648                         ranges = <0x0 0x78000 0x1000>;
1649                 };
1650
1651                 target-module@7a000 {                   /* 0x4807a000, ap 81 2c.0 */
1652                         compatible = "ti,sysc-omap2", "ti,sysc";
1653                         reg = <0x7a000 0x8>,
1654                               <0x7a010 0x8>,
1655                               <0x7a090 0x8>;
1656                         reg-names = "rev", "sysc", "syss";
1657                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1658                                          SYSC_OMAP2_ENAWAKEUP |
1659                                          SYSC_OMAP2_SOFTRESET |
1660                                          SYSC_OMAP2_AUTOIDLE)>;
1661                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1662                                         <SYSC_IDLE_NO>,
1663                                         <SYSC_IDLE_SMART>,
1664                                         <SYSC_IDLE_SMART_WKUP>;
1665                         ti,syss-mask = <1>;
1666                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1667                         clocks = <&l4per_clkctrl OMAP5_I2C4_CLKCTRL 0>;
1668                         clock-names = "fck";
1669                         #address-cells = <1>;
1670                         #size-cells = <1>;
1671                         ranges = <0x0 0x7a000 0x1000>;
1672
1673                         i2c4: i2c@0 {
1674                                 compatible = "ti,omap4-i2c";
1675                                 reg = <0x0 0x100>;
1676                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1677                                 #address-cells = <1>;
1678                                 #size-cells = <0>;
1679                         };
1680                 };
1681
1682                 target-module@7c000 {                   /* 0x4807c000, ap 83 34.0 */
1683                         compatible = "ti,sysc-omap2", "ti,sysc";
1684                         reg = <0x7c000 0x8>,
1685                               <0x7c010 0x8>,
1686                               <0x7c090 0x8>;
1687                         reg-names = "rev", "sysc", "syss";
1688                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1689                                          SYSC_OMAP2_ENAWAKEUP |
1690                                          SYSC_OMAP2_SOFTRESET |
1691                                          SYSC_OMAP2_AUTOIDLE)>;
1692                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1693                                         <SYSC_IDLE_NO>,
1694                                         <SYSC_IDLE_SMART>,
1695                                         <SYSC_IDLE_SMART_WKUP>;
1696                         ti,syss-mask = <1>;
1697                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1698                         clocks = <&l4per_clkctrl OMAP5_I2C5_CLKCTRL 0>;
1699                         clock-names = "fck";
1700                         #address-cells = <1>;
1701                         #size-cells = <1>;
1702                         ranges = <0x0 0x7c000 0x1000>;
1703
1704                         i2c5: i2c@0 {
1705                                 compatible = "ti,omap4-i2c";
1706                                 reg = <0x0 0x100>;
1707                                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1708                                 #address-cells = <1>;
1709                                 #size-cells = <0>;
1710                         };
1711                 };
1712
1713                 target-module@86000 {                   /* 0x48086000, ap 41 5e.0 */
1714                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1715                         reg = <0x86000 0x4>,
1716                               <0x86010 0x4>;
1717                         reg-names = "rev", "sysc";
1718                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1719                                          SYSC_OMAP4_SOFTRESET)>;
1720                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1721                                         <SYSC_IDLE_NO>,
1722                                         <SYSC_IDLE_SMART>,
1723                                         <SYSC_IDLE_SMART_WKUP>;
1724                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1725                         clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 0>;
1726                         clock-names = "fck";
1727                         #address-cells = <1>;
1728                         #size-cells = <1>;
1729                         ranges = <0x0 0x86000 0x1000>;
1730
1731                         timer10: timer@0 {
1732                                 compatible = "ti,omap5430-timer";
1733                                 reg = <0x0 0x80>;
1734                                 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>,
1735                                          <&sys_clkin>;
1736                                 clock-names = "fck", "timer_sys_ck";
1737                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1738                                 ti,timer-pwm;
1739                         };
1740                 };
1741
1742                 target-module@88000 {                   /* 0x48088000, ap 43 66.0 */
1743                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1744                         reg = <0x88000 0x4>,
1745                               <0x88010 0x4>;
1746                         reg-names = "rev", "sysc";
1747                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1748                                          SYSC_OMAP4_SOFTRESET)>;
1749                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1750                                         <SYSC_IDLE_NO>,
1751                                         <SYSC_IDLE_SMART>,
1752                                         <SYSC_IDLE_SMART_WKUP>;
1753                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1754                         clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 0>;
1755                         clock-names = "fck";
1756                         #address-cells = <1>;
1757                         #size-cells = <1>;
1758                         ranges = <0x0 0x88000 0x1000>;
1759
1760                         timer11: timer@0 {
1761                                 compatible = "ti,omap5430-timer";
1762                                 reg = <0x0 0x80>;
1763                                 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>,
1764                                          <&sys_clkin>;
1765                                 clock-names = "fck", "timer_sys_ck";
1766                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1767                                 ti,timer-pwm;
1768                         };
1769                 };
1770
1771                 rng_target: target-module@90000 {       /* 0x48090000, ap 55 1a.0 */
1772                         compatible = "ti,sysc-omap2", "ti,sysc";
1773                         reg = <0x91fe0 0x4>,
1774                               <0x91fe4 0x4>;
1775                         reg-names = "rev", "sysc";
1776                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
1777                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1778                                         <SYSC_IDLE_NO>;
1779                         /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
1780                         clocks = <&l4sec_clkctrl OMAP5_RNG_CLKCTRL 0>;
1781                         clock-names = "fck";
1782                         #address-cells = <1>;
1783                         #size-cells = <1>;
1784                         ranges = <0x0 0x90000 0x2000>;
1785
1786                         rng: rng@0 {
1787                                 compatible = "ti,omap4-rng";
1788                                 reg = <0x0 0x2000>;
1789                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1790                         };
1791                 };
1792
1793                 target-module@98000 {                   /* 0x48098000, ap 47 08.0 */
1794                         compatible = "ti,sysc-omap4", "ti,sysc";
1795                         reg = <0x98000 0x4>,
1796                               <0x98010 0x4>;
1797                         reg-names = "rev", "sysc";
1798                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1799                                          SYSC_OMAP4_SOFTRESET)>;
1800                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1801                                         <SYSC_IDLE_NO>,
1802                                         <SYSC_IDLE_SMART>,
1803                                         <SYSC_IDLE_SMART_WKUP>;
1804                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1805                         clocks = <&l4per_clkctrl OMAP5_MCSPI1_CLKCTRL 0>;
1806                         clock-names = "fck";
1807                         #address-cells = <1>;
1808                         #size-cells = <1>;
1809                         ranges = <0x0 0x98000 0x1000>;
1810
1811                         mcspi1: spi@0 {
1812                                 compatible = "ti,omap4-mcspi";
1813                                 reg = <0x0 0x200>;
1814                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1815                                 #address-cells = <1>;
1816                                 #size-cells = <0>;
1817                                 ti,spi-num-cs = <4>;
1818                                 dmas = <&sdma 35>,
1819                                        <&sdma 36>,
1820                                        <&sdma 37>,
1821                                        <&sdma 38>,
1822                                        <&sdma 39>,
1823                                        <&sdma 40>,
1824                                        <&sdma 41>,
1825                                        <&sdma 42>;
1826                                 dma-names = "tx0", "rx0", "tx1", "rx1",
1827                                             "tx2", "rx2", "tx3", "rx3";
1828                         };
1829                 };
1830
1831                 target-module@9a000 {                   /* 0x4809a000, ap 49 10.0 */
1832                         compatible = "ti,sysc-omap4", "ti,sysc";
1833                         reg = <0x9a000 0x4>,
1834                               <0x9a010 0x4>;
1835                         reg-names = "rev", "sysc";
1836                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1837                                          SYSC_OMAP4_SOFTRESET)>;
1838                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1839                                         <SYSC_IDLE_NO>,
1840                                         <SYSC_IDLE_SMART>,
1841                                         <SYSC_IDLE_SMART_WKUP>;
1842                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1843                         clocks = <&l4per_clkctrl OMAP5_MCSPI2_CLKCTRL 0>;
1844                         clock-names = "fck";
1845                         #address-cells = <1>;
1846                         #size-cells = <1>;
1847                         ranges = <0x0 0x9a000 0x1000>;
1848
1849                         mcspi2: spi@0 {
1850                                 compatible = "ti,omap4-mcspi";
1851                                 reg = <0x0 0x200>;
1852                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
1853                                 #address-cells = <1>;
1854                                 #size-cells = <0>;
1855                                 ti,spi-num-cs = <2>;
1856                                 dmas = <&sdma 43>,
1857                                        <&sdma 44>,
1858                                        <&sdma 45>,
1859                                        <&sdma 46>;
1860                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1861                         };
1862                 };
1863
1864                 target-module@9c000 {                   /* 0x4809c000, ap 51 3a.0 */
1865                         compatible = "ti,sysc-omap4", "ti,sysc";
1866                         reg = <0x9c000 0x4>,
1867                               <0x9c010 0x4>;
1868                         reg-names = "rev", "sysc";
1869                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1870                                          SYSC_OMAP4_SOFTRESET)>;
1871                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1872                                         <SYSC_IDLE_NO>,
1873                                         <SYSC_IDLE_SMART>,
1874                                         <SYSC_IDLE_SMART_WKUP>;
1875                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1876                                         <SYSC_IDLE_NO>,
1877                                         <SYSC_IDLE_SMART>,
1878                                         <SYSC_IDLE_SMART_WKUP>;
1879                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1880                         clocks = <&l3init_clkctrl OMAP5_MMC1_CLKCTRL 0>;
1881                         clock-names = "fck";
1882                         #address-cells = <1>;
1883                         #size-cells = <1>;
1884                         ranges = <0x0 0x9c000 0x1000>;
1885
1886                         mmc1: mmc@0 {
1887                                 compatible = "ti,omap4-hsmmc";
1888                                 reg = <0x0 0x400>;
1889                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1890                                 ti,dual-volt;
1891                                 ti,needs-special-reset;
1892                                 dmas = <&sdma 61>, <&sdma 62>;
1893                                 dma-names = "tx", "rx";
1894                                 pbias-supply = <&pbias_mmc_reg>;
1895                         };
1896                 };
1897
1898                 target-module@a2000 {                   /* 0x480a2000, ap 75 02.0 */
1899                         compatible = "ti,sysc";
1900                         status = "disabled";
1901                         #address-cells = <1>;
1902                         #size-cells = <1>;
1903                         ranges = <0x0 0xa2000 0x1000>;
1904                 };
1905
1906                 target-module@a4000 {                   /* 0x480a4000, ap 57 3c.0 */
1907                         compatible = "ti,sysc";
1908                         status = "disabled";
1909                         #address-cells = <1>;
1910                         #size-cells = <1>;
1911                         ranges = <0x00000000 0x000a4000 0x00001000>,
1912                                  <0x00001000 0x000a5000 0x00001000>;
1913                 };
1914
1915                 des_target: target-module@a5000 {       /* 0x480a5000 */
1916                         compatible = "ti,sysc-omap2", "ti,sysc";
1917                         reg = <0xa5030 0x4>,
1918                               <0xa5034 0x4>,
1919                               <0xa5038 0x4>;
1920                         reg-names = "rev", "sysc", "syss";
1921                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
1922                                          SYSC_OMAP2_AUTOIDLE)>;
1923                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1924                                         <SYSC_IDLE_NO>,
1925                                         <SYSC_IDLE_SMART>,
1926                                         <SYSC_IDLE_SMART_WKUP>;
1927                         ti,syss-mask = <1>;
1928                         /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
1929                         clocks = <&l4sec_clkctrl OMAP5_DES3DES_CLKCTRL 0>;
1930                         clock-names = "fck";
1931                         #address-cells = <1>;
1932                         #size-cells = <1>;
1933                         ranges = <0 0xa5000 0x00001000>;
1934                         status = "disabled";
1935
1936                         des: des@0 {
1937                                 compatible = "ti,omap4-des";
1938                                 reg = <0 0xa0>;
1939                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
1940                                 dmas = <&sdma 117>, <&sdma 116>;
1941                                 dma-names = "tx", "rx";
1942                         };
1943                 };
1944
1945                 target-module@a8000 {                   /* 0x480a8000, ap 59 2a.0 */
1946                         compatible = "ti,sysc";
1947                         status = "disabled";
1948                         #address-cells = <1>;
1949                         #size-cells = <1>;
1950                         ranges = <0x0 0xa8000 0x4000>;
1951                 };
1952
1953                 target-module@ad000 {                   /* 0x480ad000, ap 61 20.0 */
1954                         compatible = "ti,sysc-omap4", "ti,sysc";
1955                         reg = <0xad000 0x4>,
1956                               <0xad010 0x4>;
1957                         reg-names = "rev", "sysc";
1958                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1959                                          SYSC_OMAP4_SOFTRESET)>;
1960                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1961                                         <SYSC_IDLE_NO>,
1962                                         <SYSC_IDLE_SMART>,
1963                                         <SYSC_IDLE_SMART_WKUP>;
1964                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1965                                         <SYSC_IDLE_NO>,
1966                                         <SYSC_IDLE_SMART>,
1967                                         <SYSC_IDLE_SMART_WKUP>;
1968                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1969                         clocks = <&l4per_clkctrl OMAP5_MMC3_CLKCTRL 0>;
1970                         clock-names = "fck";
1971                         #address-cells = <1>;
1972                         #size-cells = <1>;
1973                         ranges = <0x0 0xad000 0x1000>;
1974
1975                         mmc3: mmc@0 {
1976                                 compatible = "ti,omap4-hsmmc";
1977                                 reg = <0x0 0x400>;
1978                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1979                                 ti,needs-special-reset;
1980                                 dmas = <&sdma 77>, <&sdma 78>;
1981                                 dma-names = "tx", "rx";
1982                         };
1983                 };
1984
1985                 target-module@b2000 {                   /* 0x480b2000, ap 37 0c.0 */
1986                         compatible = "ti,sysc";
1987                         status = "disabled";
1988                         #address-cells = <1>;
1989                         #size-cells = <1>;
1990                         ranges = <0x0 0xb2000 0x1000>;
1991                 };
1992
1993                 target-module@b4000 {                   /* 0x480b4000, ap 65 42.0 */
1994                         compatible = "ti,sysc-omap4", "ti,sysc";
1995                         reg = <0xb4000 0x4>,
1996                               <0xb4010 0x4>;
1997                         reg-names = "rev", "sysc";
1998                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1999                                          SYSC_OMAP4_SOFTRESET)>;
2000                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2001                                         <SYSC_IDLE_NO>,
2002                                         <SYSC_IDLE_SMART>,
2003                                         <SYSC_IDLE_SMART_WKUP>;
2004                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2005                                         <SYSC_IDLE_NO>,
2006                                         <SYSC_IDLE_SMART>,
2007                                         <SYSC_IDLE_SMART_WKUP>;
2008                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
2009                         clocks = <&l3init_clkctrl OMAP5_MMC2_CLKCTRL 0>;
2010                         clock-names = "fck";
2011                         #address-cells = <1>;
2012                         #size-cells = <1>;
2013                         ranges = <0x0 0xb4000 0x1000>;
2014
2015                         mmc2: mmc@0 {
2016                                 compatible = "ti,omap4-hsmmc";
2017                                 reg = <0x0 0x400>;
2018                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2019                                 ti,needs-special-reset;
2020                                 dmas = <&sdma 47>, <&sdma 48>;
2021                                 dma-names = "tx", "rx";
2022                         };
2023                 };
2024
2025                 target-module@b8000 {                   /* 0x480b8000, ap 67 32.0 */
2026                         compatible = "ti,sysc-omap4", "ti,sysc";
2027                         reg = <0xb8000 0x4>,
2028                               <0xb8010 0x4>;
2029                         reg-names = "rev", "sysc";
2030                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2031                                          SYSC_OMAP4_SOFTRESET)>;
2032                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2033                                         <SYSC_IDLE_NO>,
2034                                         <SYSC_IDLE_SMART>,
2035                                         <SYSC_IDLE_SMART_WKUP>;
2036                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2037                         clocks = <&l4per_clkctrl OMAP5_MCSPI3_CLKCTRL 0>;
2038                         clock-names = "fck";
2039                         #address-cells = <1>;
2040                         #size-cells = <1>;
2041                         ranges = <0x0 0xb8000 0x1000>;
2042
2043                         mcspi3: spi@0 {
2044                                 compatible = "ti,omap4-mcspi";
2045                                 reg = <0x0 0x200>;
2046                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2047                                 #address-cells = <1>;
2048                                 #size-cells = <0>;
2049                                 ti,spi-num-cs = <2>;
2050                                 dmas = <&sdma 15>, <&sdma 16>;
2051                                 dma-names = "tx0", "rx0";
2052                         };
2053                 };
2054
2055                 target-module@ba000 {                   /* 0x480ba000, ap 69 18.0 */
2056                         compatible = "ti,sysc-omap4", "ti,sysc";
2057                         reg = <0xba000 0x4>,
2058                               <0xba010 0x4>;
2059                         reg-names = "rev", "sysc";
2060                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2061                                          SYSC_OMAP4_SOFTRESET)>;
2062                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2063                                         <SYSC_IDLE_NO>,
2064                                         <SYSC_IDLE_SMART>,
2065                                         <SYSC_IDLE_SMART_WKUP>;
2066                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2067                         clocks = <&l4per_clkctrl OMAP5_MCSPI4_CLKCTRL 0>;
2068                         clock-names = "fck";
2069                         #address-cells = <1>;
2070                         #size-cells = <1>;
2071                         ranges = <0x0 0xba000 0x1000>;
2072
2073                         mcspi4: spi@0 {
2074                                 compatible = "ti,omap4-mcspi";
2075                                 reg = <0x0 0x200>;
2076                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2077                                 #address-cells = <1>;
2078                                 #size-cells = <0>;
2079                                 ti,spi-num-cs = <1>;
2080                                 dmas = <&sdma 70>, <&sdma 71>;
2081                                 dma-names = "tx0", "rx0";
2082                         };
2083                 };
2084
2085                 target-module@d1000 {                   /* 0x480d1000, ap 71 28.0 */
2086                         compatible = "ti,sysc-omap4", "ti,sysc";
2087                         reg = <0xd1000 0x4>,
2088                               <0xd1010 0x4>;
2089                         reg-names = "rev", "sysc";
2090                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2091                                          SYSC_OMAP4_SOFTRESET)>;
2092                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2093                                         <SYSC_IDLE_NO>,
2094                                         <SYSC_IDLE_SMART>,
2095                                         <SYSC_IDLE_SMART_WKUP>;
2096                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2097                                         <SYSC_IDLE_NO>,
2098                                         <SYSC_IDLE_SMART>,
2099                                         <SYSC_IDLE_SMART_WKUP>;
2100                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2101                         clocks = <&l4per_clkctrl OMAP5_MMC4_CLKCTRL 0>;
2102                         clock-names = "fck";
2103                         #address-cells = <1>;
2104                         #size-cells = <1>;
2105                         ranges = <0x0 0xd1000 0x1000>;
2106
2107                         mmc4: mmc@0 {
2108                                 compatible = "ti,omap4-hsmmc";
2109                                 reg = <0x0 0x400>;
2110                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2111                                 ti,needs-special-reset;
2112                                 dmas = <&sdma 57>, <&sdma 58>;
2113                                 dma-names = "tx", "rx";
2114                         };
2115                 };
2116
2117                 target-module@d5000 {                   /* 0x480d5000, ap 73 30.0 */
2118                         compatible = "ti,sysc-omap4", "ti,sysc";
2119                         reg = <0xd5000 0x4>,
2120                               <0xd5010 0x4>;
2121                         reg-names = "rev", "sysc";
2122                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2123                                          SYSC_OMAP4_SOFTRESET)>;
2124                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2125                                         <SYSC_IDLE_NO>,
2126                                         <SYSC_IDLE_SMART>,
2127                                         <SYSC_IDLE_SMART_WKUP>;
2128                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2129                                         <SYSC_IDLE_NO>,
2130                                         <SYSC_IDLE_SMART>,
2131                                         <SYSC_IDLE_SMART_WKUP>;
2132                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2133                         clocks = <&l4per_clkctrl OMAP5_MMC5_CLKCTRL 0>;
2134                         clock-names = "fck";
2135                         #address-cells = <1>;
2136                         #size-cells = <1>;
2137                         ranges = <0x0 0xd5000 0x1000>;
2138
2139                         mmc5: mmc@0 {
2140                                 compatible = "ti,omap4-hsmmc";
2141                                 reg = <0x0 0x400>;
2142                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2143                                 ti,needs-special-reset;
2144                                 dmas = <&sdma 59>, <&sdma 60>;
2145                                 dma-names = "tx", "rx";
2146                         };
2147                 };
2148         };
2149
2150         segment@200000 {                                        /* 0x48200000 */
2151                 compatible = "simple-bus";
2152                 #address-cells = <1>;
2153                 #size-cells = <1>;
2154         };
2155 };
2156
2157 &l4_wkup {                                              /* 0x4ae00000 */
2158         compatible = "ti,omap5-l4-wkup", "simple-bus";
2159         reg = <0x4ae00000 0x800>,
2160               <0x4ae00800 0x800>,
2161               <0x4ae01000 0x1000>;
2162         reg-names = "ap", "la", "ia0";
2163         #address-cells = <1>;
2164         #size-cells = <1>;
2165         ranges = <0x00000000 0x4ae00000 0x010000>,      /* segment 0 */
2166                  <0x00010000 0x4ae10000 0x010000>,      /* segment 1 */
2167                  <0x00020000 0x4ae20000 0x010000>;      /* segment 2 */
2168
2169         segment@0 {                                     /* 0x4ae00000 */
2170                 compatible = "simple-bus";
2171                 #address-cells = <1>;
2172                 #size-cells = <1>;
2173                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
2174                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
2175                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
2176                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
2177                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
2178                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
2179                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
2180                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
2181                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
2182                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
2183                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
2184
2185                 target-module@4000 {                    /* 0x4ae04000, ap 17 20.0 */
2186                         compatible = "ti,sysc-omap2", "ti,sysc";
2187                         reg = <0x4000 0x4>,
2188                               <0x4010 0x4>;
2189                         reg-names = "rev", "sysc";
2190                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2191                                         <SYSC_IDLE_NO>;
2192                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2193                         clocks = <&wkupaon_clkctrl OMAP5_COUNTER_32K_CLKCTRL 0>;
2194                         clock-names = "fck";
2195                         #address-cells = <1>;
2196                         #size-cells = <1>;
2197                         ranges = <0x0 0x4000 0x1000>;
2198
2199                         counter32k: counter@0 {
2200                                 compatible = "ti,omap-counter32k";
2201                                 reg = <0x0 0x40>;
2202                         };
2203                 };
2204
2205                 target-module@6000 {                    /* 0x4ae06000, ap 3 08.0 */
2206                         compatible = "ti,sysc-omap4", "ti,sysc";
2207                         reg = <0x6000 0x4>;
2208                         reg-names = "rev";
2209                         #address-cells = <1>;
2210                         #size-cells = <1>;
2211                         ranges = <0x0 0x6000 0x2000>;
2212
2213                         prm: prm@0 {
2214                                 compatible = "ti,omap5-prm", "simple-bus";
2215                                 reg = <0x0 0x2000>;
2216                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
2217                                 #address-cells = <1>;
2218                                 #size-cells = <1>;
2219                                 ranges = <0 0 0x2000>;
2220
2221                                 prm_clocks: clocks {
2222                                         #address-cells = <1>;
2223                                         #size-cells = <0>;
2224                                 };
2225
2226                                 prm_clockdomains: clockdomains {
2227                                 };
2228                         };
2229                 };
2230
2231                 target-module@a000 {                    /* 0x4ae0a000, ap 15 2c.0 */
2232                         compatible = "ti,sysc-omap4", "ti,sysc";
2233                         reg = <0xa000 0x4>;
2234                         reg-names = "rev";
2235                         #address-cells = <1>;
2236                         #size-cells = <1>;
2237                         ranges = <0x0 0xa000 0x1000>;
2238
2239                         scrm: scrm@0 {
2240                                 compatible = "ti,omap5-scrm";
2241                                 reg = <0x0 0x1000>;
2242
2243                                 scrm_clocks: clocks {
2244                                         #address-cells = <1>;
2245                                         #size-cells = <0>;
2246                                 };
2247
2248                                 scrm_clockdomains: clockdomains {
2249                                 };
2250                         };
2251                 };
2252
2253                 target-module@c000 {                    /* 0x4ae0c000, ap 19 28.0 */
2254                         compatible = "ti,sysc-omap4", "ti,sysc";
2255                         reg = <0xc000 0x4>;
2256                         reg-names = "rev";
2257                         #address-cells = <1>;
2258                         #size-cells = <1>;
2259                         ranges = <0x0 0xc000 0x1000>;
2260
2261                         omap5_pmx_wkup: pinmux@840 {
2262                                 compatible = "ti,omap5-padconf",
2263                                              "pinctrl-single";
2264                                 reg = <0x840 0x003c>;
2265                                 #address-cells = <1>;
2266                                 #size-cells = <0>;
2267                                 #pinctrl-cells = <1>;
2268                                 #interrupt-cells = <1>;
2269                                 interrupt-controller;
2270                                 pinctrl-single,register-width = <16>;
2271                                 pinctrl-single,function-mask = <0x7fff>;
2272                         };
2273
2274                         omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
2275                                 compatible = "ti,omap5-scm-wkup-pad-conf",
2276                                              "simple-bus";
2277                                 reg = <0xda0 0x60>;
2278                                 #address-cells = <1>;
2279                                 #size-cells = <1>;
2280                                 ranges = <0 0 0x60>;
2281
2282                                 scm_wkup_pad_conf: scm_conf@0 {
2283                                         compatible = "syscon", "simple-bus";
2284                                         reg = <0x0 0x60>;
2285                                         #address-cells = <1>;
2286                                         #size-cells = <1>;
2287                                         ranges = <0 0x0 0x60>;
2288
2289                                         scm_wkup_pad_conf_clocks: clocks@0 {
2290                                                 #address-cells = <1>;
2291                                                 #size-cells = <0>;
2292                                         };
2293                                 };
2294                         };
2295                 };
2296         };
2297
2298         segment@10000 {                                 /* 0x4ae10000 */
2299                 compatible = "simple-bus";
2300                 #address-cells = <1>;
2301                 #size-cells = <1>;
2302                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
2303                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
2304                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
2305                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
2306                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
2307                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
2308                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
2309                          <0x0000d000 0x0001d000 0x001000>;      /* ap 12 */
2310
2311                 target-module@0 {                       /* 0x4ae10000, ap 5 10.0 */
2312                         compatible = "ti,sysc-omap2", "ti,sysc";
2313                         reg = <0x0 0x4>,
2314                               <0x10 0x4>,
2315                               <0x114 0x4>;
2316                         reg-names = "rev", "sysc", "syss";
2317                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2318                                          SYSC_OMAP2_SOFTRESET |
2319                                          SYSC_OMAP2_AUTOIDLE)>;
2320                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2321                                         <SYSC_IDLE_NO>,
2322                                         <SYSC_IDLE_SMART>,
2323                                         <SYSC_IDLE_SMART_WKUP>;
2324                         ti,syss-mask = <1>;
2325                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2326                         clocks = <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 0>,
2327                                  <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 8>;
2328                         clock-names = "fck", "dbclk";
2329                         #address-cells = <1>;
2330                         #size-cells = <1>;
2331                         ranges = <0x0 0x0 0x1000>;
2332
2333                         gpio1: gpio@0 {
2334                                 compatible = "ti,omap4-gpio";
2335                                 reg = <0x0 0x200>;
2336                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
2337                                 ti,gpio-always-on;
2338                                 gpio-controller;
2339                                 #gpio-cells = <2>;
2340                                 interrupt-controller;
2341                                 #interrupt-cells = <2>;
2342                         };
2343                 };
2344
2345                 target-module@4000 {                    /* 0x4ae14000, ap 7 14.0 */
2346                         compatible = "ti,sysc-omap2", "ti,sysc";
2347                         reg = <0x4000 0x4>,
2348                               <0x4010 0x4>,
2349                               <0x4014 0x4>;
2350                         reg-names = "rev", "sysc", "syss";
2351                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2352                                          SYSC_OMAP2_SOFTRESET)>;
2353                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2354                                         <SYSC_IDLE_NO>,
2355                                         <SYSC_IDLE_SMART>,
2356                                         <SYSC_IDLE_SMART_WKUP>;
2357                         ti,syss-mask = <1>;
2358                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2359                         clocks = <&wkupaon_clkctrl OMAP5_WD_TIMER2_CLKCTRL 0>;
2360                         clock-names = "fck";
2361                         #address-cells = <1>;
2362                         #size-cells = <1>;
2363                         ranges = <0x0 0x4000 0x1000>;
2364
2365                         wdt2: wdt@0 {
2366                                 compatible = "ti,omap5-wdt", "ti,omap3-wdt";
2367                                 reg = <0x0 0x80>;
2368                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
2369                         };
2370                 };
2371
2372                 timer1_target: target-module@8000 {     /* 0x4ae18000, ap 9 18.0 */
2373                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
2374                         reg = <0x8000 0x4>,
2375                               <0x8010 0x4>;
2376                         reg-names = "rev", "sysc";
2377                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2378                                          SYSC_OMAP4_SOFTRESET)>;
2379                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2380                                         <SYSC_IDLE_NO>,
2381                                         <SYSC_IDLE_SMART>,
2382                                         <SYSC_IDLE_SMART_WKUP>;
2383                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2384                         clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 0>;
2385                         clock-names = "fck";
2386                         #address-cells = <1>;
2387                         #size-cells = <1>;
2388                         ranges = <0x0 0x8000 0x1000>;
2389
2390                         timer1: timer@0 {
2391                                 compatible = "ti,omap5430-timer";
2392                                 reg = <0x0 0x80>;
2393                                 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>,
2394                                          <&sys_clkin>;
2395                                 clock-names = "fck", "timer_sys_ck";
2396                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2397                                 ti,timer-alwon;
2398                         };
2399                 };
2400
2401                 target-module@c000 {                    /* 0x4ae1c000, ap 11 1c.0 */
2402                         compatible = "ti,sysc-omap2", "ti,sysc";
2403                         reg = <0xc000 0x4>,
2404                               <0xc010 0x4>;
2405                         reg-names = "rev", "sysc";
2406                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2407                                          SYSC_OMAP2_SOFTRESET)>;
2408                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2409                                         <SYSC_IDLE_NO>,
2410                                         <SYSC_IDLE_SMART>;
2411                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2412                         clocks = <&wkupaon_clkctrl OMAP5_KBD_CLKCTRL 0>;
2413                         clock-names = "fck";
2414                         #address-cells = <1>;
2415                         #size-cells = <1>;
2416                         ranges = <0x0 0xc000 0x1000>;
2417
2418                         keypad: keypad@0 {
2419                                 compatible = "ti,omap4-keypad";
2420                                 reg = <0x0 0x400>;
2421                         };
2422                 };
2423         };
2424
2425         segment@20000 {                                 /* 0x4ae20000 */
2426                 compatible = "simple-bus";
2427                 #address-cells = <1>;
2428                 #size-cells = <1>;
2429                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
2430                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
2431                          <0x00000000 0x00020000 0x001000>,      /* ap 21 */
2432                          <0x00001000 0x00021000 0x001000>,      /* ap 22 */
2433                          <0x00002000 0x00022000 0x001000>,      /* ap 23 */
2434                          <0x00003000 0x00023000 0x001000>,      /* ap 24 */
2435                          <0x00007000 0x00027000 0x000400>,      /* ap 25 */
2436                          <0x00008000 0x00028000 0x000800>,      /* ap 26 */
2437                          <0x00009000 0x00029000 0x000100>,      /* ap 27 */
2438                          <0x00008800 0x00028800 0x000200>,      /* ap 28 */
2439                          <0x00008a00 0x00028a00 0x000100>;      /* ap 29 */
2440
2441                 target-module@0 {                       /* 0x4ae20000, ap 21 04.0 */
2442                         compatible = "ti,sysc";
2443                         status = "disabled";
2444                         #address-cells = <1>;
2445                         #size-cells = <1>;
2446                         ranges = <0x0 0x0 0x1000>;
2447                 };
2448
2449                 target-module@2000 {                    /* 0x4ae22000, ap 23 0c.0 */
2450                         compatible = "ti,sysc";
2451                         status = "disabled";
2452                         #address-cells = <1>;
2453                         #size-cells = <1>;
2454                         ranges = <0x0 0x2000 0x1000>;
2455                 };
2456
2457                 target-module@6000 {                    /* 0x4ae26000, ap 13 24.0 */
2458                         compatible = "ti,sysc";
2459                         status = "disabled";
2460                         #address-cells = <1>;
2461                         #size-cells = <1>;
2462                         ranges = <0x00000000 0x00006000 0x00001000>,
2463                                  <0x00001000 0x00007000 0x00000400>,
2464                                  <0x00002000 0x00008000 0x00000800>,
2465                                  <0x00002800 0x00008800 0x00000200>,
2466                                  <0x00002a00 0x00008a00 0x00000100>,
2467                                  <0x00003000 0x00009000 0x00000100>;
2468                 };
2469         };
2470 };
2471