arch/arm/boot/dts/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-bus";
   4         reg = <0x4a000000 0x800>,
   5               <0x4a000800 0x800>,
   6               <0x4a001000 0x1000>;
   7         reg-names = "ap", "la", "ia0";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  17
  18         segment@0 {                                     /* 0x4a000000 */
  19                 compatible = "simple-bus";
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  43
  44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  45                         compatible = "ti,sysc-omap4", "ti,sysc";
  46                         ti,hwmods = "ctrl_module_core";
  47                         reg = <0x2000 0x4>,
  48                               <0x2010 0x4>;
  49                         reg-names = "rev", "sysc";
  50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  51                                         <SYSC_IDLE_NO>,
  52                                         <SYSC_IDLE_SMART>,
  53                                         <SYSC_IDLE_SMART_WKUP>;
  54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges = <0x0 0x2000 0x1000>;
  58
  59                         omap4_scm_core: scm@0 {
  60                                 compatible = "ti,omap4-scm-core", "simple-bus";
  61                                 reg = <0x0 0x1000>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <1>;
  64                                 ranges = <0 0 0x1000>;
  65
  66                                 scm_conf: scm_conf@0 {
  67                                         compatible = "syscon";
  68                                         reg = <0x0 0x800>;
  69                                         #address-cells = <1>;
  70                                         #size-cells = <1>;
  71                                 };
  72
  73                                 omap_control_usb2phy: control-phy@300 {
  74                                         compatible = "ti,control-phy-usb2";
  75                                         reg = <0x300 0x4>;
  76                                         reg-names = "power";
  77                                 };
  78
  79                                 omap_control_usbotg: control-phy@33c {
  80                                         compatible = "ti,control-phy-otghs";
  81                                         reg = <0x33c 0x4>;
  82                                         reg-names = "otghs_control";
  83                                 };
  84                         };
  85                 };
  86
  87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  88                         compatible = "ti,sysc-omap4", "ti,sysc";
  89                         reg = <0x4000 0x4>;
  90                         reg-names = "rev";
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         ranges = <0x0 0x4000 0x1000>;
  94
  95                         cm1: cm1@0 {
  96                                 compatible = "ti,omap4-cm1", "simple-bus";
  97                                 reg = <0x0 0x2000>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <1>;
 100                                 ranges = <0 0 0x2000>;
 101
 102                                 cm1_clocks: clocks {
 103                                         #address-cells = <1>;
 104                                         #size-cells = <0>;
 105                                 };
 106
 107                                 cm1_clockdomains: clockdomains {
 108                                 };
 109                         };
 110                 };
 111
 112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 113                         compatible = "ti,sysc-omap4", "ti,sysc";
 114                         reg = <0x8000 0x4>;
 115                         reg-names = "rev";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x0 0x8000 0x2000>;
 119
 120                         cm2: cm2@0 {
 121                                 compatible = "ti,omap4-cm2", "simple-bus";
 122                                 reg = <0x0 0x2000>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <1>;
 125                                 ranges = <0 0 0x2000>;
 126
 127                                 cm2_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm2_clockdomains: clockdomains {
 133                                 };
 134                         };
 135                 };
 136
 137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 138                         compatible = "ti,sysc-omap2", "ti,sysc";
 139                         reg = <0x56000 0x4>,
 140                               <0x5602c 0x4>,
 141                               <0x56028 0x4>;
 142                         reg-names = "rev", "sysc", "syss";
 143                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 144                                          SYSC_OMAP2_EMUFREE |
 145                                          SYSC_OMAP2_SOFTRESET |
 146                                          SYSC_OMAP2_AUTOIDLE)>;
 147                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 148                                         <SYSC_IDLE_NO>,
 149                                         <SYSC_IDLE_SMART>;
 150                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 151                                         <SYSC_IDLE_NO>,
 152                                         <SYSC_IDLE_SMART>;
 153                         ti,syss-mask = <1>;
 154                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 155                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 156                         clock-names = "fck";
 157                         #address-cells = <1>;
 158                         #size-cells = <1>;
 159                         ranges = <0x0 0x56000 0x1000>;
 160
 161                         sdma: dma-controller@0 {
 162                                 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
 163                                 reg = <0x0 0x1000>;
 164                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 165                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 166                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 168                                 #dma-cells = <1>;
 169                                 dma-channels = <32>;
 170                                 dma-requests = <127>;
 171                         };
 172                 };
 173
 174                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 175                         compatible = "ti,sysc-omap2", "ti,sysc";
 176                         reg = <0x58000 0x4>,
 177                               <0x58010 0x4>,
 178                               <0x58014 0x4>;
 179                         reg-names = "rev", "sysc", "syss";
 180                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 181                                          SYSC_OMAP2_SOFTRESET |
 182                                          SYSC_OMAP2_AUTOIDLE)>;
 183                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 184                                         <SYSC_IDLE_NO>,
 185                                         <SYSC_IDLE_SMART>,
 186                                         <SYSC_IDLE_SMART_WKUP>;
 187                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 188                                         <SYSC_IDLE_NO>,
 189                                         <SYSC_IDLE_SMART>,
 190                                         <SYSC_IDLE_SMART_WKUP>;
 191                         ti,syss-mask = <1>;
 192                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 193                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 194                         clock-names = "fck";
 195                         #address-cells = <1>;
 196                         #size-cells = <1>;
 197                         ranges = <0x0 0x58000 0x5000>;
 198
 199                         hsi: hsi@0 {
 200                                 compatible = "ti,omap4-hsi";
 201                                 reg = <0x0 0x4000>,
 202                                       <0x5000 0x1000>;
 203                                 reg-names = "sys", "gdd";
 204
 205                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 206                                 clock-names = "hsi_fck";
 207
 208                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 209                                 interrupt-names = "gdd_mpu";
 210
 211                                 #address-cells = <1>;
 212                                 #size-cells = <1>;
 213                                 ranges = <0 0 0x4000>;
 214
 215                                 hsi_port1: hsi-port@2000 {
 216                                         compatible = "ti,omap4-hsi-port";
 217                                         reg = <0x2000 0x800>,
 218                                               <0x2800 0x800>;
 219                                         reg-names = "tx", "rx";
 220                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 221                                 };
 222
 223                                 hsi_port2: hsi-port@3000 {
 224                                         compatible = "ti,omap4-hsi-port";
 225                                         reg = <0x3000 0x800>,
 226                                               <0x3800 0x800>;
 227                                         reg-names = "tx", "rx";
 228                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 229                                 };
 230                         };
 231                 };
 232
 233                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 234                         compatible = "ti,sysc";
 235                         status = "disabled";
 236                         #address-cells = <1>;
 237                         #size-cells = <1>;
 238                         ranges = <0x0 0x5e000 0x2000>;
 239                 };
 240
 241                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 242                         compatible = "ti,sysc-omap2", "ti,sysc";
 243                         reg = <0x62000 0x4>,
 244                               <0x62010 0x4>,
 245                               <0x62014 0x4>;
 246                         reg-names = "rev", "sysc", "syss";
 247                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 248                                          SYSC_OMAP2_ENAWAKEUP |
 249                                          SYSC_OMAP2_SOFTRESET |
 250                                          SYSC_OMAP2_AUTOIDLE)>;
 251                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 252                                         <SYSC_IDLE_NO>,
 253                                         <SYSC_IDLE_SMART>;
 254                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 255                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 256                         clock-names = "fck";
 257                         #address-cells = <1>;
 258                         #size-cells = <1>;
 259                         ranges = <0x0 0x62000 0x1000>;
 260
 261                         usbhstll: usbhstll@0 {
 262                                 compatible = "ti,usbhs-tll";
 263                                 reg = <0x0 0x1000>;
 264                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 265                         };
 266                 };
 267
 268                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 269                         compatible = "ti,sysc-omap4", "ti,sysc";
 270                         reg = <0x64000 0x4>,
 271                               <0x64010 0x4>,
 272                               <0x64014 0x4>;
 273                         reg-names = "rev", "sysc", "syss";
 274                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 275                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 276                                         <SYSC_IDLE_NO>,
 277                                         <SYSC_IDLE_SMART>,
 278                                         <SYSC_IDLE_SMART_WKUP>;
 279                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 280                                         <SYSC_IDLE_NO>,
 281                                         <SYSC_IDLE_SMART>,
 282                                         <SYSC_IDLE_SMART_WKUP>;
 283                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 284                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 285                         clock-names = "fck";
 286                         #address-cells = <1>;
 287                         #size-cells = <1>;
 288                         ranges = <0x0 0x64000 0x1000>;
 289
 290                         usbhshost: usbhshost@0 {
 291                                 compatible = "ti,usbhs-host";
 292                                 reg = <0x0 0x800>;
 293                                 #address-cells = <1>;
 294                                 #size-cells = <1>;
 295                                 ranges = <0 0 0x1000>;
 296                                 clocks = <&init_60m_fclk>,
 297                                          <&xclk60mhsp1_ck>,
 298                                          <&xclk60mhsp2_ck>;
 299                                 clock-names = "refclk_60m_int",
 300                                               "refclk_60m_ext_p1",
 301                                               "refclk_60m_ext_p2";
 302
 303                                 usbhsohci: ohci@800 {
 304                                         compatible = "ti,ohci-omap3";
 305                                         reg = <0x800 0x400>;
 306                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 307                                         remote-wakeup-connected;
 308                                 };
 309
 310                                 usbhsehci: ehci@c00 {
 311                                         compatible = "ti,ehci-omap";
 312                                         reg = <0xc00 0x400>;
 313                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 314                                 };
 315                         };
 316                 };
 317
 318                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 319                         compatible = "ti,sysc-omap2", "ti,sysc";
 320                         reg = <0x66000 0x4>,
 321                               <0x66010 0x4>,
 322                               <0x66014 0x4>;
 323                         reg-names = "rev", "sysc", "syss";
 324                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 325                                          SYSC_OMAP2_SOFTRESET |
 326                                          SYSC_OMAP2_AUTOIDLE)>;
 327                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 328                                         <SYSC_IDLE_NO>,
 329                                         <SYSC_IDLE_SMART>;
 330                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 331                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 332                         clock-names = "fck";
 333                         power-domains = <&prm_tesla>;
 334                         resets = <&prm_tesla 1>;
 335                         reset-names = "rstctrl";
 336                         #address-cells = <1>;
 337                         #size-cells = <1>;
 338                         ranges = <0x0 0x66000 0x1000>;
 339
 340                         mmu_dsp: mmu@0 {
 341                                 compatible = "ti,omap4-iommu";
 342                                 reg = <0x0 0x100>;
 343                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 344                                 #iommu-cells = <0>;
 345                         };
 346                 };
 347         };
 348
 349         segment@80000 {                                 /* 0x4a080000 */
 350                 compatible = "simple-bus";
 351                 #address-cells = <1>;
 352                 #size-cells = <1>;
 353                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 354                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 355                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 356                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 357                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 358                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 359                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 360                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 361                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 362                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 363                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 364                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 365                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 366                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 367                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 368                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 369                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 370                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 371                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 372                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 373                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 374                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 375
 376                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 377                         compatible = "ti,sysc";
 378                         status = "disabled";
 379                         #address-cells = <1>;
 380                         #size-cells = <1>;
 381                         ranges = <0x0 0x29000 0x1000>;
 382                 };
 383
 384                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 385                         compatible = "ti,sysc-omap2", "ti,sysc";
 386                         reg = <0x2b400 0x4>,
 387                               <0x2b404 0x4>,
 388                               <0x2b408 0x4>;
 389                         reg-names = "rev", "sysc", "syss";
 390                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 391                                          SYSC_OMAP2_SOFTRESET |
 392                                          SYSC_OMAP2_AUTOIDLE)>;
 393                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 394                                         <SYSC_IDLE_NO>,
 395                                         <SYSC_IDLE_SMART>;
 396                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 397                                         <SYSC_IDLE_NO>,
 398                                         <SYSC_IDLE_SMART>,
 399                                         <SYSC_IDLE_SMART_WKUP>;
 400                         ti,syss-mask = <1>;
 401                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 402                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 403                         clock-names = "fck";
 404                         #address-cells = <1>;
 405                         #size-cells = <1>;
 406                         ranges = <0x0 0x2b000 0x1000>;
 407
 408                         usb_otg_hs: usb_otg_hs@0 {
 409                                 compatible = "ti,omap4-musb";
 410                                 reg = <0x0 0x7ff>;
 411                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 412                                 interrupt-names = "mc", "dma";
 413                                 usb-phy = <&usb2_phy>;
 414                                 phys = <&usb2_phy>;
 415                                 phy-names = "usb2-phy";
 416                                 multipoint = <1>;
 417                                 num-eps = <16>;
 418                                 ram-bits = <12>;
 419                                 ctrl-module = <&omap_control_usbotg>;
 420                         };
 421                 };
 422
 423                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 424                         compatible = "ti,sysc-omap2", "ti,sysc";
 425                         reg = <0x2d000 0x4>,
 426                               <0x2d010 0x4>,
 427                               <0x2d014 0x4>;
 428                         reg-names = "rev", "sysc", "syss";
 429                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 430                                          SYSC_OMAP2_AUTOIDLE)>;
 431                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 432                                         <SYSC_IDLE_NO>,
 433                                         <SYSC_IDLE_SMART>;
 434                         ti,syss-mask = <1>;
 435                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 436                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 437                         clock-names = "fck";
 438                         #address-cells = <1>;
 439                         #size-cells = <1>;
 440                         ranges = <0x0 0x2d000 0x1000>;
 441
 442                         ocp2scp@0 {
 443                                 compatible = "ti,omap-ocp2scp";
 444                                 reg = <0x0 0x1f>;
 445                                 #address-cells = <1>;
 446                                 #size-cells = <1>;
 447                                 ranges = <0 0 0x1000>;
 448                                 usb2_phy: usb2phy@80 {
 449                                         compatible = "ti,omap-usb2";
 450                                         reg = <0x80 0x58>;
 451                                         ctrl-module = <&omap_control_usb2phy>;
 452                                         clocks = <&usb_phy_cm_clk32k>;
 453                                         clock-names = "wkupclk";
 454                                         #phy-cells = <0>;
 455                                 };
 456                         };
 457                 };
 458
 459                 /* d2d mdm */
 460                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 461                         compatible = "ti,sysc-omap2", "ti,sysc";
 462                         reg = <0x36000 0x4>,
 463                               <0x36010 0x4>,
 464                               <0x36014 0x4>;
 465                         reg-names = "rev", "sysc", "syss";
 466                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 467                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 468                                         <SYSC_IDLE_NO>,
 469                                         <SYSC_IDLE_SMART>,
 470                                         <SYSC_IDLE_SMART_WKUP>;
 471                         ti,syss-mask = <1>;
 472                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 473                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 474                         clock-names = "fck";
 475                         #address-cells = <1>;
 476                         #size-cells = <1>;
 477                         ranges = <0x0 0x36000 0x1000>;
 478                 };
 479
 480                 /* d2d mpu */
 481                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 482                         compatible = "ti,sysc-omap2", "ti,sysc";
 483                         reg = <0x4d000 0x4>,
 484                               <0x4d010 0x4>,
 485                               <0x4d014 0x4>;
 486                         reg-names = "rev", "sysc", "syss";
 487                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 488                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 489                                         <SYSC_IDLE_NO>,
 490                                         <SYSC_IDLE_SMART>,
 491                                         <SYSC_IDLE_SMART_WKUP>;
 492                         ti,syss-mask = <1>;
 493                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 494                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 495                         clock-names = "fck";
 496                         #address-cells = <1>;
 497                         #size-cells = <1>;
 498                         ranges = <0x0 0x4d000 0x1000>;
 499                 };
 500
 501                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 502                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 503                         reg = <0x59038 0x4>;
 504                         reg-names = "sysc";
 505                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 506                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 507                                         <SYSC_IDLE_NO>,
 508                                         <SYSC_IDLE_SMART>,
 509                                         <SYSC_IDLE_SMART_WKUP>;
 510                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 511                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 512                         clock-names = "fck";
 513                         #address-cells = <1>;
 514                         #size-cells = <1>;
 515                         ranges = <0x0 0x59000 0x1000>;
 516
 517                         smartreflex_mpu: smartreflex@0 {
 518                                 compatible = "ti,omap4-smartreflex-mpu";
 519                                 reg = <0x0 0x80>;
 520                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 521                         };
 522                 };
 523
 524                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 525                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 526                         reg = <0x5b038 0x4>;
 527                         reg-names = "sysc";
 528                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 529                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 530                                         <SYSC_IDLE_NO>,
 531                                         <SYSC_IDLE_SMART>,
 532                                         <SYSC_IDLE_SMART_WKUP>;
 533                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 534                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 535                         clock-names = "fck";
 536                         #address-cells = <1>;
 537                         #size-cells = <1>;
 538                         ranges = <0x0 0x5b000 0x1000>;
 539
 540                         smartreflex_iva: smartreflex@0 {
 541                                 compatible = "ti,omap4-smartreflex-iva";
 542                                 reg = <0x0 0x80>;
 543                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 544                         };
 545                 };
 546
 547                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 548                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 549                         reg = <0x5d038 0x4>;
 550                         reg-names = "sysc";
 551                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 552                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 553                                         <SYSC_IDLE_NO>,
 554                                         <SYSC_IDLE_SMART>,
 555                                         <SYSC_IDLE_SMART_WKUP>;
 556                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 557                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 558                         clock-names = "fck";
 559                         #address-cells = <1>;
 560                         #size-cells = <1>;
 561                         ranges = <0x0 0x5d000 0x1000>;
 562
 563                         smartreflex_core: smartreflex@0 {
 564                                 compatible = "ti,omap4-smartreflex-core";
 565                                 reg = <0x0 0x80>;
 566                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 567                         };
 568                 };
 569
 570                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 571                         compatible = "ti,sysc";
 572                         status = "disabled";
 573                         #address-cells = <1>;
 574                         #size-cells = <1>;
 575                         ranges = <0x0 0x60000 0x1000>;
 576                 };
 577
 578                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 579                         compatible = "ti,sysc-omap4", "ti,sysc";
 580                         reg = <0x74000 0x4>,
 581                               <0x74010 0x4>;
 582                         reg-names = "rev", "sysc";
 583                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 584                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 585                                         <SYSC_IDLE_NO>,
 586                                         <SYSC_IDLE_SMART>;
 587                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 588                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 589                         clock-names = "fck";
 590                         #address-cells = <1>;
 591                         #size-cells = <1>;
 592                         ranges = <0x0 0x74000 0x1000>;
 593
 594                         mailbox: mailbox@0 {
 595                                 compatible = "ti,omap4-mailbox";
 596                                 reg = <0x0 0x200>;
 597                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 598                                 #mbox-cells = <1>;
 599                                 ti,mbox-num-users = <3>;
 600                                 ti,mbox-num-fifos = <8>;
 601                                 mbox_ipu: mbox_ipu {
 602                                         ti,mbox-tx = <0 0 0>;
 603                                         ti,mbox-rx = <1 0 0>;
 604                                 };
 605                                 mbox_dsp: mbox_dsp {
 606                                         ti,mbox-tx = <3 0 0>;
 607                                         ti,mbox-rx = <2 0 0>;
 608                                 };
 609                         };
 610                 };
 611
 612                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 613                         compatible = "ti,sysc-omap2", "ti,sysc";
 614                         reg = <0x76000 0x4>,
 615                               <0x76010 0x4>,
 616                               <0x76014 0x4>;
 617                         reg-names = "rev", "sysc", "syss";
 618                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 619                                          SYSC_OMAP2_ENAWAKEUP |
 620                                          SYSC_OMAP2_SOFTRESET |
 621                                          SYSC_OMAP2_AUTOIDLE)>;
 622                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 623                                         <SYSC_IDLE_NO>,
 624                                         <SYSC_IDLE_SMART>;
 625                         ti,syss-mask = <1>;
 626                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 627                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 628                         clock-names = "fck";
 629                         #address-cells = <1>;
 630                         #size-cells = <1>;
 631                         ranges = <0x0 0x76000 0x1000>;
 632
 633                         hwspinlock: spinlock@0 {
 634                                 compatible = "ti,omap4-hwspinlock";
 635                                 reg = <0x0 0x1000>;
 636                                 #hwlock-cells = <1>;
 637                         };
 638                 };
 639         };
 640
 641         segment@100000 {                                        /* 0x4a100000 */
 642                 compatible = "simple-bus";
 643                 #address-cells = <1>;
 644                 #size-cells = <1>;
 645                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 646                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 647                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 648                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 649                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 650                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 651                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 652                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 653
 654                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 655                         compatible = "ti,sysc-omap4", "ti,sysc";
 656                         ti,hwmods = "ctrl_module_pad_core";
 657                         reg = <0x0 0x4>,
 658                               <0x10 0x4>;
 659                         reg-names = "rev", "sysc";
 660                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 661                                         <SYSC_IDLE_NO>,
 662                                         <SYSC_IDLE_SMART>,
 663                                         <SYSC_IDLE_SMART_WKUP>;
 664                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 665                         #address-cells = <1>;
 666                         #size-cells = <1>;
 667                         ranges = <0x0 0x0 0x1000>;
 668
 669                         omap4_pmx_core: pinmux@40 {
 670                                 compatible = "ti,omap4-padconf",
 671                                              "pinctrl-single";
 672                                 reg = <0x40 0x0196>;
 673                                 #address-cells = <1>;
 674                                 #size-cells = <0>;
 675                                 #pinctrl-cells = <1>;
 676                                 #interrupt-cells = <1>;
 677                                 interrupt-controller;
 678                                 pinctrl-single,register-width = <16>;
 679                                 pinctrl-single,function-mask = <0x7fff>;
 680                         };
 681
 682                         omap4_padconf_global: omap4_padconf_global@5a0 {
 683                                 compatible = "syscon",
 684                                              "simple-bus";
 685                                 reg = <0x5a0 0x170>;
 686                                 #address-cells = <1>;
 687                                 #size-cells = <1>;
 688                                 ranges = <0 0x5a0 0x170>;
 689
 690                                 pbias_regulator: pbias_regulator@60 {
 691                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 692                                         reg = <0x60 0x4>;
 693                                         syscon = <&omap4_padconf_global>;
 694                                         pbias_mmc_reg: pbias_mmc_omap4 {
 695                                                 regulator-name = "pbias_mmc_omap4";
 696                                                 regulator-min-microvolt = <1800000>;
 697                                                 regulator-max-microvolt = <3000000>;
 698                                         };
 699                                 };
 700                         };
 701                 };
 702
 703                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 704                         compatible = "ti,sysc";
 705                         status = "disabled";
 706                         #address-cells = <1>;
 707                         #size-cells = <1>;
 708                         ranges = <0x0 0x2000 0x1000>;
 709                 };
 710
 711                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 712                         compatible = "ti,sysc";
 713                         status = "disabled";
 714                         #address-cells = <1>;
 715                         #size-cells = <1>;
 716                         ranges = <0x0 0x8000 0x1000>;
 717                 };
 718
 719                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 720                         compatible = "ti,sysc-omap4", "ti,sysc";
 721                         reg = <0xa000 0x4>,
 722                               <0xa010 0x4>;
 723                         reg-names = "rev", "sysc";
 724                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 725                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 726                                         <SYSC_IDLE_NO>,
 727                                         <SYSC_IDLE_SMART>;
 728                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 729                                         <SYSC_IDLE_NO>,
 730                                         <SYSC_IDLE_SMART>;
 731                         ti,sysc-delay-us = <2>;
 732                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 733                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 734                         clock-names = "fck";
 735                         #address-cells = <1>;
 736                         #size-cells = <1>;
 737                         ranges = <0x0 0xa000 0x1000>;
 738
 739                         /* No child device binding or driver in mainline */
 740                 };
 741         };
 742
 743         segment@180000 {                                        /* 0x4a180000 */
 744                 compatible = "simple-bus";
 745                 #address-cells = <1>;
 746                 #size-cells = <1>;
 747         };
 748
 749         segment@200000 {                                        /* 0x4a200000 */
 750                 compatible = "simple-bus";
 751                 #address-cells = <1>;
 752                 #size-cells = <1>;
 753                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 754                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 755                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 756                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 757                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 758                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 759                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 760                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 761                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 762                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 763                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 764                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 765                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 766                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 767                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 768                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 769                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 770                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 771                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 772                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 773                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 774                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 775                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 776                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 777                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 778                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 779                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 780                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 781                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 782                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 783
 784                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 785                         compatible = "ti,sysc";
 786                         status = "disabled";
 787                         #address-cells = <1>;
 788                         #size-cells = <1>;
 789                         ranges = <0x0 0x4000 0x1000>;
 790                 };
 791
 792                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 793                         compatible = "ti,sysc";
 794                         status = "disabled";
 795                         #address-cells = <1>;
 796                         #size-cells = <1>;
 797                         ranges = <0x0 0x6000 0x1000>;
 798                 };
 799
 800                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 801                         compatible = "ti,sysc";
 802                         status = "disabled";
 803                         #address-cells = <1>;
 804                         #size-cells = <1>;
 805                         ranges = <0x0 0xa000 0x1000>;
 806                 };
 807
 808                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 809                         compatible = "ti,sysc";
 810                         status = "disabled";
 811                         #address-cells = <1>;
 812                         #size-cells = <1>;
 813                         ranges = <0x0 0xc000 0x1000>;
 814                 };
 815
 816                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 817                         compatible = "ti,sysc";
 818                         status = "disabled";
 819                         #address-cells = <1>;
 820                         #size-cells = <1>;
 821                         ranges = <0x0 0x10000 0x1000>;
 822                 };
 823
 824                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 825                         compatible = "ti,sysc";
 826                         status = "disabled";
 827                         #address-cells = <1>;
 828                         #size-cells = <1>;
 829                         ranges = <0x0 0x12000 0x1000>;
 830                 };
 831
 832                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 833                         compatible = "ti,sysc";
 834                         status = "disabled";
 835                         #address-cells = <1>;
 836                         #size-cells = <1>;
 837                         ranges = <0x0 0x14000 0x1000>;
 838                 };
 839
 840                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 841                         compatible = "ti,sysc";
 842                         status = "disabled";
 843                         #address-cells = <1>;
 844                         #size-cells = <1>;
 845                         ranges = <0x0 0x16000 0x1000>;
 846                 };
 847
 848                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 849                         compatible = "ti,sysc";
 850                         status = "disabled";
 851                         #address-cells = <1>;
 852                         #size-cells = <1>;
 853                         ranges = <0x0 0x18000 0x1000>;
 854                 };
 855
 856                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 857                         compatible = "ti,sysc";
 858                         status = "disabled";
 859                         #address-cells = <1>;
 860                         #size-cells = <1>;
 861                         ranges = <0x0 0x1c000 0x1000>;
 862                 };
 863
 864                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 865                         compatible = "ti,sysc";
 866                         status = "disabled";
 867                         #address-cells = <1>;
 868                         #size-cells = <1>;
 869                         ranges = <0x0 0x1e000 0x1000>;
 870                 };
 871
 872                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 873                         compatible = "ti,sysc";
 874                         status = "disabled";
 875                         #address-cells = <1>;
 876                         #size-cells = <1>;
 877                         ranges = <0x0 0x20000 0x1000>;
 878                 };
 879
 880                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 881                         compatible = "ti,sysc";
 882                         status = "disabled";
 883                         #address-cells = <1>;
 884                         #size-cells = <1>;
 885                         ranges = <0x0 0x26000 0x1000>;
 886                 };
 887
 888                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 889                         compatible = "ti,sysc";
 890                         status = "disabled";
 891                         #address-cells = <1>;
 892                         #size-cells = <1>;
 893                         ranges = <0x0 0x28000 0x1000>;
 894                 };
 895
 896                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 897                         compatible = "ti,sysc";
 898                         status = "disabled";
 899                         #address-cells = <1>;
 900                         #size-cells = <1>;
 901                         ranges = <0x0 0x2a000 0x1000>;
 902                 };
 903         };
 904
 905         segment@280000 {                                        /* 0x4a280000 */
 906                 compatible = "simple-bus";
 907                 #address-cells = <1>;
 908                 #size-cells = <1>;
 909         };
 910
 911         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 912                 compatible = "simple-bus";
 913                 #address-cells = <1>;
 914                 #size-cells = <1>;
 915                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 916                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 917                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 918                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 919                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 920                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 921                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 922                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 923                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 924                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 925                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 926
 927                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 928                         compatible = "ti,sysc";
 929                         status = "disabled";
 930                         #address-cells = <1>;
 931                         #size-cells = <1>;
 932                         ranges = <0x00000000 0x00000000 0x00020000>,
 933                                  <0x00020000 0x00020000 0x00004000>,
 934                                  <0x00024000 0x00024000 0x00002000>,
 935                                  <0x00026000 0x00026000 0x00001000>,
 936                                  <0x00027000 0x00027000 0x00001000>,
 937                                  <0x00028000 0x00028000 0x00001000>,
 938                                  <0x00029000 0x00029000 0x00001000>,
 939                                  <0x0002a000 0x0002a000 0x00002000>,
 940                                  <0x0002c000 0x0002c000 0x00004000>,
 941                                  <0x00030000 0x00030000 0x00010000>;
 942                 };
 943         };
 944 };
 945
 946 &l4_wkup {                                              /* 0x4a300000 */
 947         compatible = "ti,omap4-l4-wkup", "simple-bus";
 948         reg = <0x4a300000 0x800>,
 949               <0x4a300800 0x800>,
 950               <0x4a301000 0x1000>;
 951         reg-names = "ap", "la", "ia0";
 952         #address-cells = <1>;
 953         #size-cells = <1>;
 954         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 955                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 956                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 957
 958         segment@0 {                                     /* 0x4a300000 */
 959                 compatible = "simple-bus";
 960                 #address-cells = <1>;
 961                 #size-cells = <1>;
 962                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 963                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 964                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 965                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 966                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 967                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 968                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 969                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 970                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 971                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 972                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 973
 974                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 975                         compatible = "ti,sysc-omap2", "ti,sysc";
 976                         reg = <0x4000 0x4>,
 977                               <0x4004 0x4>;
 978                         reg-names = "rev", "sysc";
 979                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 980                                         <SYSC_IDLE_NO>;
 981                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 982                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 983                         clock-names = "fck";
 984                         #address-cells = <1>;
 985                         #size-cells = <1>;
 986                         ranges = <0x0 0x4000 0x1000>;
 987
 988                         counter32k: counter@0 {
 989                                 compatible = "ti,omap-counter32k";
 990                                 reg = <0x0 0x20>;
 991                         };
 992                 };
 993
 994                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
 995                         compatible = "ti,sysc-omap4", "ti,sysc";
 996                         reg = <0x6000 0x4>;
 997                         reg-names = "rev";
 998                         #address-cells = <1>;
 999                         #size-cells = <1>;
1000                         ranges = <0x0 0x6000 0x2000>;
1001
1002                         prm: prm@0 {
1003                                 compatible = "ti,omap4-prm", "simple-bus";
1004                                 reg = <0x0 0x2000>;
1005                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1006                                 #address-cells = <1>;
1007                                 #size-cells = <1>;
1008                                 ranges = <0 0 0x2000>;
1009
1010                                 prm_clocks: clocks {
1011                                         #address-cells = <1>;
1012                                         #size-cells = <0>;
1013                                 };
1014
1015                                 prm_clockdomains: clockdomains {
1016                                 };
1017                         };
1018                 };
1019
1020                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1021                         compatible = "ti,sysc-omap4", "ti,sysc";
1022                         reg = <0xa000 0x4>;
1023                         reg-names = "rev";
1024                         #address-cells = <1>;
1025                         #size-cells = <1>;
1026                         ranges = <0x0 0xa000 0x1000>;
1027
1028                         scrm: scrm@0 {
1029                                 compatible = "ti,omap4-scrm";
1030                                 reg = <0x0 0x2000>;
1031
1032                                 scrm_clocks: clocks {
1033                                         #address-cells = <1>;
1034                                         #size-cells = <0>;
1035                                 };
1036
1037                                 scrm_clockdomains: clockdomains {
1038                                 };
1039                         };
1040                 };
1041
1042                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1043                         compatible = "ti,sysc-omap4", "ti,sysc";
1044                         ti,hwmods = "ctrl_module_wkup";
1045                         reg = <0xc000 0x4>,
1046                               <0xc010 0x4>;
1047                         reg-names = "rev", "sysc";
1048                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1049                                         <SYSC_IDLE_NO>,
1050                                         <SYSC_IDLE_SMART>,
1051                                         <SYSC_IDLE_SMART_WKUP>;
1052                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1053                         #address-cells = <1>;
1054                         #size-cells = <1>;
1055                         ranges = <0x0 0xc000 0x1000>;
1056
1057                         omap4_scm_wkup: scm@c000 {
1058                                 compatible = "ti,omap4-scm-wkup";
1059                                 reg = <0xc000 0x1000>;
1060                         };
1061                 };
1062         };
1063
1064         segment@10000 {                                 /* 0x4a310000 */
1065                 compatible = "simple-bus";
1066                 #address-cells = <1>;
1067                 #size-cells = <1>;
1068                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1069                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1070                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1071                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1072                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1073                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1074                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1075                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1076                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1077                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1078
1079                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1080                         compatible = "ti,sysc-omap2", "ti,sysc";
1081                         reg = <0x0 0x4>,
1082                               <0x10 0x4>,
1083                               <0x114 0x4>;
1084                         reg-names = "rev", "sysc", "syss";
1085                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1086                                          SYSC_OMAP2_SOFTRESET |
1087                                          SYSC_OMAP2_AUTOIDLE)>;
1088                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1089                                         <SYSC_IDLE_NO>,
1090                                         <SYSC_IDLE_SMART>,
1091                                         <SYSC_IDLE_SMART_WKUP>;
1092                         ti,syss-mask = <1>;
1093                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1094                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1095                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1096                         clock-names = "fck", "dbclk";
1097                         #address-cells = <1>;
1098                         #size-cells = <1>;
1099                         ranges = <0x0 0x0 0x1000>;
1100
1101                         gpio1: gpio@0 {
1102                                 compatible = "ti,omap4-gpio";
1103                                 reg = <0x0 0x200>;
1104                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1105                                 ti,gpio-always-on;
1106                                 gpio-controller;
1107                                 #gpio-cells = <2>;
1108                                 interrupt-controller;
1109                                 #interrupt-cells = <2>;
1110                         };
1111                 };
1112
1113                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1114                         compatible = "ti,sysc-omap2", "ti,sysc";
1115                         reg = <0x4000 0x4>,
1116                               <0x4010 0x4>,
1117                               <0x4014 0x4>;
1118                         reg-names = "rev", "sysc", "syss";
1119                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1120                                          SYSC_OMAP2_SOFTRESET)>;
1121                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1122                                         <SYSC_IDLE_NO>,
1123                                         <SYSC_IDLE_SMART>,
1124                                         <SYSC_IDLE_SMART_WKUP>;
1125                         ti,syss-mask = <1>;
1126                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1127                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1128                         clock-names = "fck";
1129                         #address-cells = <1>;
1130                         #size-cells = <1>;
1131                         ranges = <0x0 0x4000 0x1000>;
1132
1133                         wdt2: wdt@0 {
1134                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1135                                 reg = <0x0 0x80>;
1136                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1137                         };
1138                 };
1139
1140                 timer1_target: target-module@8000 {     /* 0x4a318000, ap 9 1c.0 */
1141                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1142                         reg = <0x8000 0x4>,
1143                               <0x8010 0x4>,
1144                               <0x8014 0x4>;
1145                         reg-names = "rev", "sysc", "syss";
1146                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1147                                          SYSC_OMAP2_EMUFREE |
1148                                          SYSC_OMAP2_ENAWAKEUP |
1149                                          SYSC_OMAP2_SOFTRESET |
1150                                          SYSC_OMAP2_AUTOIDLE)>;
1151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1152                                         <SYSC_IDLE_NO>,
1153                                         <SYSC_IDLE_SMART>;
1154                         ti,syss-mask = <1>;
1155                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1156                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1157                         clock-names = "fck";
1158                         #address-cells = <1>;
1159                         #size-cells = <1>;
1160                         ranges = <0x0 0x8000 0x1000>;
1161
1162                         timer1: timer@0 {
1163                                 compatible = "ti,omap3430-timer";
1164                                 reg = <0x0 0x80>;
1165                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>,
1166                                          <&sys_clkin_ck>;
1167                                 clock-names = "fck", "timer_sys_ck";
1168                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1169                                 ti,timer-alwon;
1170                         };
1171                 };
1172
1173                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1174                         compatible = "ti,sysc-omap2", "ti,sysc";
1175                         reg = <0xc000 0x4>,
1176                               <0xc010 0x4>,
1177                               <0xc014 0x4>;
1178                         reg-names = "rev", "sysc", "syss";
1179                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1180                                          SYSC_OMAP2_EMUFREE |
1181                                          SYSC_OMAP2_ENAWAKEUP |
1182                                          SYSC_OMAP2_SOFTRESET |
1183                                          SYSC_OMAP2_AUTOIDLE)>;
1184                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1185                                         <SYSC_IDLE_NO>,
1186                                         <SYSC_IDLE_SMART>;
1187                         ti,syss-mask = <1>;
1188                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1189                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1190                         clock-names = "fck";
1191                         #address-cells = <1>;
1192                         #size-cells = <1>;
1193                         ranges = <0x0 0xc000 0x1000>;
1194
1195                         keypad: keypad@0 {
1196                                 compatible = "ti,omap4-keypad";
1197                                 reg = <0x0 0x80>;
1198                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1199                                 reg-names = "mpu";
1200                         };
1201                 };
1202
1203                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1204                         compatible = "ti,sysc-omap4", "ti,sysc";
1205                         ti,hwmods = "ctrl_module_pad_wkup";
1206                         reg = <0xe000 0x4>,
1207                               <0xe010 0x4>;
1208                         reg-names = "rev", "sysc";
1209                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1210                                         <SYSC_IDLE_NO>,
1211                                         <SYSC_IDLE_SMART>,
1212                                         <SYSC_IDLE_SMART_WKUP>;
1213                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1214                         #address-cells = <1>;
1215                         #size-cells = <1>;
1216                         ranges = <0x0 0xe000 0x1000>;
1217
1218                         omap4_pmx_wkup: pinmux@40 {
1219                                 compatible = "ti,omap4-padconf",
1220                                              "pinctrl-single";
1221                                 reg = <0x40 0x0038>;
1222                                 #address-cells = <1>;
1223                                 #size-cells = <0>;
1224                                 #pinctrl-cells = <1>;
1225                                 #interrupt-cells = <1>;
1226                                 interrupt-controller;
1227                                 pinctrl-single,register-width = <16>;
1228                                 pinctrl-single,function-mask = <0x7fff>;
1229                         };
1230                 };
1231         };
1232
1233         segment@20000 {                                 /* 0x4a320000 */
1234                 compatible = "simple-bus";
1235                 #address-cells = <1>;
1236                 #size-cells = <1>;
1237                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1238                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1239                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1240                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1241                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1242                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1243                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1244                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1245                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1246                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1247                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1248
1249                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1250                         compatible = "ti,sysc";
1251                         status = "disabled";
1252                         #address-cells = <1>;
1253                         #size-cells = <1>;
1254                         ranges = <0x0 0x0 0x1000>;
1255                 };
1256
1257                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1258                         compatible = "ti,sysc";
1259                         status = "disabled";
1260                         #address-cells = <1>;
1261                         #size-cells = <1>;
1262                         ranges = <0x0 0x2000 0x1000>;
1263                 };
1264
1265                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1266                         compatible = "ti,sysc";
1267                         status = "disabled";
1268                         #address-cells = <1>;
1269                         #size-cells = <1>;
1270                         ranges = <0x0 0x4000 0x1000>;
1271                 };
1272
1273                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1274                         compatible = "ti,sysc";
1275                         status = "disabled";
1276                         #address-cells = <1>;
1277                         #size-cells = <1>;
1278                         ranges = <0x00000000 0x00006000 0x00001000>,
1279                                  <0x00001000 0x00007000 0x00000400>,
1280                                  <0x00002000 0x00008000 0x00000800>,
1281                                  <0x00003000 0x00009000 0x00000400>;
1282                 };
1283         };
1284 };
1285
1286 &l4_per {                                               /* 0x48000000 */
1287         compatible = "ti,omap4-l4-per", "simple-bus";
1288         reg = <0x48000000 0x800>,
1289               <0x48000800 0x800>,
1290               <0x48001000 0x400>,
1291               <0x48001400 0x400>,
1292               <0x48001800 0x400>,
1293               <0x48001c00 0x400>;
1294         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1295         #address-cells = <1>;
1296         #size-cells = <1>;
1297         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1298                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1299
1300         segment@0 {                                     /* 0x48000000 */
1301                 compatible = "simple-bus";
1302                 #address-cells = <1>;
1303                 #size-cells = <1>;
1304                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1305                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1306                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1307                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1308                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1309                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1310                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1311                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1312                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1313                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1314                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1315                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1316                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1317                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1318                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1319                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1320                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1321                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1322                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1323                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1324                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1325                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1326                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1327                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1328                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1329                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1330                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1331                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1332                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1333                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1334                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1335                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1336                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1337                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1338                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1339                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1340                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1341                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1342                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1343                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1344                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1345                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1346                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1347                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1348                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1349                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1350                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1351                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1352                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1353                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1354                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1355                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1356                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1357                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1358                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1359                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1360                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1361                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1362                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1363                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1364                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1365                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1366                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1367                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1368                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1369                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1370                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1371                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1372                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1373                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1374                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1375                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1376                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1377                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1378                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1379                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1380                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1381                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1382                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1383                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1384                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1385                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1386                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1387
1388                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1389                         compatible = "ti,sysc-omap2", "ti,sysc";
1390                         reg = <0x20050 0x4>,
1391                               <0x20054 0x4>,
1392                               <0x20058 0x4>;
1393                         reg-names = "rev", "sysc", "syss";
1394                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1395                                          SYSC_OMAP2_SOFTRESET |
1396                                          SYSC_OMAP2_AUTOIDLE)>;
1397                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1398                                         <SYSC_IDLE_NO>,
1399                                         <SYSC_IDLE_SMART>,
1400                                         <SYSC_IDLE_SMART_WKUP>;
1401                         ti,syss-mask = <1>;
1402                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1403                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1404                         clock-names = "fck";
1405                         #address-cells = <1>;
1406                         #size-cells = <1>;
1407                         ranges = <0x0 0x20000 0x1000>;
1408
1409                         uart3: serial@0 {
1410                                 compatible = "ti,omap4-uart";
1411                                 reg = <0x0 0x100>;
1412                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1413                                 clock-frequency = <48000000>;
1414                         };
1415                 };
1416
1417                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1418                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1419                         reg = <0x32000 0x4>,
1420                               <0x32010 0x4>,
1421                               <0x32014 0x4>;
1422                         reg-names = "rev", "sysc", "syss";
1423                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1424                                          SYSC_OMAP2_EMUFREE |
1425                                          SYSC_OMAP2_ENAWAKEUP |
1426                                          SYSC_OMAP2_SOFTRESET |
1427                                          SYSC_OMAP2_AUTOIDLE)>;
1428                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1429                                         <SYSC_IDLE_NO>,
1430                                         <SYSC_IDLE_SMART>;
1431                         ti,syss-mask = <1>;
1432                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1433                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1434                         clock-names = "fck";
1435                         #address-cells = <1>;
1436                         #size-cells = <1>;
1437                         ranges = <0x0 0x32000 0x1000>;
1438
1439                         timer2: timer@0 {
1440                                 compatible = "ti,omap3430-timer";
1441                                 reg = <0x0 0x80>;
1442                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>,
1443                                          <&sys_clkin_ck>;
1444                                 clock-names = "fck", "timer_sys_ck";
1445                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1446                         };
1447                 };
1448
1449                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1450                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1451                         reg = <0x34000 0x4>,
1452                               <0x34010 0x4>;
1453                         reg-names = "rev", "sysc";
1454                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1455                                          SYSC_OMAP4_SOFTRESET)>;
1456                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1457                                         <SYSC_IDLE_NO>,
1458                                         <SYSC_IDLE_SMART>,
1459                                         <SYSC_IDLE_SMART_WKUP>;
1460                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1461                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1462                         clock-names = "fck";
1463                         #address-cells = <1>;
1464                         #size-cells = <1>;
1465                         ranges = <0x0 0x34000 0x1000>;
1466
1467                         timer3: timer@0 {
1468                                 compatible = "ti,omap4430-timer";
1469                                 reg = <0x0 0x80>;
1470                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>,
1471                                          <&sys_clkin_ck>;
1472                                 clock-names = "fck", "timer_sys_ck";
1473                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1474                         };
1475                 };
1476
1477                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1478                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1479                         reg = <0x36000 0x4>,
1480                               <0x36010 0x4>;
1481                         reg-names = "rev", "sysc";
1482                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1483                                          SYSC_OMAP4_SOFTRESET)>;
1484                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1485                                         <SYSC_IDLE_NO>,
1486                                         <SYSC_IDLE_SMART>,
1487                                         <SYSC_IDLE_SMART_WKUP>;
1488                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1489                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1490                         clock-names = "fck";
1491                         #address-cells = <1>;
1492                         #size-cells = <1>;
1493                         ranges = <0x0 0x36000 0x1000>;
1494
1495                         timer4: timer@0 {
1496                                 compatible = "ti,omap4430-timer";
1497                                 reg = <0x0 0x80>;
1498                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>,
1499                                          <&sys_clkin_ck>;
1500                                 clock-names = "fck", "timer_sys_ck";
1501                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1502                         };
1503                 };
1504
1505                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1506                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1507                         reg = <0x3e000 0x4>,
1508                               <0x3e010 0x4>;
1509                         reg-names = "rev", "sysc";
1510                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1511                                          SYSC_OMAP4_SOFTRESET)>;
1512                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1513                                         <SYSC_IDLE_NO>,
1514                                         <SYSC_IDLE_SMART>,
1515                                         <SYSC_IDLE_SMART_WKUP>;
1516                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1517                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1518                         clock-names = "fck";
1519                         #address-cells = <1>;
1520                         #size-cells = <1>;
1521                         ranges = <0x0 0x3e000 0x1000>;
1522
1523                         timer9: timer@0 {
1524                                 compatible = "ti,omap4430-timer";
1525                                 reg = <0x0 0x80>;
1526                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>,
1527                                          <&sys_clkin_ck>;
1528                                 clock-names = "fck", "timer_sys_ck";
1529                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1530                                 ti,timer-pwm;
1531                         };
1532                 };
1533
1534                 /* Unused DSS L4 access, see L3 instead */
1535                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1536                         compatible = "ti,sysc";
1537                         status = "disabled";
1538                         #address-cells = <1>;
1539                         #size-cells = <1>;
1540                         ranges = <0x0 0x40000 0x10000>;
1541                 };
1542
1543                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1544                         compatible = "ti,sysc-omap2", "ti,sysc";
1545                         reg = <0x55000 0x4>,
1546                               <0x55010 0x4>,
1547                               <0x55114 0x4>;
1548                         reg-names = "rev", "sysc", "syss";
1549                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1550                                          SYSC_OMAP2_SOFTRESET |
1551                                          SYSC_OMAP2_AUTOIDLE)>;
1552                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1553                                         <SYSC_IDLE_NO>,
1554                                         <SYSC_IDLE_SMART>,
1555                                         <SYSC_IDLE_SMART_WKUP>;
1556                         ti,syss-mask = <1>;
1557                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1558                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1559                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1560                         clock-names = "fck", "dbclk";
1561                         #address-cells = <1>;
1562                         #size-cells = <1>;
1563                         ranges = <0x0 0x55000 0x1000>;
1564
1565                         gpio2: gpio@0 {
1566                                 compatible = "ti,omap4-gpio";
1567                                 reg = <0x0 0x200>;
1568                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1569                                 gpio-controller;
1570                                 #gpio-cells = <2>;
1571                                 interrupt-controller;
1572                                 #interrupt-cells = <2>;
1573                         };
1574                 };
1575
1576                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1577                         compatible = "ti,sysc-omap2", "ti,sysc";
1578                         reg = <0x57000 0x4>,
1579                               <0x57010 0x4>,
1580                               <0x57114 0x4>;
1581                         reg-names = "rev", "sysc", "syss";
1582                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1583                                          SYSC_OMAP2_SOFTRESET |
1584                                          SYSC_OMAP2_AUTOIDLE)>;
1585                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1586                                         <SYSC_IDLE_NO>,
1587                                         <SYSC_IDLE_SMART>,
1588                                         <SYSC_IDLE_SMART_WKUP>;
1589                         ti,syss-mask = <1>;
1590                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1591                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1592                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1593                         clock-names = "fck", "dbclk";
1594                         #address-cells = <1>;
1595                         #size-cells = <1>;
1596                         ranges = <0x0 0x57000 0x1000>;
1597
1598                         gpio3: gpio@0 {
1599                                 compatible = "ti,omap4-gpio";
1600                                 reg = <0x0 0x200>;
1601                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1602                                 gpio-controller;
1603                                 #gpio-cells = <2>;
1604                                 interrupt-controller;
1605                                 #interrupt-cells = <2>;
1606                         };
1607                 };
1608
1609                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1610                         compatible = "ti,sysc-omap2", "ti,sysc";
1611                         reg = <0x59000 0x4>,
1612                               <0x59010 0x4>,
1613                               <0x59114 0x4>;
1614                         reg-names = "rev", "sysc", "syss";
1615                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1616                                          SYSC_OMAP2_SOFTRESET |
1617                                          SYSC_OMAP2_AUTOIDLE)>;
1618                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1619                                         <SYSC_IDLE_NO>,
1620                                         <SYSC_IDLE_SMART>,
1621                                         <SYSC_IDLE_SMART_WKUP>;
1622                         ti,syss-mask = <1>;
1623                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1624                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1625                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1626                         clock-names = "fck", "dbclk";
1627                         #address-cells = <1>;
1628                         #size-cells = <1>;
1629                         ranges = <0x0 0x59000 0x1000>;
1630
1631                         gpio4: gpio@0 {
1632                                 compatible = "ti,omap4-gpio";
1633                                 reg = <0x0 0x200>;
1634                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1635                                 gpio-controller;
1636                                 #gpio-cells = <2>;
1637                                 interrupt-controller;
1638                                 #interrupt-cells = <2>;
1639                         };
1640                 };
1641
1642                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1643                         compatible = "ti,sysc-omap2", "ti,sysc";
1644                         reg = <0x5b000 0x4>,
1645                               <0x5b010 0x4>,
1646                               <0x5b114 0x4>;
1647                         reg-names = "rev", "sysc", "syss";
1648                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1649                                          SYSC_OMAP2_SOFTRESET |
1650                                          SYSC_OMAP2_AUTOIDLE)>;
1651                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1652                                         <SYSC_IDLE_NO>,
1653                                         <SYSC_IDLE_SMART>,
1654                                         <SYSC_IDLE_SMART_WKUP>;
1655                         ti,syss-mask = <1>;
1656                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1657                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1658                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1659                         clock-names = "fck", "dbclk";
1660                         #address-cells = <1>;
1661                         #size-cells = <1>;
1662                         ranges = <0x0 0x5b000 0x1000>;
1663
1664                         gpio5: gpio@0 {
1665                                 compatible = "ti,omap4-gpio";
1666                                 reg = <0x0 0x200>;
1667                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1668                                 gpio-controller;
1669                                 #gpio-cells = <2>;
1670                                 interrupt-controller;
1671                                 #interrupt-cells = <2>;
1672                         };
1673                 };
1674
1675                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1676                         compatible = "ti,sysc-omap2", "ti,sysc";
1677                         reg = <0x5d000 0x4>,
1678                               <0x5d010 0x4>,
1679                               <0x5d114 0x4>;
1680                         reg-names = "rev", "sysc", "syss";
1681                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1682                                          SYSC_OMAP2_SOFTRESET |
1683                                          SYSC_OMAP2_AUTOIDLE)>;
1684                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1685                                         <SYSC_IDLE_NO>,
1686                                         <SYSC_IDLE_SMART>,
1687                                         <SYSC_IDLE_SMART_WKUP>;
1688                         ti,syss-mask = <1>;
1689                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1690                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1691                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1692                         clock-names = "fck", "dbclk";
1693                         #address-cells = <1>;
1694                         #size-cells = <1>;
1695                         ranges = <0x0 0x5d000 0x1000>;
1696
1697                         gpio6: gpio@0 {
1698                                 compatible = "ti,omap4-gpio";
1699                                 reg = <0x0 0x200>;
1700                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1701                                 gpio-controller;
1702                                 #gpio-cells = <2>;
1703                                 interrupt-controller;
1704                                 #interrupt-cells = <2>;
1705                         };
1706                 };
1707
1708                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1709                         compatible = "ti,sysc-omap2", "ti,sysc";
1710                         reg = <0x60000 0x8>,
1711                               <0x60010 0x8>,
1712                               <0x60090 0x8>;
1713                         reg-names = "rev", "sysc", "syss";
1714                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1715                                          SYSC_OMAP2_ENAWAKEUP |
1716                                          SYSC_OMAP2_SOFTRESET |
1717                                          SYSC_OMAP2_AUTOIDLE)>;
1718                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1719                                         <SYSC_IDLE_NO>,
1720                                         <SYSC_IDLE_SMART>,
1721                                         <SYSC_IDLE_SMART_WKUP>;
1722                         ti,syss-mask = <1>;
1723                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1724                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1725                         clock-names = "fck";
1726                         #address-cells = <1>;
1727                         #size-cells = <1>;
1728                         ranges = <0x0 0x60000 0x1000>;
1729
1730                         i2c3: i2c@0 {
1731                                 compatible = "ti,omap4-i2c";
1732                                 reg = <0x0 0x100>;
1733                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1734                                 #address-cells = <1>;
1735                                 #size-cells = <0>;
1736                         };
1737                 };
1738
1739                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1740                         compatible = "ti,sysc-omap2", "ti,sysc";
1741                         reg = <0x6a050 0x4>,
1742                               <0x6a054 0x4>,
1743                               <0x6a058 0x4>;
1744                         reg-names = "rev", "sysc", "syss";
1745                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1746                                          SYSC_OMAP2_SOFTRESET |
1747                                          SYSC_OMAP2_AUTOIDLE)>;
1748                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1749                                         <SYSC_IDLE_NO>,
1750                                         <SYSC_IDLE_SMART>,
1751                                         <SYSC_IDLE_SMART_WKUP>;
1752                         ti,syss-mask = <1>;
1753                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1754                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1755                         clock-names = "fck";
1756                         #address-cells = <1>;
1757                         #size-cells = <1>;
1758                         ranges = <0x0 0x6a000 0x1000>;
1759
1760                         uart1: serial@0 {
1761                                 compatible = "ti,omap4-uart";
1762                                 reg = <0x0 0x100>;
1763                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1764                                 clock-frequency = <48000000>;
1765                         };
1766                 };
1767
1768                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1769                         compatible = "ti,sysc-omap2", "ti,sysc";
1770                         reg = <0x6c050 0x4>,
1771                               <0x6c054 0x4>,
1772                               <0x6c058 0x4>;
1773                         reg-names = "rev", "sysc", "syss";
1774                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1775                                          SYSC_OMAP2_SOFTRESET |
1776                                          SYSC_OMAP2_AUTOIDLE)>;
1777                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1778                                         <SYSC_IDLE_NO>,
1779                                         <SYSC_IDLE_SMART>,
1780                                         <SYSC_IDLE_SMART_WKUP>;
1781                         ti,syss-mask = <1>;
1782                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1783                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1784                         clock-names = "fck";
1785                         #address-cells = <1>;
1786                         #size-cells = <1>;
1787                         ranges = <0x0 0x6c000 0x1000>;
1788
1789                         uart2: serial@0 {
1790                                 compatible = "ti,omap4-uart";
1791                                 reg = <0x0 0x100>;
1792                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1793                                 clock-frequency = <48000000>;
1794                         };
1795                 };
1796
1797                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1798                         compatible = "ti,sysc-omap2", "ti,sysc";
1799                         reg = <0x6e050 0x4>,
1800                               <0x6e054 0x4>,
1801                               <0x6e058 0x4>;
1802                         reg-names = "rev", "sysc", "syss";
1803                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1804                                          SYSC_OMAP2_SOFTRESET |
1805                                          SYSC_OMAP2_AUTOIDLE)>;
1806                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1807                                         <SYSC_IDLE_NO>,
1808                                         <SYSC_IDLE_SMART>,
1809                                         <SYSC_IDLE_SMART_WKUP>;
1810                         ti,syss-mask = <1>;
1811                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1812                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1813                         clock-names = "fck";
1814                         #address-cells = <1>;
1815                         #size-cells = <1>;
1816                         ranges = <0x0 0x6e000 0x1000>;
1817
1818                         uart4: serial@0 {
1819                                 compatible = "ti,omap4-uart";
1820                                 reg = <0x0 0x100>;
1821                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1822                                 clock-frequency = <48000000>;
1823                         };
1824                 };
1825
1826                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1827                         compatible = "ti,sysc-omap2", "ti,sysc";
1828                         reg = <0x70000 0x8>,
1829                               <0x70010 0x8>,
1830                               <0x70090 0x8>;
1831                         reg-names = "rev", "sysc", "syss";
1832                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1833                                          SYSC_OMAP2_ENAWAKEUP |
1834                                          SYSC_OMAP2_SOFTRESET |
1835                                          SYSC_OMAP2_AUTOIDLE)>;
1836                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1837                                         <SYSC_IDLE_NO>,
1838                                         <SYSC_IDLE_SMART>,
1839                                         <SYSC_IDLE_SMART_WKUP>;
1840                         ti,syss-mask = <1>;
1841                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1842                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1843                         clock-names = "fck";
1844                         #address-cells = <1>;
1845                         #size-cells = <1>;
1846                         ranges = <0x0 0x70000 0x1000>;
1847
1848                         i2c1: i2c@0 {
1849                                 compatible = "ti,omap4-i2c";
1850                                 reg = <0x0 0x100>;
1851                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1852                                 #address-cells = <1>;
1853                                 #size-cells = <0>;
1854                         };
1855                 };
1856
1857                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1858                         compatible = "ti,sysc-omap2", "ti,sysc";
1859                         reg = <0x72000 0x8>,
1860                               <0x72010 0x8>,
1861                               <0x72090 0x8>;
1862                         reg-names = "rev", "sysc", "syss";
1863                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1864                                          SYSC_OMAP2_ENAWAKEUP |
1865                                          SYSC_OMAP2_SOFTRESET |
1866                                          SYSC_OMAP2_AUTOIDLE)>;
1867                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1868                                         <SYSC_IDLE_NO>,
1869                                         <SYSC_IDLE_SMART>,
1870                                         <SYSC_IDLE_SMART_WKUP>;
1871                         ti,syss-mask = <1>;
1872                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1873                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1874                         clock-names = "fck";
1875                         #address-cells = <1>;
1876                         #size-cells = <1>;
1877                         ranges = <0x0 0x72000 0x1000>;
1878
1879                         i2c2: i2c@0 {
1880                                 compatible = "ti,omap4-i2c";
1881                                 reg = <0x0 0x100>;
1882                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1883                                 #address-cells = <1>;
1884                                 #size-cells = <0>;
1885                         };
1886                 };
1887
1888                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1889                         compatible = "ti,sysc-omap4", "ti,sysc";
1890                         reg = <0x76000 0x4>,
1891                               <0x76010 0x4>;
1892                         reg-names = "rev", "sysc";
1893                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1894                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1895                                         <SYSC_IDLE_NO>,
1896                                         <SYSC_IDLE_SMART>,
1897                                         <SYSC_IDLE_SMART_WKUP>;
1898                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1899                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1900                         clock-names = "fck";
1901                         #address-cells = <1>;
1902                         #size-cells = <1>;
1903                         ranges = <0x0 0x76000 0x1000>;
1904
1905                         /* No child device binding or driver in mainline */
1906                 };
1907
1908                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1909                         compatible = "ti,sysc-omap2", "ti,sysc";
1910                         reg = <0x78000 0x4>,
1911                               <0x78010 0x4>,
1912                               <0x78014 0x4>;
1913                         reg-names = "rev", "sysc", "syss";
1914                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1915                                          SYSC_OMAP2_SOFTRESET |
1916                                          SYSC_OMAP2_AUTOIDLE)>;
1917                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1918                                         <SYSC_IDLE_NO>,
1919                                         <SYSC_IDLE_SMART>;
1920                         ti,syss-mask = <1>;
1921                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1922                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1923                         clock-names = "fck";
1924                         #address-cells = <1>;
1925                         #size-cells = <1>;
1926                         ranges = <0x0 0x78000 0x1000>;
1927
1928                         elm: elm@0 {
1929                                 compatible = "ti,am3352-elm";
1930                                 reg = <0x0 0x2000>;
1931                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1932                                 status = "disabled";
1933                         };
1934                 };
1935
1936                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1937                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1938                         reg = <0x86000 0x4>,
1939                               <0x86010 0x4>,
1940                               <0x86014 0x4>;
1941                         reg-names = "rev", "sysc", "syss";
1942                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1943                                          SYSC_OMAP2_EMUFREE |
1944                                          SYSC_OMAP2_ENAWAKEUP |
1945                                          SYSC_OMAP2_SOFTRESET |
1946                                          SYSC_OMAP2_AUTOIDLE)>;
1947                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1948                                         <SYSC_IDLE_NO>,
1949                                         <SYSC_IDLE_SMART>;
1950                         ti,syss-mask = <1>;
1951                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1952                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1953                         clock-names = "fck";
1954                         #address-cells = <1>;
1955                         #size-cells = <1>;
1956                         ranges = <0x0 0x86000 0x1000>;
1957
1958                         timer10: timer@0 {
1959                                 compatible = "ti,omap3430-timer";
1960                                 reg = <0x0 0x80>;
1961                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>,
1962                                          <&sys_clkin_ck>;
1963                                 clock-names = "fck", "timer_sys_ck";
1964                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1965                                 ti,timer-pwm;
1966                         };
1967                 };
1968
1969                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1970                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1971                         reg = <0x88000 0x4>,
1972                               <0x88010 0x4>;
1973                         reg-names = "rev", "sysc";
1974                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1975                                          SYSC_OMAP4_SOFTRESET)>;
1976                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1977                                         <SYSC_IDLE_NO>,
1978                                         <SYSC_IDLE_SMART>,
1979                                         <SYSC_IDLE_SMART_WKUP>;
1980                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1981                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1982                         clock-names = "fck";
1983                         #address-cells = <1>;
1984                         #size-cells = <1>;
1985                         ranges = <0x0 0x88000 0x1000>;
1986
1987                         timer11: timer@0 {
1988                                 compatible = "ti,omap4430-timer";
1989                                 reg = <0x0 0x80>;
1990                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>,
1991                                          <&sys_clkin_ck>;
1992                                 clock-names = "fck", "timer_sys_ck";
1993                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1994                                 ti,timer-pwm;
1995                         };
1996                 };
1997
1998                 rng_target: target-module@90000 {       /* 0x48090000, ap 57 2a.0 */
1999                         compatible = "ti,sysc-omap2", "ti,sysc";
2000                         reg = <0x91fe0 0x4>,
2001                               <0x91fe4 0x4>;
2002                         reg-names = "rev", "sysc";
2003                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
2004                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2005                                         <SYSC_IDLE_NO>;
2006                         /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2007                         clocks = <&l4_secure_clkctrl OMAP4_RNG_CLKCTRL 0>;
2008                         clock-names = "fck";
2009                         #address-cells = <1>;
2010                         #size-cells = <1>;
2011                         ranges = <0x0 0x90000 0x2000>;
2012
2013                         rng: rng@0 {
2014                                 compatible = "ti,omap4-rng";
2015                                 reg = <0x0 0x2000>;
2016                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
2017                         };
2018                 };
2019
2020                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2021                         compatible = "ti,sysc-omap2", "ti,sysc";
2022                         reg = <0x9608c 0x4>;
2023                         reg-names = "sysc";
2024                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2025                                          SYSC_OMAP2_ENAWAKEUP |
2026                                          SYSC_OMAP2_SOFTRESET)>;
2027                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2028                                         <SYSC_IDLE_NO>,
2029                                         <SYSC_IDLE_SMART>;
2030                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2031                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2032                         clock-names = "fck";
2033                         #address-cells = <1>;
2034                         #size-cells = <1>;
2035                         ranges = <0x0 0x96000 0x1000>;
2036
2037                         mcbsp4: mcbsp@0 {
2038                                 compatible = "ti,omap4-mcbsp";
2039                                 reg = <0x0 0xff>; /* L4 Interconnect */
2040                                 reg-names = "mpu";
2041                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2042                                 interrupt-names = "common";
2043                                 ti,buffer-size = <128>;
2044                                 dmas = <&sdma 31>,
2045                                        <&sdma 32>;
2046                                 dma-names = "tx", "rx";
2047                                 status = "disabled";
2048                         };
2049                 };
2050
2051                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2052                         compatible = "ti,sysc-omap4", "ti,sysc";
2053                         reg = <0x98000 0x4>,
2054                               <0x98010 0x4>;
2055                         reg-names = "rev", "sysc";
2056                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2057                                          SYSC_OMAP4_SOFTRESET)>;
2058                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2059                                         <SYSC_IDLE_NO>,
2060                                         <SYSC_IDLE_SMART>,
2061                                         <SYSC_IDLE_SMART_WKUP>;
2062                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2063                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2064                         clock-names = "fck";
2065                         #address-cells = <1>;
2066                         #size-cells = <1>;
2067                         ranges = <0x0 0x98000 0x1000>;
2068
2069                         mcspi1: spi@0 {
2070                                 compatible = "ti,omap4-mcspi";
2071                                 reg = <0x0 0x200>;
2072                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2073                                 #address-cells = <1>;
2074                                 #size-cells = <0>;
2075                                 ti,spi-num-cs = <4>;
2076                                 dmas = <&sdma 35>,
2077                                        <&sdma 36>,
2078                                        <&sdma 37>,
2079                                        <&sdma 38>,
2080                                        <&sdma 39>,
2081                                        <&sdma 40>,
2082                                        <&sdma 41>,
2083                                        <&sdma 42>;
2084                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2085                                             "tx2", "rx2", "tx3", "rx3";
2086                         };
2087                 };
2088
2089                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2090                         compatible = "ti,sysc-omap4", "ti,sysc";
2091                         reg = <0x9a000 0x4>,
2092                               <0x9a010 0x4>;
2093                         reg-names = "rev", "sysc";
2094                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2095                                          SYSC_OMAP4_SOFTRESET)>;
2096                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2097                                         <SYSC_IDLE_NO>,
2098                                         <SYSC_IDLE_SMART>,
2099                                         <SYSC_IDLE_SMART_WKUP>;
2100                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2101                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2102                         clock-names = "fck";
2103                         #address-cells = <1>;
2104                         #size-cells = <1>;
2105                         ranges = <0x0 0x9a000 0x1000>;
2106
2107                         mcspi2: spi@0 {
2108                                 compatible = "ti,omap4-mcspi";
2109                                 reg = <0x0 0x200>;
2110                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2111                                 #address-cells = <1>;
2112                                 #size-cells = <0>;
2113                                 ti,spi-num-cs = <2>;
2114                                 dmas = <&sdma 43>,
2115                                        <&sdma 44>,
2116                                        <&sdma 45>,
2117                                        <&sdma 46>;
2118                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2119                         };
2120                 };
2121
2122                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2123                         compatible = "ti,sysc-omap4", "ti,sysc";
2124                         reg = <0x9c000 0x4>,
2125                               <0x9c010 0x4>;
2126                         reg-names = "rev", "sysc";
2127                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2128                                          SYSC_OMAP4_SOFTRESET)>;
2129                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2130                                         <SYSC_IDLE_NO>,
2131                                         <SYSC_IDLE_SMART>,
2132                                         <SYSC_IDLE_SMART_WKUP>;
2133                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2134                                         <SYSC_IDLE_NO>,
2135                                         <SYSC_IDLE_SMART>,
2136                                         <SYSC_IDLE_SMART_WKUP>;
2137                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2138                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2139                         clock-names = "fck";
2140                         #address-cells = <1>;
2141                         #size-cells = <1>;
2142                         ranges = <0x0 0x9c000 0x1000>;
2143
2144                         mmc1: mmc@0 {
2145                                 compatible = "ti,omap4-hsmmc";
2146                                 reg = <0x0 0x400>;
2147                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2148                                 ti,dual-volt;
2149                                 ti,needs-special-reset;
2150                                 dmas = <&sdma 61>, <&sdma 62>;
2151                                 dma-names = "tx", "rx";
2152                                 pbias-supply = <&pbias_mmc_reg>;
2153                         };
2154                 };
2155
2156                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2157                         compatible = "ti,sysc";
2158                         status = "disabled";
2159                         #address-cells = <1>;
2160                         #size-cells = <1>;
2161                         ranges = <0x0 0x9e000 0x1000>;
2162                 };
2163
2164                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2165                         compatible = "ti,sysc";
2166                         status = "disabled";
2167                         #address-cells = <1>;
2168                         #size-cells = <1>;
2169                         ranges = <0x0 0xa2000 0x1000>;
2170                 };
2171
2172                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2173                         compatible = "ti,sysc";
2174                         status = "disabled";
2175                         #address-cells = <1>;
2176                         #size-cells = <1>;
2177                         ranges = <0x00000000 0x000a4000 0x00001000>,
2178                                  <0x00001000 0x000a5000 0x00001000>;
2179                 };
2180
2181                 des_target: target-module@a5000 {       /* 0x480a5000 */
2182                         compatible = "ti,sysc-omap2", "ti,sysc";
2183                         reg = <0xa5030 0x4>,
2184                               <0xa5034 0x4>,
2185                               <0xa5038 0x4>;
2186                         reg-names = "rev", "sysc", "syss";
2187                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2188                                          SYSC_OMAP2_AUTOIDLE)>;
2189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2190                                         <SYSC_IDLE_NO>,
2191                                         <SYSC_IDLE_SMART>,
2192                                         <SYSC_IDLE_SMART_WKUP>;
2193                         ti,syss-mask = <1>;
2194                         /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2195                         clocks = <&l4_secure_clkctrl OMAP4_DES3DES_CLKCTRL 0>;
2196                         clock-names = "fck";
2197                         #address-cells = <1>;
2198                         #size-cells = <1>;
2199                         ranges = <0 0xa5000 0x00001000>;
2200
2201                         des: des@0 {
2202                                 compatible = "ti,omap4-des";
2203                                 reg = <0 0xa0>;
2204                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
2205                                 dmas = <&sdma 117>, <&sdma 116>;
2206                                 dma-names = "tx", "rx";
2207                         };
2208                 };
2209
2210                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2211                         compatible = "ti,sysc";
2212                         status = "disabled";
2213                         #address-cells = <1>;
2214                         #size-cells = <1>;
2215                         ranges = <0x0 0xa8000 0x4000>;
2216                 };
2217
2218                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2219                         compatible = "ti,sysc-omap4", "ti,sysc";
2220                         reg = <0xad000 0x4>,
2221                               <0xad010 0x4>;
2222                         reg-names = "rev", "sysc";
2223                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2224                                          SYSC_OMAP4_SOFTRESET)>;
2225                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2226                                         <SYSC_IDLE_NO>,
2227                                         <SYSC_IDLE_SMART>,
2228                                         <SYSC_IDLE_SMART_WKUP>;
2229                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2230                                         <SYSC_IDLE_NO>,
2231                                         <SYSC_IDLE_SMART>,
2232                                         <SYSC_IDLE_SMART_WKUP>;
2233                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2234                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2235                         clock-names = "fck";
2236                         #address-cells = <1>;
2237                         #size-cells = <1>;
2238                         ranges = <0x0 0xad000 0x1000>;
2239
2240                         mmc3: mmc@0 {
2241                                 compatible = "ti,omap4-hsmmc";
2242                                 reg = <0x0 0x400>;
2243                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2244                                 ti,needs-special-reset;
2245                                 dmas = <&sdma 77>, <&sdma 78>;
2246                                 dma-names = "tx", "rx";
2247                         };
2248                 };
2249
2250                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2251                         compatible = "ti,sysc";
2252                         status = "disabled";
2253                         #address-cells = <1>;
2254                         #size-cells = <1>;
2255                         ranges = <0x0 0xb0000 0x1000>;
2256                 };
2257
2258                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2259                         compatible = "ti,sysc-omap2", "ti,sysc";
2260                         reg = <0xb2000 0x4>,
2261                               <0xb2014 0x4>,
2262                               <0xb2018 0x4>;
2263                         reg-names = "rev", "sysc", "syss";
2264                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2265                                          SYSC_OMAP2_AUTOIDLE)>;
2266                         ti,syss-mask = <1>;
2267                         ti,no-reset-on-init;
2268                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2269                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2270                         clock-names = "fck";
2271                         #address-cells = <1>;
2272                         #size-cells = <1>;
2273                         ranges = <0x0 0xb2000 0x1000>;
2274
2275                         hdqw1w: 1w@0 {
2276                                 compatible = "ti,omap3-1w";
2277                                 reg = <0x0 0x1000>;
2278                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2279                         };
2280                 };
2281
2282                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2283                         compatible = "ti,sysc-omap4", "ti,sysc";
2284                         reg = <0xb4000 0x4>,
2285                               <0xb4010 0x4>;
2286                         reg-names = "rev", "sysc";
2287                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2288                                          SYSC_OMAP4_SOFTRESET)>;
2289                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2290                                         <SYSC_IDLE_NO>,
2291                                         <SYSC_IDLE_SMART>,
2292                                         <SYSC_IDLE_SMART_WKUP>;
2293                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2294                                         <SYSC_IDLE_NO>,
2295                                         <SYSC_IDLE_SMART>,
2296                                         <SYSC_IDLE_SMART_WKUP>;
2297                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2298                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2299                         clock-names = "fck";
2300                         #address-cells = <1>;
2301                         #size-cells = <1>;
2302                         ranges = <0x0 0xb4000 0x1000>;
2303
2304                         mmc2: mmc@0 {
2305                                 compatible = "ti,omap4-hsmmc";
2306                                 reg = <0x0 0x400>;
2307                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2308                                 ti,needs-special-reset;
2309                                 dmas = <&sdma 47>, <&sdma 48>;
2310                                 dma-names = "tx", "rx";
2311                         };
2312                 };
2313
2314                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2315                         compatible = "ti,sysc-omap4", "ti,sysc";
2316                         reg = <0xb8000 0x4>,
2317                               <0xb8010 0x4>;
2318                         reg-names = "rev", "sysc";
2319                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2320                                          SYSC_OMAP4_SOFTRESET)>;
2321                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2322                                         <SYSC_IDLE_NO>,
2323                                         <SYSC_IDLE_SMART>,
2324                                         <SYSC_IDLE_SMART_WKUP>;
2325                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2326                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2327                         clock-names = "fck";
2328                         #address-cells = <1>;
2329                         #size-cells = <1>;
2330                         ranges = <0x0 0xb8000 0x1000>;
2331
2332                         mcspi3: spi@0 {
2333                                 compatible = "ti,omap4-mcspi";
2334                                 reg = <0x0 0x200>;
2335                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2336                                 #address-cells = <1>;
2337                                 #size-cells = <0>;
2338                                 ti,spi-num-cs = <2>;
2339                                 dmas = <&sdma 15>, <&sdma 16>;
2340                                 dma-names = "tx0", "rx0";
2341                         };
2342                 };
2343
2344                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2345                         compatible = "ti,sysc-omap4", "ti,sysc";
2346                         reg = <0xba000 0x4>,
2347                               <0xba010 0x4>;
2348                         reg-names = "rev", "sysc";
2349                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2350                                          SYSC_OMAP4_SOFTRESET)>;
2351                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2352                                         <SYSC_IDLE_NO>,
2353                                         <SYSC_IDLE_SMART>,
2354                                         <SYSC_IDLE_SMART_WKUP>;
2355                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2356                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2357                         clock-names = "fck";
2358                         #address-cells = <1>;
2359                         #size-cells = <1>;
2360                         ranges = <0x0 0xba000 0x1000>;
2361
2362                         mcspi4: spi@0 {
2363                                 compatible = "ti,omap4-mcspi";
2364                                 reg = <0x0 0x200>;
2365                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2366                                 #address-cells = <1>;
2367                                 #size-cells = <0>;
2368                                 ti,spi-num-cs = <1>;
2369                                 dmas = <&sdma 70>, <&sdma 71>;
2370                                 dma-names = "tx0", "rx0";
2371                         };
2372                 };
2373
2374                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2375                         compatible = "ti,sysc-omap4", "ti,sysc";
2376                         reg = <0xd1000 0x4>,
2377                               <0xd1010 0x4>;
2378                         reg-names = "rev", "sysc";
2379                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2380                                          SYSC_OMAP4_SOFTRESET)>;
2381                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2382                                         <SYSC_IDLE_NO>,
2383                                         <SYSC_IDLE_SMART>,
2384                                         <SYSC_IDLE_SMART_WKUP>;
2385                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2386                                         <SYSC_IDLE_NO>,
2387                                         <SYSC_IDLE_SMART>,
2388                                         <SYSC_IDLE_SMART_WKUP>;
2389                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2390                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2391                         clock-names = "fck";
2392                         #address-cells = <1>;
2393                         #size-cells = <1>;
2394                         ranges = <0x0 0xd1000 0x1000>;
2395
2396                         mmc4: mmc@0 {
2397                                 compatible = "ti,omap4-hsmmc";
2398                                 reg = <0x0 0x400>;
2399                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2400                                 ti,needs-special-reset;
2401                                 dmas = <&sdma 57>, <&sdma 58>;
2402                                 dma-names = "tx", "rx";
2403                         };
2404                 };
2405
2406                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2407                         compatible = "ti,sysc-omap4", "ti,sysc";
2408                         reg = <0xd5000 0x4>,
2409                               <0xd5010 0x4>;
2410                         reg-names = "rev", "sysc";
2411                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2412                                          SYSC_OMAP4_SOFTRESET)>;
2413                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2414                                         <SYSC_IDLE_NO>,
2415                                         <SYSC_IDLE_SMART>,
2416                                         <SYSC_IDLE_SMART_WKUP>;
2417                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2418                                         <SYSC_IDLE_NO>,
2419                                         <SYSC_IDLE_SMART>,
2420                                         <SYSC_IDLE_SMART_WKUP>;
2421                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2422                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2423                         clock-names = "fck";
2424                         #address-cells = <1>;
2425                         #size-cells = <1>;
2426                         ranges = <0x0 0xd5000 0x1000>;
2427
2428                         mmc5: mmc@0 {
2429                                 compatible = "ti,omap4-hsmmc";
2430                                 reg = <0x0 0x400>;
2431                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2432                                 ti,needs-special-reset;
2433                                 dmas = <&sdma 59>, <&sdma 60>;
2434                                 dma-names = "tx", "rx";
2435                         };
2436                 };
2437         };
2438
2439         segment@200000 {                                        /* 0x48200000 */
2440                 compatible = "simple-bus";
2441                 #address-cells = <1>;
2442                 #size-cells = <1>;
2443                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2444                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2445
2446                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2447                         compatible = "ti,sysc-omap2", "ti,sysc";
2448                         reg = <0x150000 0x8>,
2449                               <0x150010 0x8>,
2450                               <0x150090 0x8>;
2451                         reg-names = "rev", "sysc", "syss";
2452                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2453                                          SYSC_OMAP2_ENAWAKEUP |
2454                                          SYSC_OMAP2_SOFTRESET |
2455                                          SYSC_OMAP2_AUTOIDLE)>;
2456                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2457                                         <SYSC_IDLE_NO>,
2458                                         <SYSC_IDLE_SMART>,
2459                                         <SYSC_IDLE_SMART_WKUP>;
2460                         ti,syss-mask = <1>;
2461                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2462                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2463                         clock-names = "fck";
2464                         #address-cells = <1>;
2465                         #size-cells = <1>;
2466                         ranges = <0x0 0x150000 0x1000>;
2467
2468                         i2c4: i2c@0 {
2469                                 compatible = "ti,omap4-i2c";
2470                                 reg = <0x0 0x100>;
2471                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2472                                 #address-cells = <1>;
2473                                 #size-cells = <0>;
2474                         };
2475                 };
2476         };
2477 };
2478