arch/arm/boot/dts/omap2.dtsi

   1 /*
   2  * Device Tree Source for OMAP2 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/pinctrl/omap.h>
  15
  16 / {
  17         compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 i2c0 = &i2c1;
  28                 i2c1 = &i2c2;
  29         };
  30
  31         cpus {
  32                 #address-cells = <0>;
  33                 #size-cells = <0>;
  34
  35                 cpu {
  36                         compatible = "arm,arm1136jf-s";
  37                         device_type = "cpu";
  38                 };
  39         };
  40
  41         pmu {
  42                 compatible = "arm,arm1136-pmu";
  43                 interrupts = <3>;
  44         };
  45
  46         soc {
  47                 compatible = "ti,omap-infra";
  48                 mpu {
  49                         compatible = "ti,omap2-mpu";
  50                         ti,hwmods = "mpu";
  51                 };
  52         };
  53
  54         ocp {
  55                 compatible = "simple-bus";
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58                 ranges;
  59                 ti,hwmods = "l3_main";
  60
  61                 aes: aes@480a6000 {
  62                         compatible = "ti,omap2-aes";
  63                         ti,hwmods = "aes";
  64                         reg = <0x480a6000 0x50>;
  65                         dmas = <&sdma 9 &sdma 10>;
  66                         dma-names = "tx", "rx";
  67                 };
  68
  69                 hdq1w: 1w@480b2000 {
  70                         compatible = "ti,omap2420-1w";
  71                         ti,hwmods = "hdq1w";
  72                         reg = <0x480b2000 0x1000>;
  73                         interrupts = <58>;
  74                 };
  75
  76                 intc: interrupt-controller@1 {
  77                         compatible = "ti,omap2-intc";
  78                         interrupt-controller;
  79                         #interrupt-cells = <1>;
  80                         reg = <0x480FE000 0x1000>;
  81                 };
  82
  83                 target-module@48056000 {
  84                         compatible = "ti,sysc-omap2", "ti,sysc";
  85                         reg = <0x48056000 0x4>,
  86                               <0x4805602c 0x4>,
  87                               <0x48056028 0x4>;
  88                         reg-names = "rev", "sysc", "syss";
  89                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
  90                                          SYSC_OMAP2_EMUFREE |
  91                                          SYSC_OMAP2_SOFTRESET |
  92                                          SYSC_OMAP2_AUTOIDLE)>;
  93                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
  94                                         <SYSC_IDLE_NO>,
  95                                         <SYSC_IDLE_SMART>;
  96                         ti,syss-mask = <1>;
  97                         clocks = <&core_l3_ck>;
  98                         clock-names = "fck";
  99                         #address-cells = <1>;
 100                         #size-cells = <1>;
 101                         ranges = <0 0x48056000 0x1000>;
 102
 103                         sdma: dma-controller@0 {
 104                                 compatible = "ti,omap2420-sdma", "ti,omap-sdma";
 105                                 reg = <0 0x1000>;
 106                                 interrupts = <12>,
 107                                              <13>,
 108                                              <14>,
 109                                              <15>;
 110                                 #dma-cells = <1>;
 111                                 dma-channels = <32>;
 112                                 dma-requests = <64>;
 113                         };
 114                 };
 115
 116                 i2c1: i2c@48070000 {
 117                         compatible = "ti,omap2-i2c";
 118                         ti,hwmods = "i2c1";
 119                         reg = <0x48070000 0x80>;
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122                         interrupts = <56>;
 123                 };
 124
 125                 i2c2: i2c@48072000 {
 126                         compatible = "ti,omap2-i2c";
 127                         ti,hwmods = "i2c2";
 128                         reg = <0x48072000 0x80>;
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         interrupts = <57>;
 132                 };
 133
 134                 mcspi1: spi@48098000 {
 135                         compatible = "ti,omap2-mcspi";
 136                         ti,hwmods = "mcspi1";
 137                         reg = <0x48098000 0x100>;
 138                         interrupts = <65>;
 139                         dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
 140                                 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
 141                         dma-names = "tx0", "rx0", "tx1", "rx1",
 142                                     "tx2", "rx2", "tx3", "rx3";
 143                 };
 144
 145                 mcspi2: spi@4809a000 {
 146                         compatible = "ti,omap2-mcspi";
 147                         ti,hwmods = "mcspi2";
 148                         reg = <0x4809a000 0x100>;
 149                         interrupts = <66>;
 150                         dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
 151                         dma-names = "tx0", "rx0", "tx1", "rx1";
 152                 };
 153
 154                 rng: rng@480a0000 {
 155                         compatible = "ti,omap2-rng";
 156                         ti,hwmods = "rng";
 157                         reg = <0x480a0000 0x50>;
 158                         interrupts = <52>;
 159                 };
 160
 161                 sham: sham@480a4000 {
 162                         compatible = "ti,omap2-sham";
 163                         ti,hwmods = "sham";
 164                         reg = <0x480a4000 0x64>;
 165                         interrupts = <51>;
 166                         dmas = <&sdma 13>;
 167                         dma-names = "rx";
 168                 };
 169
 170                 uart1: serial@4806a000 {
 171                         compatible = "ti,omap2-uart";
 172                         ti,hwmods = "uart1";
 173                         reg = <0x4806a000 0x2000>;
 174                         interrupts = <72>;
 175                         dmas = <&sdma 49 &sdma 50>;
 176                         dma-names = "tx", "rx";
 177                         clock-frequency = <48000000>;
 178                 };
 179
 180                 uart2: serial@4806c000 {
 181                         compatible = "ti,omap2-uart";
 182                         ti,hwmods = "uart2";
 183                         reg = <0x4806c000 0x400>;
 184                         interrupts = <73>;
 185                         dmas = <&sdma 51 &sdma 52>;
 186                         dma-names = "tx", "rx";
 187                         clock-frequency = <48000000>;
 188                 };
 189
 190                 uart3: serial@4806e000 {
 191                         compatible = "ti,omap2-uart";
 192                         ti,hwmods = "uart3";
 193                         reg = <0x4806e000 0x400>;
 194                         interrupts = <74>;
 195                         dmas = <&sdma 53 &sdma 54>;
 196                         dma-names = "tx", "rx";
 197                         clock-frequency = <48000000>;
 198                 };
 199
 200                 timer2_target: target-module@4802a000 {
 201                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 202                         reg = <0x4802a000 0x4>,
 203                               <0x4802a010 0x4>,
 204                               <0x4802a014 0x4>;
 205                         reg-names = "rev", "sysc", "syss";
 206                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 207                                          SYSC_OMAP2_EMUFREE |
 208                                          SYSC_OMAP2_ENAWAKEUP |
 209                                          SYSC_OMAP2_SOFTRESET |
 210                                          SYSC_OMAP2_AUTOIDLE)>;
 211                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 212                                         <SYSC_IDLE_NO>,
 213                                         <SYSC_IDLE_SMART>;
 214                         ti,syss-mask = <1>;
 215                         clocks = <&gpt2_fck>, <&gpt2_ick>;
 216                         clock-names = "fck", "ick";
 217                         #address-cells = <1>;
 218                         #size-cells = <1>;
 219                         ranges = <0x0 0x4802a000 0x1000>;
 220
 221                         timer2: timer@0 {
 222                                 compatible = "ti,omap2420-timer";
 223                                 reg = <0 0x400>;
 224                                 interrupts = <38>;
 225                         };
 226                 };
 227
 228                 timer3: timer@48078000 {
 229                         compatible = "ti,omap2420-timer";
 230                         reg = <0x48078000 0x400>;
 231                         interrupts = <39>;
 232                         ti,hwmods = "timer3";
 233                 };
 234
 235                 timer4: timer@4807a000 {
 236                         compatible = "ti,omap2420-timer";
 237                         reg = <0x4807a000 0x400>;
 238                         interrupts = <40>;
 239                         ti,hwmods = "timer4";
 240                 };
 241
 242                 timer5: timer@4807c000 {
 243                         compatible = "ti,omap2420-timer";
 244                         reg = <0x4807c000 0x400>;
 245                         interrupts = <41>;
 246                         ti,hwmods = "timer5";
 247                         ti,timer-dsp;
 248                 };
 249
 250                 timer6: timer@4807e000 {
 251                         compatible = "ti,omap2420-timer";
 252                         reg = <0x4807e000 0x400>;
 253                         interrupts = <42>;
 254                         ti,hwmods = "timer6";
 255                         ti,timer-dsp;
 256                 };
 257
 258                 timer7: timer@48080000 {
 259                         compatible = "ti,omap2420-timer";
 260                         reg = <0x48080000 0x400>;
 261                         interrupts = <43>;
 262                         ti,hwmods = "timer7";
 263                         ti,timer-dsp;
 264                 };
 265
 266                 timer8: timer@48082000 {
 267                         compatible = "ti,omap2420-timer";
 268                         reg = <0x48082000 0x400>;
 269                         interrupts = <44>;
 270                         ti,hwmods = "timer8";
 271                         ti,timer-dsp;
 272                 };
 273
 274                 timer9: timer@48084000 {
 275                         compatible = "ti,omap2420-timer";
 276                         reg = <0x48084000 0x400>;
 277                         interrupts = <45>;
 278                         ti,hwmods = "timer9";
 279                         ti,timer-pwm;
 280                 };
 281
 282                 timer10: timer@48086000 {
 283                         compatible = "ti,omap2420-timer";
 284                         reg = <0x48086000 0x400>;
 285                         interrupts = <46>;
 286                         ti,hwmods = "timer10";
 287                         ti,timer-pwm;
 288                 };
 289
 290                 timer11: timer@48088000 {
 291                         compatible = "ti,omap2420-timer";
 292                         reg = <0x48088000 0x400>;
 293                         interrupts = <47>;
 294                         ti,hwmods = "timer11";
 295                         ti,timer-pwm;
 296                 };
 297
 298                 timer12: timer@4808a000 {
 299                         compatible = "ti,omap2420-timer";
 300                         reg = <0x4808a000 0x400>;
 301                         interrupts = <48>;
 302                         ti,hwmods = "timer12";
 303                         ti,timer-pwm;
 304                 };
 305
 306                 dss: dss@48050000 {
 307                         compatible = "ti,omap2-dss";
 308                         reg = <0x48050000 0x400>;
 309                         status = "disabled";
 310                         ti,hwmods = "dss_core";
 311                         #address-cells = <1>;
 312                         #size-cells = <1>;
 313                         ranges;
 314
 315                         dispc@48050400 {
 316                                 compatible = "ti,omap2-dispc";
 317                                 reg = <0x48050400 0x400>;
 318                                 interrupts = <25>;
 319                                 ti,hwmods = "dss_dispc";
 320                         };
 321
 322                         rfbi: encoder@48050800 {
 323                                 compatible = "ti,omap2-rfbi";
 324                                 reg = <0x48050800 0x400>;
 325                                 status = "disabled";
 326                                 ti,hwmods = "dss_rfbi";
 327                         };
 328
 329                         venc: encoder@48050c00 {
 330                                 compatible = "ti,omap2-venc";
 331                                 reg = <0x48050c00 0x400>;
 332                                 status = "disabled";
 333                                 ti,hwmods = "dss_venc";
 334                         };
 335                 };
 336         };
 337 };