arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Device Tree file for Linksys NSLU2
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "intel-ixp42x.dtsi"
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)";
  13         compatible = "linksys,nslu2", "intel,ixp42x";
  14         #address-cells = <1>;
  15         #size-cells = <1>;
  16
  17         memory@0 {
  18                 /* 32 MB SDRAM */
  19                 device_type = "memory";
  20                 reg = <0x00000000 0x2000000>;
  21         };
  22
  23         chosen {
  24                 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
  25                 stdout-path = "uart0:115200n8";
  26         };
  27
  28         aliases {
  29                 serial0 = &uart0;
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34                 led-status {
  35                         label = "nslu2:red:status";
  36                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  37                         default-state = "on";
  38                         linux,default-trigger = "heartbeat";
  39                 };
  40                 led-ready {
  41                         label = "nslu2:green:ready";
  42                         gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  43                         default-state = "on";
  44                 };
  45                 led-disk-1 {
  46                         label = "nslu2:green:disk-1";
  47                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  48                         default-state = "off";
  49                 };
  50                 led-disk-2 {
  51                         label = "nslu2:green:disk-2";
  52                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  53                         default-state = "off";
  54                 };
  55         };
  56
  57         gpio_keys {
  58                 compatible = "gpio-keys";
  59
  60                 button-power {
  61                         wakeup-source;
  62                         linux,code = <KEY_POWER>;
  63                         label = "power";
  64                         gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
  65                 };
  66                 button-reset {
  67                         wakeup-source;
  68                         linux,code = <KEY_ESC>;
  69                         label = "reset";
  70                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  71                 };
  72         };
  73
  74         i2c {
  75                 compatible = "i2c-gpio";
  76                 sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  77                 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  78                 #address-cells = <1>;
  79                 #size-cells = <0>;
  80
  81                 rtc@6f {
  82                         compatible = "xicor,x1205";
  83                         reg = <0x6f>;
  84                 };
  85         };
  86
  87         gpio-poweroff {
  88                 compatible = "gpio-poweroff";
  89                 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  90                 timeout-ms = <5000>;
  91         };
  92
  93         gpio-beeper {
  94                 compatible = "gpio-beeper";
  95                 gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  96         };
  97
  98         soc {
  99                 bus@c4000000 {
 100                         /* The first 16MB region at CS0 on the expansion bus */
 101                         flash@0,0 {
 102                                 compatible = "intel,ixp4xx-flash", "cfi-flash";
 103                                 bank-width = <2>;
 104                                 /*
 105                                  * 8 MB of Flash in 0x20000 byte blocks
 106                                  * mapped in at CS0.
 107                                  */
 108                                 reg = <0 0x00000000 0x800000>;
 109
 110                                 partitions {
 111                                         compatible = "redboot-fis";
 112                                         /* Eraseblock at 0x7e0000 */
 113                                         fis-index-block = <0x3f>;
 114                                 };
 115                         };
 116                 };
 117
 118                 pci@c0000000 {
 119                         status = "ok";
 120
 121                         /*
 122                          * Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant
 123                          * We have slots (IDSEL) 1, 2 and 3.
 124                          */
 125                         interrupt-map =
 126                         /* IDSEL 1 */
 127                         <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
 128                         <0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 10 */
 129                         <0x0800 0 0 3 &gpio0 9  IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 9 */
 130                         <0x0800 0 0 4 &gpio0 8  IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
 131                         /* IDSEL 2 */
 132                         <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
 133                         <0x1000 0 0 2 &gpio0 9  IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
 134                         <0x1000 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 11 */
 135                         <0x1000 0 0 4 &gpio0 8  IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 2 is irq 8 */
 136                         /* IDSEL 3 */
 137                         <0x1800 0 0 1 &gpio0 9  IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */
 138                         <0x1800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 11 */
 139                         <0x1800 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 3 is irq 10 */
 140                         <0x1800 0 0 4 &gpio0 8  IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 3 is irq 8 */
 141                 };
 142
 143                 ethernet@c8009000 {
 144                         status = "ok";
 145                         queue-rx = <&qmgr 3>;
 146                         queue-txready = <&qmgr 20>;
 147                         phy-mode = "rgmii";
 148                         phy-handle = <&phy1>;
 149
 150                         mdio {
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153
 154                                 phy1: ethernet-phy@1 {
 155                                         reg = <1>;
 156                                 };
 157                         };
 158                 };
 159         };
 160 };