arch/arm/boot/dts/intel-ixp42x-freecom-fsg-3.dts

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Device Tree file for the Freecom FSG-3 router.
   4  * This machine is based on IXP425.
   5  * This device tree is inspired by the board file by Rod Whitby.
   6  */
   7
   8 /dts-v1/;
   9
  10 #include "intel-ixp42x.dtsi"
  11 #include <dt-bindings/input/input.h>
  12
  13 / {
  14         model = "Freecom FSG-3";
  15         compatible = "freecom,fsg-3", "intel,ixp42x";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         memory@0 {
  20                 /* 64 MB memory */
  21                 device_type = "memory";
  22                 reg = <0x00000000 0x4000000>;
  23         };
  24
  25         chosen {
  26                 /* Boot from the first partition on the hard drive */
  27                 bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootfstype=ext4 rootwait";
  28                 stdout-path = "uart0:115200n8";
  29         };
  30
  31         aliases {
  32                 serial0 = &uart0;
  33         };
  34
  35         gpio_keys {
  36                 compatible = "gpio-keys";
  37
  38                 button-sync {
  39                         wakeup-source;
  40                         /* Closest approximation of what the key should do */
  41                         linux,code = <KEY_CONNECT>;
  42                         label = "sync";
  43                         gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  44                 };
  45                 button-reset {
  46                         wakeup-source;
  47                         linux,code = <KEY_ESC>;
  48                         label = "reset";
  49                         gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  50                 };
  51                 button-usb {
  52                         wakeup-source;
  53                         /* Unplug USB, closest approximation of what the key should do */
  54                         linux,code = <KEY_EJECTCD>;
  55                         label = "usb";
  56                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  57                 };
  58         };
  59
  60         i2c {
  61                 compatible = "i2c-gpio";
  62                 sda-gpios = <&gpio0 12 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  63                 scl-gpios = <&gpio0 13 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66
  67                 hwmon@28 {
  68                         /*
  69                          * Temperature sensor and fan control chip.
  70                          *
  71                          * TODO: create a proper device tree binding for
  72                          * the sensor and temperature zone and create a
  73                          * zone with fan control.
  74                          */
  75                         compatible = "winbond,w83781d";
  76                         reg = <0x28>;
  77                 };
  78                 rtc@6f {
  79                         compatible = "isil,isl1208";
  80                         reg = <0x6f>;
  81                 };
  82         };
  83
  84         soc {
  85                 bus@c4000000 {
  86                         flash@0,0 {
  87                                 compatible = "intel,ixp4xx-flash", "cfi-flash";
  88                                 bank-width = <2>;
  89                                 /* Enable writes on the expansion bus */
  90                                 intel,ixp4xx-eb-write-enable = <1>;
  91                                 /* 4 MB of Flash mapped in at CS0 */
  92                                 reg = <0 0x00000000 0x400000>;
  93
  94                                 partitions {
  95                                         compatible = "redboot-fis";
  96                                         /* Eraseblock at 0x3e0000 */
  97                                         fis-index-block = <0x1f>;
  98                                 };
  99                         };
 100                 };
 101
 102                 pci@c0000000 {
 103                         status = "ok";
 104
 105                         /*
 106                          * Written based on the FSG-3 PCI boardfile.
 107                          * We have slots 12, 13 & 14 (IDSEL) with one IRQ each.
 108                          */
 109                         interrupt-map =
 110                         /* IDSEL 12 */
 111                         <0x6000 0 0 1 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 12 is irq 5 */
 112                         <0x6000 0 0 2 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 12 is irq 5 */
 113                         <0x6000 0 0 3 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 12 is irq 5 */
 114                         <0x6000 0 0 4 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 12 is irq 5 */
 115                         /* IDSEL 13 */
 116                         <0x6800 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 13 is irq 7 */
 117                         <0x6800 0 0 2 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 13 is irq 7 */
 118                         <0x6800 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 13 is irq 7 */
 119                         <0x6800 0 0 4 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 13 is irq 7 */
 120                         /* IDSEL 14 */
 121                         <0x7000 0 0 1 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 6 */
 122                         <0x7000 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 14 is irq 6 */
 123                         <0x7000 0 0 3 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 14 is irq 6 */
 124                         <0x7000 0 0 4 &gpio0 6 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 14 is irq 6 */
 125                 };
 126
 127                 /* EthB */
 128                 ethernet@c8009000 {
 129                         status = "ok";
 130                         queue-rx = <&qmgr 3>;
 131                         queue-txready = <&qmgr 20>;
 132                         phy-mode = "rgmii";
 133                         phy-handle = <&phy5>;
 134
 135                         mdio {
 136                                 #address-cells = <1>;
 137                                 #size-cells = <0>;
 138
 139                                 phy4: ethernet-phy@4 {
 140                                         reg = <4>;
 141                                 };
 142
 143                                 phy5: ethernet-phy@5 {
 144                                         reg = <5>;
 145                                 };
 146                         };
 147                 };
 148
 149                 /* EthC */
 150                 ethernet@c800a000 {
 151                         status = "ok";
 152                         queue-rx = <&qmgr 4>;
 153                         queue-txready = <&qmgr 21>;
 154                         phy-mode = "rgmii";
 155                         phy-handle = <&phy4>;
 156                 };
 157         };
 158 };