arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This file is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License
  12  *     version 2 as published by the Free Software Foundation.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/clock/imx6qdl-clock.h>
  44 #include <dt-bindings/gpio/gpio.h>
  45 #include <dt-bindings/input/input.h>
  46
  47 / {
  48         chosen {
  49                 stdout-path = &uart2;
  50         };
  51
  52         memory@10000000 {
  53                 device_type = "memory";
  54                 reg = <0x10000000 0x40000000>;
  55         };
  56
  57         regulators {
  58                 compatible = "simple-bus";
  59                 #address-cells = <1>;
  60                 #size-cells = <0>;
  61
  62                 reg_2p5v: regulator@0 {
  63                         compatible = "regulator-fixed";
  64                         reg = <0>;
  65                         regulator-name = "2P5V";
  66                         regulator-min-microvolt = <2500000>;
  67                         regulator-max-microvolt = <2500000>;
  68                         regulator-always-on;
  69                 };
  70
  71                 reg_3p3v: regulator@1 {
  72                         compatible = "regulator-fixed";
  73                         reg = <1>;
  74                         regulator-name = "3P3V";
  75                         regulator-min-microvolt = <3300000>;
  76                         regulator-max-microvolt = <3300000>;
  77                         regulator-always-on;
  78                 };
  79
  80                 reg_usb_otg_vbus: regulator@2 {
  81                         compatible = "regulator-fixed";
  82                         reg = <2>;
  83                         regulator-name = "usb_otg_vbus";
  84                         regulator-min-microvolt = <5000000>;
  85                         regulator-max-microvolt = <5000000>;
  86                         gpio = <&gpio3 22 0>;
  87                         enable-active-high;
  88                 };
  89
  90                 reg_can_xcvr: regulator@3 {
  91                         compatible = "regulator-fixed";
  92                         reg = <3>;
  93                         regulator-name = "CAN XCVR";
  94                         regulator-min-microvolt = <3300000>;
  95                         regulator-max-microvolt = <3300000>;
  96                         pinctrl-names = "default";
  97                         pinctrl-0 = <&pinctrl_can_xcvr>;
  98                         gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  99                 };
 100
 101                 reg_1p5v: regulator@4 {
 102                         compatible = "regulator-fixed";
 103                         reg = <4>;
 104                         regulator-name = "1P5V";
 105                         regulator-min-microvolt = <1500000>;
 106                         regulator-max-microvolt = <1500000>;
 107                         regulator-always-on;
 108                 };
 109
 110                 reg_1p8v: regulator@5 {
 111                         compatible = "regulator-fixed";
 112                         reg = <5>;
 113                         regulator-name = "1P8V";
 114                         regulator-min-microvolt = <1800000>;
 115                         regulator-max-microvolt = <1800000>;
 116                         regulator-always-on;
 117                 };
 118
 119                 reg_2p8v: regulator@6 {
 120                         compatible = "regulator-fixed";
 121                         reg = <6>;
 122                         regulator-name = "2P8V";
 123                         regulator-min-microvolt = <2800000>;
 124                         regulator-max-microvolt = <2800000>;
 125                         regulator-always-on;
 126                 };
 127
 128                 reg_usb_h1_vbus: regulator@7 {
 129                         compatible = "regulator-fixed";
 130                         reg = <7>;
 131                         pinctrl-names = "default";
 132                         pinctrl-0 = <&pinctrl_usbh1>;
 133                         regulator-name = "usb_h1_vbus";
 134                         regulator-min-microvolt = <3300000>;
 135                         regulator-max-microvolt = <3300000>;
 136                         gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
 137                         enable-active-high;
 138                 };
 139         };
 140
 141         mipi_xclk: mipi_xclk {
 142                 compatible = "pwm-clock";
 143                 #clock-cells = <0>;
 144                 clock-frequency = <22000000>;
 145                 clock-output-names = "mipi_pwm3";
 146                 pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
 147                 status = "okay";
 148         };
 149
 150         gpio-keys {
 151                 compatible = "gpio-keys";
 152                 pinctrl-names = "default";
 153                 pinctrl-0 = <&pinctrl_gpio_keys>;
 154
 155                 power {
 156                         label = "Power Button";
 157                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 158                         linux,code = <KEY_POWER>;
 159                         wakeup-source;
 160                 };
 161
 162                 menu {
 163                         label = "Menu";
 164                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 165                         linux,code = <KEY_MENU>;
 166                 };
 167
 168                 home {
 169                         label = "Home";
 170                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 171                         linux,code = <KEY_HOME>;
 172                 };
 173
 174                 back {
 175                         label = "Back";
 176                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 177                         linux,code = <KEY_BACK>;
 178                 };
 179
 180                 volume-up {
 181                         label = "Volume Up";
 182                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
 183                         linux,code = <KEY_VOLUMEUP>;
 184                 };
 185
 186                 volume-down {
 187                         label = "Volume Down";
 188                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
 189                         linux,code = <KEY_VOLUMEDOWN>;
 190                 };
 191         };
 192
 193         sound {
 194                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 195                              "fsl,imx-audio-sgtl5000";
 196                 model = "imx6q-sabrelite-sgtl5000";
 197                 ssi-controller = <&ssi1>;
 198                 audio-codec = <&codec>;
 199                 audio-routing =
 200                         "MIC_IN", "Mic Jack",
 201                         "Mic Jack", "Mic Bias",
 202                         "Headphone Jack", "HP_OUT";
 203                 mux-int-port = <1>;
 204                 mux-ext-port = <4>;
 205         };
 206
 207         backlight_lcd: backlight-lcd {
 208                 compatible = "pwm-backlight";
 209                 pwms = <&pwm1 0 5000000>;
 210                 brightness-levels = <0 4 8 16 32 64 128 255>;
 211                 default-brightness-level = <7>;
 212                 power-supply = <&reg_3p3v>;
 213                 status = "okay";
 214         };
 215
 216         backlight_lvds: backlight-lvds {
 217                 compatible = "pwm-backlight";
 218                 pwms = <&pwm4 0 5000000>;
 219                 brightness-levels = <0 4 8 16 32 64 128 255>;
 220                 default-brightness-level = <7>;
 221                 power-supply = <&reg_3p3v>;
 222                 status = "okay";
 223         };
 224
 225         lcd_display: disp0 {
 226                 compatible = "fsl,imx-parallel-display";
 227                 #address-cells = <1>;
 228                 #size-cells = <0>;
 229                 interface-pix-fmt = "bgr666";
 230                 pinctrl-names = "default";
 231                 pinctrl-0 = <&pinctrl_j15>;
 232                 status = "okay";
 233
 234                 port@0 {
 235                         reg = <0>;
 236
 237                         lcd_display_in: endpoint {
 238                                 remote-endpoint = <&ipu1_di0_disp0>;
 239                         };
 240                 };
 241
 242                 port@1 {
 243                         reg = <1>;
 244
 245                         lcd_display_out: endpoint {
 246                                 remote-endpoint = <&lcd_panel_in>;
 247                         };
 248                 };
 249         };
 250
 251         panel-lcd {
 252                 compatible = "okaya,rs800480t-7x0gp";
 253                 backlight = <&backlight_lcd>;
 254
 255                 port {
 256                         lcd_panel_in: endpoint {
 257                                 remote-endpoint = <&lcd_display_out>;
 258                         };
 259                 };
 260         };
 261
 262         panel-lvds0 {
 263                 compatible = "hannstar,hsd100pxn1";
 264                 backlight = <&backlight_lvds>;
 265
 266                 port {
 267                         panel_in: endpoint {
 268                                 remote-endpoint = <&lvds0_out>;
 269                         };
 270                 };
 271         };
 272 };
 273
 274 &ipu1_csi0_from_ipu1_csi0_mux {
 275         bus-width = <8>;
 276         data-shift = <12>; /* Lines 19:12 used */
 277         hsync-active = <1>;
 278         vync-active = <1>;
 279 };
 280
 281 &ipu1_csi0_mux_from_parallel_sensor {
 282         remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
 283 };
 284
 285 &ipu1_csi0 {
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_ipu1_csi0>;
 288 };
 289
 290 &audmux {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&pinctrl_audmux>;
 293         status = "okay";
 294 };
 295
 296 &can1 {
 297         pinctrl-names = "default";
 298         pinctrl-0 = <&pinctrl_can1>;
 299         xceiver-supply = <&reg_can_xcvr>;
 300         status = "okay";
 301 };
 302
 303 &clks {
 304         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 305                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 306         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 307                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 308 };
 309
 310 &ecspi1 {
 311         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&pinctrl_ecspi1>;
 314         status = "okay";
 315
 316         flash: m25p80@0 {
 317                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
 318                 spi-max-frequency = <20000000>;
 319                 reg = <0>;
 320         };
 321 };
 322
 323 &fec {
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&pinctrl_enet>;
 326         phy-mode = "rgmii";
 327         phy-handle = <&ethphy>;
 328         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 329         status = "okay";
 330
 331         mdio {
 332                 #address-cells = <1>;
 333                 #size-cells = <0>;
 334
 335                 ethphy: ethernet-phy {
 336                         compatible = "ethernet-phy-ieee802.3-c22";
 337                         txen-skew-ps = <0>;
 338                         txc-skew-ps = <3000>;
 339                         rxdv-skew-ps = <0>;
 340                         rxc-skew-ps = <3000>;
 341                         rxd0-skew-ps = <0>;
 342                         rxd1-skew-ps = <0>;
 343                         rxd2-skew-ps = <0>;
 344                         rxd3-skew-ps = <0>;
 345                         txd0-skew-ps = <0>;
 346                         txd1-skew-ps = <0>;
 347                         txd2-skew-ps = <0>;
 348                         txd3-skew-ps = <0>;
 349                 };
 350         };
 351 };
 352
 353 &hdmi {
 354         ddc-i2c-bus = <&i2c2>;
 355         status = "okay";
 356 };
 357
 358 &i2c1 {
 359         clock-frequency = <100000>;
 360         pinctrl-names = "default";
 361         pinctrl-0 = <&pinctrl_i2c1>;
 362         status = "okay";
 363
 364         codec: sgtl5000@a {
 365                 compatible = "fsl,sgtl5000";
 366                 reg = <0x0a>;
 367                 clocks = <&clks IMX6QDL_CLK_CKO>;
 368                 VDDA-supply = <&reg_2p5v>;
 369                 VDDIO-supply = <&reg_3p3v>;
 370         };
 371 };
 372
 373 &i2c2 {
 374         clock-frequency = <100000>;
 375         pinctrl-names = "default";
 376         pinctrl-0 = <&pinctrl_i2c2>;
 377         status = "okay";
 378
 379         ov5640: camera@40 {
 380                 compatible = "ovti,ov5640";
 381                 pinctrl-names = "default";
 382                 pinctrl-0 = <&pinctrl_ov5640>;
 383                 reg = <0x40>;
 384                 clocks = <&mipi_xclk>;
 385                 clock-names = "xclk";
 386                 DOVDD-supply = <&reg_1p8v>;
 387                 AVDD-supply = <&reg_2p8v>;
 388                 DVDD-supply = <&reg_1p5v>;
 389                 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
 390                 powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
 391
 392                 port {
 393                         ov5640_to_mipi_csi2: endpoint {
 394                                 remote-endpoint = <&mipi_csi2_in>;
 395                                 clock-lanes = <0>;
 396                                 data-lanes = <1 2>;
 397                         };
 398                 };
 399         };
 400
 401         ov5642: camera@42 {
 402                 compatible = "ovti,ov5642";
 403                 pinctrl-names = "default";
 404                 pinctrl-0 = <&pinctrl_ov5642>;
 405                 clocks = <&clks IMX6QDL_CLK_CKO2>;
 406                 clock-names = "xclk";
 407                 reg = <0x42>;
 408                 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
 409                 powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
 410                 gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
 411                 status = "disabled";
 412
 413                 port {
 414                         ov5642_to_ipu1_csi0_mux: endpoint {
 415                                 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
 416                                 bus-width = <8>;
 417                                 hsync-active = <1>;
 418                                 vsync-active = <1>;
 419                         };
 420                 };
 421         };
 422 };
 423
 424 &i2c3 {
 425         clock-frequency = <100000>;
 426         pinctrl-names = "default";
 427         pinctrl-0 = <&pinctrl_i2c3>;
 428         status = "okay";
 429 };
 430
 431 &iomuxc {
 432         pinctrl-names = "default";
 433         pinctrl-0 = <&pinctrl_hog>;
 434
 435         imx6q-sabrelite {
 436                 pinctrl_hog: hoggrp {
 437                         fsl,pins = <
 438                                 /* SGTL5000 sys_mclk */
 439                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 440                         >;
 441                 };
 442
 443                 pinctrl_audmux: audmuxgrp {
 444                         fsl,pins = <
 445                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 446                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 447                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 448                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 449                         >;
 450                 };
 451
 452                 pinctrl_can1: can1grp {
 453                         fsl,pins = <
 454                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 455                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b0
 456                         >;
 457                 };
 458
 459                 pinctrl_can_xcvr: can-xcvrgrp {
 460                         fsl,pins = <
 461                                 /* Flexcan XCVR enable */
 462                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b0
 463                         >;
 464                 };
 465
 466                 pinctrl_ecspi1: ecspi1grp {
 467                         fsl,pins = <
 468                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 469                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 470                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 471                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 472                         >;
 473                 };
 474
 475                 pinctrl_enet: enetgrp {
 476                         fsl,pins = <
 477                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 478                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 479                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
 480                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
 481                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
 482                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
 483                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
 484                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
 485                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 486                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 487                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 488                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 489                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 490                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 491                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 492                                 /* Phy reset */
 493                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
 494                         >;
 495                 };
 496
 497                 pinctrl_gpio_keys: gpio-keysgrp {
 498                         fsl,pins = <
 499                                 /* Power Button */
 500                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 501                                 /* Menu Button */
 502                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 503                                 /* Home Button */
 504                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 505                                 /* Back Button */
 506                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 507                                 /* Volume Up Button */
 508                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 509                                 /* Volume Down Button */
 510                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 511                         >;
 512                 };
 513
 514                 pinctrl_i2c1: i2c1grp {
 515                         fsl,pins = <
 516                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 517                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 518                         >;
 519                 };
 520
 521                 pinctrl_i2c2: i2c2grp {
 522                         fsl,pins = <
 523                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 524                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 525                         >;
 526                 };
 527
 528                 pinctrl_i2c3: i2c3grp {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 531                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 532                         >;
 533                 };
 534
 535                 pinctrl_ipu1_csi0: ipu1csi0grp {
 536                         fsl,pins = <
 537                                 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
 538                                 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
 539                                 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
 540                                 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
 541                                 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
 542                                 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
 543                                 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
 544                                 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
 545                                 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
 546                                 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
 547                                 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
 548                                 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
 549                         >;
 550                 };
 551
 552                 pinctrl_j15: j15grp {
 553                         fsl,pins = <
 554                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 555                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 556                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 557                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 558                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 559                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 560                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 561                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 562                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 563                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 564                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 565                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 566                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 567                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 568                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 569                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 570                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 571                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 572                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 573                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 574                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 575                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 576                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 577                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 578                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 579                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 580                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 581                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 582                         >;
 583                 };
 584
 585                 pinctrl_ov5640: ov5640grp {
 586                         fsl,pins = <
 587                                 MX6QDL_PAD_NANDF_D5__GPIO2_IO05   0x000b0
 588                                 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
 589                         >;
 590                 };
 591
 592                 pinctrl_ov5642: ov5642grp {
 593                         fsl,pins = <
 594                                 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
 595                                 MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0
 596                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08   0x130b0
 597                                 MX6QDL_PAD_GPIO_3__CCM_CLKO2    0x000b0
 598                         >;
 599                 };
 600
 601                 pinctrl_pwm1: pwm1grp {
 602                         fsl,pins = <
 603                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 604                         >;
 605                 };
 606
 607                 pinctrl_pwm3: pwm3grp {
 608                         fsl,pins = <
 609                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 610                         >;
 611                 };
 612
 613                 pinctrl_pwm4: pwm4grp {
 614                         fsl,pins = <
 615                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 616                         >;
 617                 };
 618
 619                 pinctrl_uart1: uart1grp {
 620                         fsl,pins = <
 621                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 622                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 623                         >;
 624                 };
 625
 626                 pinctrl_uart2: uart2grp {
 627                         fsl,pins = <
 628                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 629                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 630                         >;
 631                 };
 632
 633                 pinctrl_usbh1: usbh1grp {
 634                         fsl,pins = <
 635                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x030b0
 636                         >;
 637                 };
 638
 639                 pinctrl_usbotg: usbotggrp {
 640                         fsl,pins = <
 641                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 642                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 643                                 /* power enable, high active */
 644                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 645                         >;
 646                 };
 647
 648                 pinctrl_usdhc3: usdhc3grp {
 649                         fsl,pins = <
 650                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 651                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 652                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 653                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 654                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 655                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 656                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 657                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
 658                         >;
 659                 };
 660
 661                 pinctrl_usdhc4: usdhc4grp {
 662                         fsl,pins = <
 663                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 664                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 665                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 666                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 667                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 668                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 669                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 670                         >;
 671                 };
 672         };
 673 };
 674
 675 &ipu1_di0_disp0 {
 676         remote-endpoint = <&lcd_display_in>;
 677 };
 678
 679 &ldb {
 680         status = "okay";
 681
 682         lvds-channel@0 {
 683                 status = "okay";
 684
 685                 port@4 {
 686                         reg = <4>;
 687
 688                         lvds0_out: endpoint {
 689                                 remote-endpoint = <&panel_in>;
 690                         };
 691                 };
 692         };
 693 };
 694
 695 &pcie {
 696         status = "okay";
 697 };
 698
 699 &pwm1 {
 700         #pwm-cells = <2>;
 701         pinctrl-names = "default";
 702         pinctrl-0 = <&pinctrl_pwm1>;
 703         status = "okay";
 704 };
 705
 706 &pwm3 {
 707         #pwm-cells = <2>;
 708         pinctrl-names = "default";
 709         pinctrl-0 = <&pinctrl_pwm3>;
 710         status = "okay";
 711 };
 712
 713 &pwm4 {
 714         #pwm-cells = <2>;
 715         pinctrl-names = "default";
 716         pinctrl-0 = <&pinctrl_pwm4>;
 717         status = "okay";
 718 };
 719
 720 &ssi1 {
 721         status = "okay";
 722 };
 723
 724 &uart1 {
 725         pinctrl-names = "default";
 726         pinctrl-0 = <&pinctrl_uart1>;
 727         status = "okay";
 728 };
 729
 730 &uart2 {
 731         pinctrl-names = "default";
 732         pinctrl-0 = <&pinctrl_uart2>;
 733         status = "okay";
 734 };
 735
 736 &usbh1 {
 737         vbus-supply = <&reg_usb_h1_vbus>;
 738         status = "okay";
 739 };
 740
 741 &usbotg {
 742         vbus-supply = <&reg_usb_otg_vbus>;
 743         pinctrl-names = "default";
 744         pinctrl-0 = <&pinctrl_usbotg>;
 745         disable-over-current;
 746         status = "okay";
 747 };
 748
 749 &usdhc3 {
 750         pinctrl-names = "default";
 751         pinctrl-0 = <&pinctrl_usdhc3>;
 752         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 753         wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
 754         vmmc-supply = <&reg_3p3v>;
 755         status = "okay";
 756 };
 757
 758 &usdhc4 {
 759         pinctrl-names = "default";
 760         pinctrl-0 = <&pinctrl_usdhc4>;
 761         cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
 762         vmmc-supply = <&reg_3p3v>;
 763         status = "okay";
 764 };
 765
 766 &mipi_csi {
 767         status = "okay";
 768
 769         port@0 {
 770                 reg = <0>;
 771
 772                 mipi_csi2_in: endpoint {
 773                         remote-endpoint = <&ov5640_to_mipi_csi2>;
 774                         clock-lanes = <0>;
 775                         data-lanes = <1 2>;
 776                 };
 777         };
 778 };