arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR X11
   2 /*
   3  * Copyright 2013 Boundary Devices, Inc.
   4  * Copyright 2011 Freescale Semiconductor, Inc.
   5  * Copyright 2011 Linaro Ltd.
   6  */
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         chosen {
  12                 stdout-path = &uart2;
  13         };
  14
  15         memory@10000000 {
  16                 device_type = "memory";
  17                 reg = <0x10000000 0x40000000>;
  18         };
  19
  20         regulators {
  21                 compatible = "simple-bus";
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 reg_2p5v: regulator@0 {
  26                         compatible = "regulator-fixed";
  27                         reg = <0>;
  28                         regulator-name = "2P5V";
  29                         regulator-min-microvolt = <2500000>;
  30                         regulator-max-microvolt = <2500000>;
  31                         regulator-always-on;
  32                 };
  33
  34                 reg_3p3v: regulator@1 {
  35                         compatible = "regulator-fixed";
  36                         reg = <1>;
  37                         regulator-name = "3P3V";
  38                         regulator-min-microvolt = <3300000>;
  39                         regulator-max-microvolt = <3300000>;
  40                         regulator-always-on;
  41                 };
  42
  43                 reg_usb_otg_vbus: regulator@2 {
  44                         compatible = "regulator-fixed";
  45                         reg = <2>;
  46                         regulator-name = "usb_otg_vbus";
  47                         regulator-min-microvolt = <5000000>;
  48                         regulator-max-microvolt = <5000000>;
  49                         gpio = <&gpio3 22 0>;
  50                         enable-active-high;
  51                 };
  52
  53                 reg_can_xcvr: regulator@3 {
  54                         compatible = "regulator-fixed";
  55                         reg = <3>;
  56                         regulator-name = "CAN XCVR";
  57                         regulator-min-microvolt = <3300000>;
  58                         regulator-max-microvolt = <3300000>;
  59                         pinctrl-names = "default";
  60                         pinctrl-0 = <&pinctrl_can_xcvr>;
  61                         gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  62                 };
  63
  64                 reg_wlan_vmmc: regulator@4 {
  65                         compatible = "regulator-fixed";
  66                         reg = <4>;
  67                         pinctrl-names = "default";
  68                         pinctrl-0 = <&pinctrl_wlan_vmmc>;
  69                         regulator-name = "reg_wlan_vmmc";
  70                         regulator-min-microvolt = <3300000>;
  71                         regulator-max-microvolt = <3300000>;
  72                         gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
  73                         startup-delay-us = <70000>;
  74                         enable-active-high;
  75                 };
  76
  77                 reg_usb_h1_vbus: regulator@5 {
  78                         compatible = "regulator-fixed";
  79                         reg = <5>;
  80                         pinctrl-names = "default";
  81                         pinctrl-0 = <&pinctrl_usbh1>;
  82                         regulator-name = "usb_h1_vbus";
  83                         regulator-min-microvolt = <3300000>;
  84                         regulator-max-microvolt = <3300000>;
  85                         gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
  86                         enable-active-high;
  87                 };
  88         };
  89
  90         gpio-keys {
  91                 compatible = "gpio-keys";
  92                 pinctrl-names = "default";
  93                 pinctrl-0 = <&pinctrl_gpio_keys>;
  94
  95                 power {
  96                         label = "Power Button";
  97                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  98                         linux,code = <KEY_POWER>;
  99                         wakeup-source;
 100                 };
 101
 102                 menu {
 103                         label = "Menu";
 104                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 105                         linux,code = <KEY_MENU>;
 106                 };
 107
 108                 home {
 109                         label = "Home";
 110                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 111                         linux,code = <KEY_HOME>;
 112                 };
 113
 114                 back {
 115                         label = "Back";
 116                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 117                         linux,code = <KEY_BACK>;
 118                 };
 119
 120                 volume-up {
 121                         label = "Volume Up";
 122                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
 123                         linux,code = <KEY_VOLUMEUP>;
 124                 };
 125
 126                 volume-down {
 127                         label = "Volume Down";
 128                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
 129                         linux,code = <KEY_VOLUMEDOWN>;
 130                 };
 131         };
 132
 133         sound {
 134                 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
 135                              "fsl,imx-audio-sgtl5000";
 136                 model = "imx6q-nitrogen6x-sgtl5000";
 137                 ssi-controller = <&ssi1>;
 138                 audio-codec = <&codec>;
 139                 audio-routing =
 140                         "MIC_IN", "Mic Jack",
 141                         "Mic Jack", "Mic Bias",
 142                         "Headphone Jack", "HP_OUT";
 143                 mux-int-port = <1>;
 144                 mux-ext-port = <3>;
 145         };
 146
 147         backlight_lcd: backlight-lcd {
 148                 compatible = "pwm-backlight";
 149                 pwms = <&pwm1 0 5000000>;
 150                 brightness-levels = <0 4 8 16 32 64 128 255>;
 151                 default-brightness-level = <7>;
 152                 power-supply = <&reg_3p3v>;
 153                 status = "okay";
 154         };
 155
 156         backlight_lvds: backlight-lvds {
 157                 compatible = "pwm-backlight";
 158                 pwms = <&pwm4 0 5000000>;
 159                 brightness-levels = <0 4 8 16 32 64 128 255>;
 160                 default-brightness-level = <7>;
 161                 power-supply = <&reg_3p3v>;
 162                 status = "okay";
 163         };
 164
 165         lcd_display: disp0 {
 166                 compatible = "fsl,imx-parallel-display";
 167                 #address-cells = <1>;
 168                 #size-cells = <0>;
 169                 interface-pix-fmt = "bgr666";
 170                 pinctrl-names = "default";
 171                 pinctrl-0 = <&pinctrl_j15>;
 172                 status = "okay";
 173
 174                 port@0 {
 175                         reg = <0>;
 176
 177                         lcd_display_in: endpoint {
 178                                 remote-endpoint = <&ipu1_di0_disp0>;
 179                         };
 180                 };
 181
 182                 port@1 {
 183                         reg = <1>;
 184
 185                         lcd_display_out: endpoint {
 186                                 remote-endpoint = <&lcd_panel_in>;
 187                         };
 188                 };
 189         };
 190
 191         panel-lcd {
 192                 compatible = "okaya,rs800480t-7x0gp";
 193                 backlight = <&backlight_lcd>;
 194
 195                 port {
 196                         lcd_panel_in: endpoint {
 197                                 remote-endpoint = <&lcd_display_out>;
 198                         };
 199                 };
 200         };
 201
 202         panel-lvds0 {
 203                 compatible = "hannstar,hsd100pxn1";
 204                 backlight = <&backlight_lvds>;
 205
 206                 port {
 207                         panel_in: endpoint {
 208                                 remote-endpoint = <&lvds0_out>;
 209                         };
 210                 };
 211         };
 212 };
 213
 214 &audmux {
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&pinctrl_audmux>;
 217         status = "okay";
 218 };
 219
 220 &can1 {
 221         pinctrl-names = "default";
 222         pinctrl-0 = <&pinctrl_can1>;
 223         xceiver-supply = <&reg_can_xcvr>;
 224         status = "okay";
 225 };
 226
 227 &clks {
 228         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 229                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 230         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 231                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 232 };
 233
 234 &ecspi1 {
 235         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 236         pinctrl-names = "default";
 237         pinctrl-0 = <&pinctrl_ecspi1>;
 238         status = "okay";
 239
 240         flash: m25p80@0 {
 241                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
 242                 spi-max-frequency = <20000000>;
 243                 reg = <0>;
 244                 #address-cells = <1>;
 245                 #size-cells = <1>;
 246
 247                 partition@0 {
 248                         label = "bootloader";
 249                         reg = <0x0 0xc0000>;
 250                 };
 251
 252                 partition@c0000 {
 253                         label = "env";
 254                         reg = <0xc0000 0x2000>;
 255                 };
 256
 257                 partition@c2000 {
 258                         label = "splash";
 259                         reg = <0xc2000 0x13e000>;
 260                 };
 261         };
 262 };
 263
 264 &fec {
 265         pinctrl-names = "default";
 266         pinctrl-0 = <&pinctrl_enet>;
 267         phy-mode = "rgmii";
 268         phy-handle = <&ethphy>;
 269         phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
 270         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 271                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 272         fsl,err006687-workaround-present;
 273         status = "okay";
 274
 275         mdio {
 276                 #address-cells = <1>;
 277                 #size-cells = <0>;
 278
 279                 ethphy: ethernet-phy {
 280                         compatible = "ethernet-phy-ieee802.3-c22";
 281                         txen-skew-ps = <0>;
 282                         txc-skew-ps = <3000>;
 283                         rxdv-skew-ps = <0>;
 284                         rxc-skew-ps = <3000>;
 285                         rxd0-skew-ps = <0>;
 286                         rxd1-skew-ps = <0>;
 287                         rxd2-skew-ps = <0>;
 288                         rxd3-skew-ps = <0>;
 289                         txd0-skew-ps = <0>;
 290                         txd1-skew-ps = <0>;
 291                         txd2-skew-ps = <0>;
 292                         txd3-skew-ps = <0>;
 293                 };
 294         };
 295 };
 296
 297 &hdmi {
 298         ddc-i2c-bus = <&i2c2>;
 299         status = "okay";
 300 };
 301
 302 &i2c1 {
 303         clock-frequency = <100000>;
 304         pinctrl-names = "default";
 305         pinctrl-0 = <&pinctrl_i2c1>;
 306         status = "okay";
 307
 308         codec: sgtl5000@a {
 309                 compatible = "fsl,sgtl5000";
 310                 reg = <0x0a>;
 311                 clocks = <&clks IMX6QDL_CLK_CKO>;
 312                 VDDA-supply = <&reg_2p5v>;
 313                 VDDIO-supply = <&reg_3p3v>;
 314         };
 315
 316         rtc: rtc@6f {
 317                 compatible = "isil,isl1208";
 318                 reg = <0x6f>;
 319         };
 320 };
 321
 322 &i2c2 {
 323         clock-frequency = <100000>;
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&pinctrl_i2c2>;
 326         status = "okay";
 327 };
 328
 329 &i2c3 {
 330         clock-frequency = <100000>;
 331         pinctrl-names = "default";
 332         pinctrl-0 = <&pinctrl_i2c3>;
 333         status = "okay";
 334
 335         touchscreen@4 {
 336                 compatible = "eeti,egalax_ts";
 337                 reg = <0x04>;
 338                 interrupt-parent = <&gpio1>;
 339                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 340                 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
 341         };
 342
 343         touchscreen@38 {
 344                 compatible = "edt,edt-ft5x06";
 345                 reg = <0x38>;
 346                 interrupt-parent = <&gpio1>;
 347                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 348                 wakeup-source;
 349         };
 350 };
 351
 352 &iomuxc {
 353         pinctrl-names = "default";
 354         pinctrl-0 = <&pinctrl_hog>;
 355
 356         imx6q-nitrogen6x {
 357                 pinctrl_hog: hoggrp {
 358                         fsl,pins = <
 359                                 /* SGTL5000 sys_mclk */
 360                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 361                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x1b0b0
 362                         >;
 363                 };
 364
 365                 pinctrl_audmux: audmuxgrp {
 366                         fsl,pins = <
 367                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 368                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 369                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 370                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 371                         >;
 372                 };
 373
 374                 pinctrl_can1: can1grp {
 375                         fsl,pins = <
 376                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 377                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b0
 378                         >;
 379                 };
 380
 381                 pinctrl_can_xcvr: can-xcvrgrp {
 382                         fsl,pins = <
 383                                 /* Flexcan XCVR enable */
 384                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b0
 385                         >;
 386                 };
 387
 388                 pinctrl_ecspi1: ecspi1grp {
 389                         fsl,pins = <
 390                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 391                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 392                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 393                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 394                         >;
 395                 };
 396
 397                 pinctrl_enet: enetgrp {
 398                         fsl,pins = <
 399                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 400                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 401                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
 402                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
 403                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
 404                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
 405                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
 406                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
 407                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 408                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 409                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 410                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 411                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 412                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 413                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 414                                 /* Phy reset */
 415                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
 416                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 417                         >;
 418                 };
 419
 420                 pinctrl_gpio_keys: gpio-keysgrp {
 421                         fsl,pins = <
 422                                 /* Power Button */
 423                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 424                                 /* Menu Button */
 425                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 426                                 /* Home Button */
 427                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 428                                 /* Back Button */
 429                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 430                                 /* Volume Up Button */
 431                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 432                                 /* Volume Down Button */
 433                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 434                         >;
 435                 };
 436
 437                 pinctrl_i2c1: i2c1grp {
 438                         fsl,pins = <
 439                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 440                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 441                         >;
 442                 };
 443
 444                 pinctrl_i2c2: i2c2grp {
 445                         fsl,pins = <
 446                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 447                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 448                         >;
 449                 };
 450
 451                 pinctrl_i2c3: i2c3grp {
 452                         fsl,pins = <
 453                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 454                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 455                         >;
 456                 };
 457
 458                 pinctrl_j15: j15grp {
 459                         fsl,pins = <
 460                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 461                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 462                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 463                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 464                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 465                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 466                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 467                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 468                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 469                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 470                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 471                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 472                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 473                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 474                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 475                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 476                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 477                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 478                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 479                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 480                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 481                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 482                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 483                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 484                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 485                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 486                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 487                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 488                         >;
 489                 };
 490
 491                 pinctrl_pwm1: pwm1grp {
 492                         fsl,pins = <
 493                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 494                         >;
 495                 };
 496
 497                 pinctrl_pwm3: pwm3grp {
 498                         fsl,pins = <
 499                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 500                         >;
 501                 };
 502
 503                 pinctrl_pwm4: pwm4grp {
 504                         fsl,pins = <
 505                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 506                         >;
 507                 };
 508
 509                 pinctrl_uart1: uart1grp {
 510                         fsl,pins = <
 511                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 512                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 513                         >;
 514                 };
 515
 516                 pinctrl_uart2: uart2grp {
 517                         fsl,pins = <
 518                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 519                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 520                         >;
 521                 };
 522
 523                 pinctrl_usbh1: usbh1grp {
 524                         fsl,pins = <
 525                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x030b0
 526                         >;
 527                 };
 528
 529                 pinctrl_usbotg: usbotggrp {
 530                         fsl,pins = <
 531                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x17059
 532                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 533                                 /* power enable, high active */
 534                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 535                         >;
 536                 };
 537
 538                 pinctrl_usdhc2: usdhc2grp {
 539                         fsl,pins = <
 540                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17071
 541                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10071
 542                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17071
 543                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17071
 544                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17071
 545                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17071
 546                         >;
 547                 };
 548
 549                 pinctrl_usdhc3: usdhc3grp {
 550                         fsl,pins = <
 551                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 552                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 553                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 554                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 555                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 556                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 557                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 558                         >;
 559                 };
 560
 561                 pinctrl_usdhc4: usdhc4grp {
 562                         fsl,pins = <
 563                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 564                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 565                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 566                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 567                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 568                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 569                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 570                         >;
 571                 };
 572
 573                 pinctrl_wlan_vmmc: wlan-vmmcgrp {
 574                         fsl,pins = <
 575                                 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11        0x100b0
 576                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15        0x000b0
 577                                 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x000b0
 578                                 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT      0x000b0
 579                         >;
 580                 };
 581         };
 582 };
 583
 584 &ipu1_di0_disp0 {
 585         remote-endpoint = <&lcd_display_in>;
 586 };
 587
 588 &ldb {
 589         status = "okay";
 590
 591         lvds-channel@0 {
 592                 status = "okay";
 593
 594                 port@4 {
 595                         reg = <4>;
 596
 597                         lvds0_out: endpoint {
 598                                 remote-endpoint = <&panel_in>;
 599                         };
 600                 };
 601         };
 602 };
 603
 604 &pcie {
 605         status = "okay";
 606 };
 607
 608 &pwm1 {
 609         #pwm-cells = <2>;
 610         pinctrl-names = "default";
 611         pinctrl-0 = <&pinctrl_pwm1>;
 612         status = "okay";
 613 };
 614
 615 &pwm3 {
 616         pinctrl-names = "default";
 617         pinctrl-0 = <&pinctrl_pwm3>;
 618         status = "okay";
 619 };
 620
 621 &pwm4 {
 622         #pwm-cells = <2>;
 623         pinctrl-names = "default";
 624         pinctrl-0 = <&pinctrl_pwm4>;
 625         status = "okay";
 626 };
 627
 628 &ssi1 {
 629         status = "okay";
 630 };
 631
 632 &uart1 {
 633         pinctrl-names = "default";
 634         pinctrl-0 = <&pinctrl_uart1>;
 635         status = "okay";
 636 };
 637
 638 &uart2 {
 639         pinctrl-names = "default";
 640         pinctrl-0 = <&pinctrl_uart2>;
 641         status = "okay";
 642 };
 643
 644 &usbh1 {
 645         vbus-supply = <&reg_usb_h1_vbus>;
 646         status = "okay";
 647 };
 648
 649 &usbotg {
 650         vbus-supply = <&reg_usb_otg_vbus>;
 651         pinctrl-names = "default";
 652         pinctrl-0 = <&pinctrl_usbotg>;
 653         disable-over-current;
 654         status = "okay";
 655 };
 656
 657 &usdhc2 {
 658         pinctrl-names = "default";
 659         pinctrl-0 = <&pinctrl_usdhc2>;
 660         bus-width = <4>;
 661         non-removable;
 662         vmmc-supply = <&reg_wlan_vmmc>;
 663         cap-power-off-card;
 664         keep-power-in-suspend;
 665         status = "okay";
 666
 667         #address-cells = <1>;
 668         #size-cells = <0>;
 669         wlcore: wlcore@2 {
 670                 compatible = "ti,wl1271";
 671                 reg = <2>;
 672                 interrupt-parent = <&gpio6>;
 673                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
 674                 ref-clock-frequency = <38400000>;
 675         };
 676 };
 677
 678 &usdhc3 {
 679         pinctrl-names = "default";
 680         pinctrl-0 = <&pinctrl_usdhc3>;
 681         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 682         vmmc-supply = <&reg_3p3v>;
 683         status = "okay";
 684 };
 685
 686 &usdhc4 {
 687         pinctrl-names = "default";
 688         pinctrl-0 = <&pinctrl_usdhc4>;
 689         cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
 690         vmmc-supply = <&reg_3p3v>;
 691         status = "okay";
 692 };