1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2015 Boundary Devices, Inc.
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
14 device_type = "memory";
15 reg = <0x10000000 0xF0000000>;
19 compatible = "simple-bus";
23 reg_1p8v: regulator@0 {
24 compatible = "regulator-fixed";
26 regulator-name = "1P8V";
27 regulator-min-microvolt = <1800000>;
28 regulator-max-microvolt = <1800000>;
32 reg_2p5v: regulator@1 {
33 compatible = "regulator-fixed";
35 regulator-name = "2P5V";
36 regulator-min-microvolt = <2500000>;
37 regulator-max-microvolt = <2500000>;
41 reg_3p3v: regulator@2 {
42 compatible = "regulator-fixed";
44 regulator-name = "3P3V";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
50 reg_usb_otg_vbus: regulator@3 {
51 compatible = "regulator-fixed";
53 regulator-name = "usb_otg_vbus";
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
56 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
60 reg_usb_h1_vbus: regulator@4 {
61 compatible = "regulator-fixed";
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_usbh1>;
65 regulator-name = "usb_h1_vbus";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
68 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
72 reg_wlan_vmmc: regulator@5 {
73 compatible = "regulator-fixed";
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_wlan_vmmc>;
77 regulator-name = "reg_wlan_vmmc";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
80 gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
81 startup-delay-us = <70000>;
85 reg_can_xcvr: regulator@6 {
86 compatible = "regulator-fixed";
88 regulator-name = "CAN XCVR";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_can_xcvr>;
93 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
98 compatible = "gpio-keys";
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_gpio_keys>;
103 label = "Power Button";
104 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
105 linux,code = <KEY_POWER>;
111 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
112 linux,code = <KEY_MENU>;
117 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
118 linux,code = <KEY_HOME>;
123 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
124 linux,code = <KEY_BACK>;
129 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
130 linux,code = <KEY_VOLUMEUP>;
134 label = "Volume Down";
135 gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
136 linux,code = <KEY_VOLUMEDOWN>;
141 compatible = "i2c-mux-gpio";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_i2c2mux>;
144 #address-cells = <1>;
146 mux-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH
147 &gpio4 15 GPIO_ACTIVE_HIGH>;
148 i2c-parent = <&i2c2>;
153 #address-cells = <1>;
159 #address-cells = <1>;
165 compatible = "i2c-mux-gpio";
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_i2c3mux>;
168 #address-cells = <1>;
170 mux-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
171 i2c-parent = <&i2c3>;
176 #address-cells = <1>;
182 compatible = "gpio-leds";
185 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
186 retain-state-suspended;
187 default-state = "off";
191 gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
192 retain-state-suspended;
193 default-state = "on";
197 backlight_lcd: backlight-lcd {
198 compatible = "pwm-backlight";
199 pwms = <&pwm1 0 5000000>;
200 brightness-levels = <0 4 8 16 32 64 128 255>;
201 default-brightness-level = <7>;
202 power-supply = <®_3p3v>;
206 backlight_lvds0: backlight-lvds0 {
207 compatible = "pwm-backlight";
208 pwms = <&pwm4 0 5000000>;
209 brightness-levels = <0 4 8 16 32 64 128 255>;
210 default-brightness-level = <7>;
211 power-supply = <®_3p3v>;
215 backlight_lvds1: backlight-lvds1 {
216 compatible = "pwm-backlight";
217 pwms = <&pwm2 0 5000000>;
218 brightness-levels = <0 4 8 16 32 64 128 255>;
219 default-brightness-level = <7>;
220 power-supply = <®_3p3v>;
225 compatible = "fsl,imx-parallel-display";
226 #address-cells = <1>;
228 interface-pix-fmt = "bgr666";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_j15>;
236 lcd_display_in: endpoint {
237 remote-endpoint = <&ipu1_di0_disp0>;
244 lcd_display_out: endpoint {
245 remote-endpoint = <&lcd_panel_in>;
251 compatible = "okaya,rs800480t-7x0gp";
252 backlight = <&backlight_lcd>;
255 lcd_panel_in: endpoint {
256 remote-endpoint = <&lcd_display_out>;
262 compatible = "hannstar,hsd100pxn1";
263 backlight = <&backlight_lvds0>;
266 panel_in_lvds0: endpoint {
267 remote-endpoint = <&lvds0_out>;
273 compatible = "hannstar,hsd100pxn1";
274 backlight = <&backlight_lvds1>;
277 panel_in_lvds1: endpoint {
278 remote-endpoint = <&lvds1_out>;
284 compatible = "fsl,imx6q-nitrogen6_max-sgtl5000",
285 "fsl,imx-audio-sgtl5000";
286 model = "imx6q-nitrogen6_max-sgtl5000";
287 ssi-controller = <&ssi1>;
288 audio-codec = <&codec>;
290 "MIC_IN", "Mic Jack",
291 "Mic Jack", "Mic Bias",
292 "Headphone Jack", "HP_OUT";
299 pinctrl-names = "default";
300 pinctrl-0 = <&pinctrl_audmux>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_can1>;
307 xceiver-supply = <®_can_xcvr>;
312 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
313 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
314 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
315 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
319 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
320 pinctrl-names = "default";
321 pinctrl-0 = <&pinctrl_ecspi1>;
325 compatible = "microchip,sst25vf016b";
326 spi-max-frequency = <20000000>;
332 pinctrl-names = "default";
333 pinctrl-0 = <&pinctrl_enet>;
335 phy-handle = <ðphy>;
336 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
337 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
338 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
339 fsl,err006687-workaround-present;
343 #address-cells = <1>;
346 ethphy: ethernet-phy {
347 compatible = "ethernet-phy-ieee802.3-c22";
349 txc-skew-ps = <3000>;
351 rxc-skew-ps = <3000>;
365 ddc-i2c-bus = <&i2c2>;
370 clock-frequency = <100000>;
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_i2c1>;
376 compatible = "fsl,sgtl5000";
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_sgtl5000>;
380 clocks = <&clks IMX6QDL_CLK_CKO>;
381 VDDA-supply = <®_2p5v>;
382 VDDIO-supply = <®_3p3v>;
386 compatible = "microcrystal,rv4162";
387 pinctrl-names = "default";
388 pinctrl-0 = <&pinctrl_rv4162>;
390 interrupts-extended = <&gpio4 6 IRQ_TYPE_LEVEL_LOW>;
395 clock-frequency = <100000>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&pinctrl_i2c2>;
402 clock-frequency = <100000>;
403 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_i2c3>;
408 compatible = "eeti,egalax_ts";
410 interrupt-parent = <&gpio1>;
411 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
412 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
416 compatible = "edt,edt-ft5x06";
418 interrupt-parent = <&gpio1>;
419 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
425 imx6q-nitrogen6-max {
426 pinctrl_audmux: audmuxgrp {
428 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
429 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
430 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
431 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
435 pinctrl_can1: can1grp {
437 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
438 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
442 pinctrl_can_xcvr: can-xcvrgrp {
444 /* Flexcan XCVR enable */
445 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
449 pinctrl_ecspi1: ecspi1grp {
451 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
452 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
453 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
454 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
458 pinctrl_enet: enetgrp {
460 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
461 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
462 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
463 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
464 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
465 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
466 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
467 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
468 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
469 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
470 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
471 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
472 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
473 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
474 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
476 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0
477 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
478 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
482 pinctrl_gpio_keys: gpio-keysgrp {
485 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
487 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
489 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
491 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
492 /* Volume Up Button */
493 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
494 /* Volume Down Button */
495 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0
499 pinctrl_i2c1: i2c1grp {
501 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
502 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
506 pinctrl_i2c2: i2c2grp {
508 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
509 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
513 pinctrl_i2c2mux: i2c2muxgrp {
515 /* ov5642 camera i2c enable */
516 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x000b0
517 /* ov5640_mipi camera i2c enable */
518 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
522 pinctrl_i2c3: i2c3grp {
524 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
525 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
526 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
530 pinctrl_i2c3mux: i2c3muxgrp {
532 /* PCIe I2C enable */
533 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x000b0
537 pinctrl_j15: j15grp {
539 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
540 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
541 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
542 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
543 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
544 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
545 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
546 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
547 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
548 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
549 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
550 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
551 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
552 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
553 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
554 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
555 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
556 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
557 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
558 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
559 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
560 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
561 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
562 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
563 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
564 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
565 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
566 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
570 pinctrl_pcie: pciegrp {
573 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x000b0
577 pinctrl_pwm1: pwm1grp {
579 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
583 pinctrl_pwm2: pwm2grp {
585 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
589 pinctrl_pwm3: pwm3grp {
591 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
595 pinctrl_pwm4: pwm4grp {
597 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
601 pinctrl_rv4162: rv4162grp {
603 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
607 pinctrl_sgtl5000: sgtl5000grp {
609 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
610 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
611 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
615 pinctrl_uart1: uart1grp {
617 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
618 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
622 pinctrl_uart2: uart2grp {
624 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
625 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
629 pinctrl_uart5: uart5grp {
631 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x130b1
632 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x030b1
633 /* RS485 RX Enable: pull up */
634 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b1
635 /* RS485 DEN: pull down */
636 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b1
637 /* RS485/!RS232 Select: pull down (rs232) */
638 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x030b1
640 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x030b1
644 pinctrl_usbh1: usbh1grp {
646 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0b0b0
650 pinctrl_usbotg: usbotggrp {
652 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
653 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
654 /* power enable, high active */
655 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
659 pinctrl_usdhc2: usdhc2grp {
661 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
662 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
663 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
664 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
665 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
666 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
670 pinctrl_usdhc3: usdhc3grp {
672 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
673 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
674 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
675 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
676 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
677 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
678 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x100b0
679 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
683 pinctrl_usdhc4: usdhc4grp {
685 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
686 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
687 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
688 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
689 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
690 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
691 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
692 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
693 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
694 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
698 pinctrl_wlan_vmmc: wlan-vmmcgrp {
700 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
701 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
702 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
703 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
710 remote-endpoint = <&lcd_display_in>;
722 lvds0_out: endpoint {
723 remote-endpoint = <&panel_in_lvds0>;
734 lvds1_out: endpoint {
735 remote-endpoint = <&panel_in_lvds1>;
742 pinctrl-names = "default";
743 pinctrl-0 = <&pinctrl_pcie>;
744 reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>;
750 pinctrl-names = "default";
751 pinctrl-0 = <&pinctrl_pwm1>;
757 pinctrl-names = "default";
758 pinctrl-0 = <&pinctrl_pwm2>;
763 pinctrl-names = "default";
764 pinctrl-0 = <&pinctrl_pwm3>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_pwm4>;
780 pinctrl-names = "default";
781 pinctrl-0 = <&pinctrl_uart1>;
786 pinctrl-names = "default";
787 pinctrl-0 = <&pinctrl_uart2>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_uart5>;
798 vbus-supply = <®_usb_h1_vbus>;
803 vbus-supply = <®_usb_otg_vbus>;
804 pinctrl-names = "default";
805 pinctrl-0 = <&pinctrl_usbotg>;
806 disable-over-current;
811 pinctrl-names = "default";
812 pinctrl-0 = <&pinctrl_usdhc2>;
815 vmmc-supply = <®_wlan_vmmc>;
817 keep-power-in-suspend;
820 #address-cells = <1>;
823 compatible = "ti,wl1271";
825 interrupt-parent = <&gpio6>;
826 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
827 ref-clock-frequency = <38400000>;
832 pinctrl-names = "default";
833 pinctrl-0 = <&pinctrl_usdhc3>;
834 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
836 vmmc-supply = <®_3p3v>;
841 pinctrl-names = "default";
842 pinctrl-0 = <&pinctrl_usdhc4>;
845 vmmc-supply = <®_1p8v>;
846 keep-power-in-suspend;