Merge tag 'for-5.15/io_uring-2021-09-04' of git://git.kernel.dk/linux-block
[linux-2.6-microblaze.git] / arch / arm / boot / dts / imx6qdl-dhcom-pdk2.dtsi
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2015-2021 DH electronics GmbH
4  * Copyright (C) 2018 Marek Vasut <marex@denx.de>
5  */
6
7 #include <dt-bindings/leds/common.h>
8
9 / {
10         chosen {
11                 stdout-path = "serial0:115200n8";
12         };
13
14         clk_ext_audio_codec: clock-codec {
15                 #clock-cells = <0>;
16                 clock-frequency = <24000000>;
17                 compatible = "fixed-clock";
18         };
19
20         display_bl: display-bl {
21                 brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
22                 compatible = "pwm-backlight";
23                 default-brightness-level = <8>;
24                 enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
25                 pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
26                 status = "okay";
27         };
28
29         lcd_display: disp0 {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32                 compatible = "fsl,imx-parallel-display";
33                 interface-pix-fmt = "rgb24";
34                 pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
35                 pinctrl-names = "default";
36                 status = "okay";
37
38                 port@0 {
39                         reg = <0>;
40
41                         lcd_display_in: endpoint {
42                                 remote-endpoint = <&ipu1_di0_disp0>;
43                         };
44                 };
45
46                 port@1 {
47                         reg = <1>;
48
49                         lcd_display_out: endpoint {
50                                 remote-endpoint = <&lcd_panel_in>;
51                         };
52                 };
53         };
54
55         gpio-keys {
56                 #size-cells = <0>;
57                 compatible = "gpio-keys";
58
59                 button-0 {
60                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
61                         label = "TA1-GPIO-A";
62                         linux,code = <KEY_A>;
63                         pinctrl-0 = <&pinctrl_dhcom_a>;
64                         pinctrl-names = "default";
65                         wakeup-source;
66                 };
67
68                 button-1 {
69                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
70                         label = "TA2-GPIO-B";
71                         linux,code = <KEY_B>;
72                         pinctrl-0 = <&pinctrl_dhcom_b>;
73                         pinctrl-names = "default";
74                         wakeup-source;
75                 };
76
77                 button-2 {
78                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
79                         label = "TA3-GPIO-C";
80                         linux,code = <KEY_C>;
81                         pinctrl-0 = <&pinctrl_dhcom_c>;
82                         pinctrl-names = "default";
83                         wakeup-source;
84                 };
85
86                 button-3 {
87                         gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
88                         label = "TA4-GPIO-D";
89                         linux,code = <KEY_D>;
90                         pinctrl-0 = <&pinctrl_dhcom_d>;
91                         pinctrl-names = "default";
92                         wakeup-source;
93                 };
94         };
95
96         led {
97                 compatible = "gpio-leds";
98
99                 /*
100                  * Disable led-5, because GPIO E is
101                  * already used as touch interrupt.
102                  */
103                 led-5 {
104                         color = <LED_COLOR_ID_GREEN>;
105                         default-state = "off";
106                         function = LED_FUNCTION_INDICATOR;
107                         gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
108                         pinctrl-0 = <&pinctrl_dhcom_e>;
109                         pinctrl-names = "default";
110                         status = "disabled";
111                 };
112
113                 led-6 {
114                         color = <LED_COLOR_ID_GREEN>;
115                         default-state = "off";
116                         function = LED_FUNCTION_INDICATOR;
117                         gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
118                         pinctrl-0 = <&pinctrl_dhcom_f>;
119                         pinctrl-names = "default";
120                 };
121
122                 led-7 {
123                         color = <LED_COLOR_ID_GREEN>;
124                         default-state = "off";
125                         function = LED_FUNCTION_INDICATOR;
126                         gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
127                         pinctrl-0 = <&pinctrl_dhcom_h>;
128                         pinctrl-names = "default";
129                 };
130
131                 led-8 {
132                         color = <LED_COLOR_ID_GREEN>;
133                         default-state = "off";
134                         function = LED_FUNCTION_INDICATOR;
135                         gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
136                         pinctrl-0 = <&pinctrl_dhcom_i>;
137                         pinctrl-names = "default";
138                 };
139         };
140
141         panel {
142                 backlight = <&display_bl>;
143                 compatible = "edt,etm0700g0edh6";
144
145                 port {
146                         lcd_panel_in: endpoint {
147                                 remote-endpoint = <&lcd_display_out>;
148                         };
149                 };
150         };
151
152         sound {
153                 audio-codec = <&sgtl5000>;
154                 audio-routing =
155                         "MIC_IN", "Mic Jack",
156                         "Mic Jack", "Mic Bias",
157                         "LINE_IN", "Line In Jack",
158                         "Headphone Jack", "HP_OUT";
159                 compatible = "fsl,imx-audio-sgtl5000";
160                 model = "imx-sgtl5000";
161                 mux-ext-port = <3>;
162                 mux-int-port = <1>;
163                 ssi-controller = <&ssi1>;
164         };
165 };
166
167 &audmux {
168         pinctrl-0 = <&pinctrl_audmux_ext>;
169         pinctrl-names = "default";
170         status = "okay";
171 };
172
173 &can1 {
174         status = "okay";
175 };
176
177 &can2 {
178         status = "disabled";
179 };
180
181 /* 1G ethernet */
182 /delete-node/ &ethphy0;
183 &fec {
184         phy-mode = "rgmii";
185         phy-handle = <&ethphy7>;
186         pinctrl-0 = <&pinctrl_enet_1G>;
187         pinctrl-names = "default";
188         status = "okay";
189
190         mdio {
191                 #address-cells = <1>;
192                 #size-cells = <0>;
193
194                 ethphy7: ethernet-phy@7 { /* KSZ 9021 */
195                         compatible = "ethernet-phy-ieee802.3-c22";
196                         interrupt-parent = <&gpio1>;
197                         interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
198                         pinctrl-0 = <&pinctrl_ethphy7>;
199                         pinctrl-names = "default";
200                         reg = <7>;
201                         reset-assert-us = <1000>;
202                         reset-deassert-us = <1000>;
203                         reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
204                         rxc-skew-ps = <3000>;
205                         rxd0-skew-ps = <0>;
206                         rxd1-skew-ps = <0>;
207                         rxd2-skew-ps = <0>;
208                         rxd3-skew-ps = <0>;
209                         rxdv-skew-ps = <0>;
210                         txc-skew-ps = <3000>;
211                         txd0-skew-ps = <0>;
212                         txd1-skew-ps = <0>;
213                         txd2-skew-ps = <0>;
214                         txd3-skew-ps = <0>;
215                         txen-skew-ps = <0>;
216                 };
217         };
218 };
219
220 &hdmi {
221         ddc-i2c-bus = <&i2c2>;
222         status = "okay";
223 };
224
225 &i2c2 {
226         sgtl5000: codec@a {
227                 #sound-dai-cells = <0>;
228                 clocks = <&clk_ext_audio_codec>;
229                 compatible = "fsl,sgtl5000";
230                 reg = <0x0a>;
231                 VDDA-supply = <&reg_3p3v>;
232                 VDDIO-supply = <&sw2_reg>;
233         };
234
235         touchscreen@38 {
236                 compatible = "edt,edt-ft5406";
237                 interrupt-parent = <&gpio4>;
238                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
239                 pinctrl-0 = <&pinctrl_dhcom_e>;
240                 pinctrl-names = "default";
241                 reg = <0x38>;
242         };
243 };
244
245 &ipu1_di0_disp0 {
246         remote-endpoint = <&lcd_display_in>;
247 };
248
249 &pcie {
250         pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
251         reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
252         status = "okay";
253 };
254
255 &pwm1 {
256         status = "okay";
257 };
258
259 &ssi1 {
260         status = "okay";
261 };
262
263 &usdhc2 { /* SD card */
264         status = "okay";
265 };
266
267 &iomuxc {
268         pinctrl-0 = <
269                         /*
270                          * The following DHCOM GPIOs are used on this board.
271                          * Therefore, they have been removed from the list below.
272                          * A: key TA1
273                          * B: key TA2
274                          * C: key TA3
275                          * D: key TA4
276                          * E: touchscreen
277                          * F: led6
278                          * G: backlight enable
279                          * H: led7
280                          * I: led8
281                          * J: PCIe reset
282                          */
283                         &pinctrl_hog_base
284                         &pinctrl_dhcom_k &pinctrl_dhcom_l
285                         &pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
286                         &pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
287                         &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
288                         &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
289                 >;
290         pinctrl-names = "default";
291
292         pinctrl_audmux_ext: audmux-ext-grp {
293                 fsl,pins = <
294                         MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
295                         MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
296                         MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
297                         MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
298                 >;
299         };
300
301         pinctrl_enet_1G: enet-1G-grp {
302                 fsl,pins = <
303                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
304                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
305                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
306                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
307                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
308                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
309                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
310                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
311                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
312                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
313                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
314                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
315                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
316                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
317                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
318                 >;
319         };
320
321         pinctrl_ethphy7: ethphy7-grp {
322                 fsl,pins = <
323                         MX6QDL_PAD_EIM_D26__GPIO3_IO26          0xb1 /* WOL */
324                         MX6QDL_PAD_EIM_D29__GPIO3_IO29          0xb0 /* Reset */
325                         MX6QDL_PAD_GPIO_0__GPIO1_IO00           0xb1 /* Int */
326                 >;
327         };
328
329         pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
330                 fsl,pins = <
331                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x38
332                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x38
333                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x38
334                         MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15            0x38
335                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x38
336                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x38
337                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x38
338                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x38
339                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x38
340                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x38
341                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x38
342                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x38
343                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x38
344                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x38
345                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x38
346                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x38
347                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x38
348                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x38
349                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x38
350                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x38
351                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x38
352                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x38
353                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18       0x38
354                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19       0x38
355                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20       0x38
356                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21       0x38
357                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22       0x38
358                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23       0x38
359                 >;
360         };
361 };