arch/arm/boot/dts/imx6qdl-dhcom-drc02.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2021 DH electronics GmbH
   4  */
   5
   6 / {
   7         chosen {
   8                 stdout-path = "serial0:115200n8";
   9         };
  10 };
  11
  12 /*
  13  * Special SoM hardware required which uses the pins from micro SD card. The
  14  * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
  15  * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
  16  * card must be disabled and the uart1 rts/cts must be output on other DHCOM
  17  * pins, see uart1 and usdhc3 node below.
  18  */
  19 &can2 {
  20         status = "okay";
  21 };
  22
  23 &gpio1 {
  24         /*
  25          * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
  26          * GPIO line, however the i.MX6 UART driver assumes RX happens
  27          * during TX anyway and that it only controls drive enable DE
  28          * line. Hence, the RX is always enabled here.
  29          */
  30         rs485-rx-en-hog {
  31                 gpio-hog;
  32                 gpios = <18 0>; /* GPIO Q */
  33                 line-name = "rs485-rx-en";
  34                 output-low;
  35         };
  36 };
  37
  38 &gpio3 {
  39         gpio-line-names =
  40                 "", "", "", "", "", "", "", "",
  41                 "", "", "", "", "", "", "", "",
  42                 "", "", "", "", "", "", "", "",
  43                 "", "", "", "DRC02-In1", "", "", "", "";
  44 };
  45
  46 &gpio4 {
  47         gpio-line-names =
  48                 "", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
  49                 "DHCOM-I", "DRC02-HW0", "", "", "", "", "", "",
  50                 "", "", "", "", "DRC02-Out1", "", "", "",
  51                 "", "", "", "", "", "", "", "";
  52 };
  53
  54 &gpio6 {
  55         gpio-line-names =
  56                 "", "", "", "DRC02-Out2", "", "", "SOM-HW1", "",
  57                 "", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1",
  58                 "", "", "", "", "", "", "", "",
  59                 "", "", "", "", "", "", "", "";
  60 };
  61
  62 &i2c1 {
  63         eeprom@50 {
  64                 compatible = "atmel,24c04";
  65                 reg = <0x50>;
  66                 pagesize = <16>;
  67         };
  68 };
  69
  70 &uart1 {
  71         /*
  72          * Due to the use of can2 the signals for can2 Tx and Rx are routed to
  73          * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
  74          * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
  75          */
  76         /delete-property/ uart-has-rtscts;
  77         cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
  78         pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>;
  79         pinctrl-names = "default";
  80         rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
  81 };
  82
  83 &uart5 {
  84         /*
  85          * On DRC02 this UART is used as RS485 interface and RS485_TX_En is
  86          * controlled by DHCOM GPIO P. So remove rts/cts pins and the property
  87          * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
  88          * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
  89          * node above.
  90          */
  91         /delete-property/ uart-has-rtscts;
  92         linux,rs485-enabled-at-boot-time;
  93         pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>;
  94         pinctrl-names = "default";
  95         rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
  96 };
  97
  98 &usdhc2 { /* SD card */
  99         status = "okay";
 100 };
 101
 102 &usdhc3 {
 103         /*
 104          * Due to the use of can2 the micro SD card on module have to be
 105          * disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
 106          * can2 Tx and Rx.
 107          */
 108         status = "disabled";
 109 };
 110
 111 &iomuxc {
 112         pinctrl-0 = <
 113                         /*
 114                          * The following DHCOM GPIOs are used on this board.
 115                          * Therefore, they have been removed from the list below.
 116                          * I: uart1 rts
 117                          * M: uart1 cts
 118                          * P: uart5 rs485-tx-en
 119                          * Q: uart5 rs485-rx-en
 120                          */
 121                         &pinctrl_hog_base
 122                         &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
 123                         &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
 124                         &pinctrl_dhcom_g &pinctrl_dhcom_h
 125                         &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
 126                         &pinctrl_dhcom_n &pinctrl_dhcom_o
 127                         &pinctrl_dhcom_r
 128                         &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
 129                         &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
 130                 >;
 131         pinctrl-names = "default";
 132
 133         pinctrl_uart5_core: uart5-core-grp {
 134                 fsl,pins = <
 135                         MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA    0x1b0b1
 136                         MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x1b0b1
 137                 >;
 138         };
 139 };