arch/arm/boot/dts/imx6dl-yapp4-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/interrupt-controller/irq.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/pwm/pwm.h>
   9
  10 / {
  11         aliases: aliases {
  12                 ethernet1 = &eth1;
  13                 ethernet2 = &eth2;
  14                 mmc0 = &usdhc3;
  15                 mmc1 = &usdhc4;
  16         };
  17
  18         backlight: backlight {
  19                 compatible = "pwm-backlight";
  20                 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
  21                 brightness-levels = <0 32 64 128 255>;
  22                 default-brightness-level = <32>;
  23                 num-interpolated-steps = <8>;
  24                 power-supply = <&sw2_reg>;
  25                 status = "disabled";
  26         };
  27
  28         lcd_display: display {
  29                 compatible = "fsl,imx-parallel-display";
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32                 interface-pix-fmt = "rgb24";
  33                 pinctrl-names = "default";
  34                 pinctrl-0 = <&pinctrl_ipu1>;
  35                 status = "disabled";
  36
  37                 port@0 {
  38                         reg = <0>;
  39
  40                         lcd_display_in: endpoint {
  41                                 remote-endpoint = <&ipu1_di0_disp0>;
  42                         };
  43                 };
  44
  45                 port@1 {
  46                         reg = <1>;
  47
  48                         lcd_display_out: endpoint {
  49                                 remote-endpoint = <&lcd_panel_in>;
  50                         };
  51                 };
  52         };
  53
  54         panel: panel {
  55                 compatible = "dataimage,scf0700c48ggu18";
  56                 power-supply = <&sw2_reg>;
  57                 status = "disabled";
  58
  59                 port {
  60                         lcd_panel_in: endpoint {
  61                                 remote-endpoint = <&lcd_display_out>;
  62                         };
  63                 };
  64         };
  65
  66         reg_pcie: regulator-pcie {
  67                 compatible = "regulator-fixed";
  68                 pinctrl-names = "default";
  69                 pinctrl-0 = <&pinctrl_pcie_reg>;
  70                 regulator-name = "MPCIE_3V3";
  71                 regulator-min-microvolt = <3300000>;
  72                 regulator-max-microvolt = <3300000>;
  73                 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  74                 enable-active-high;
  75                 status = "disabled";
  76         };
  77
  78         reg_usb_h1_vbus: regulator-usb-h1-vbus {
  79                 compatible = "regulator-fixed";
  80                 pinctrl-names = "default";
  81                 pinctrl-0 = <&pinctrl_usbh1_vbus>;
  82                 regulator-name = "usb_h1_vbus";
  83                 regulator-min-microvolt = <5000000>;
  84                 regulator-max-microvolt = <5000000>;
  85                 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
  86                 enable-active-high;
  87                 status = "disabled";
  88         };
  89
  90         reg_usb_otg_vbus: regulator-usb-otg-vbus {
  91                 compatible = "regulator-fixed";
  92                 pinctrl-names = "default";
  93                 pinctrl-0 = <&pinctrl_usbotg_vbus>;
  94                 regulator-name = "usb_otg_vbus";
  95                 regulator-min-microvolt = <5000000>;
  96                 regulator-max-microvolt = <5000000>;
  97                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  98                 enable-active-high;
  99                 status = "okay";
 100         };
 101 };
 102
 103 &fec {
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_enet>;
 106         phy-mode = "rgmii-id";
 107         phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 108         phy-reset-duration = <20>;
 109         phy-supply = <&sw2_reg>;
 110         status = "okay";
 111
 112         fixed-link {
 113                 speed = <1000>;
 114                 full-duplex;
 115         };
 116
 117         mdio {
 118                 #address-cells = <1>;
 119                 #size-cells = <0>;
 120
 121                 phy_port2: phy@1 {
 122                         reg = <1>;
 123                 };
 124
 125                 phy_port3: phy@2 {
 126                         reg = <2>;
 127                 };
 128
 129                 switch@10 {
 130                         compatible = "qca,qca8334";
 131                         reg = <10>;
 132
 133                         switch_ports: ports {
 134                                 #address-cells = <1>;
 135                                 #size-cells = <0>;
 136
 137                                 ethphy0: port@0 {
 138                                         reg = <0>;
 139                                         label = "cpu";
 140                                         phy-mode = "rgmii-id";
 141                                         ethernet = <&fec>;
 142
 143                                         fixed-link {
 144                                                 speed = <1000>;
 145                                                 full-duplex;
 146                                         };
 147                                 };
 148
 149                                 eth2: port@2 {
 150                                         reg = <2>;
 151                                         label = "eth2";
 152                                         phy-handle = <&phy_port2>;
 153                                 };
 154
 155                                 eth1: port@3 {
 156                                         reg = <3>;
 157                                         label = "eth1";
 158                                         phy-handle = <&phy_port3>;
 159                                 };
 160                         };
 161                 };
 162         };
 163 };
 164
 165 &hdmi {
 166         pinctrl-names = "default";
 167         pinctrl-0 = <&pinctrl_hdmi_cec>;
 168         ddc-i2c-bus = <&i2c2>;
 169         status = "disabled";
 170 };
 171
 172 &i2c2 {
 173         clock-frequency = <100000>;
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_i2c2>;
 176         status = "okay";
 177
 178         pmic@8 {
 179                 compatible = "fsl,pfuze200";
 180                 pinctrl-names = "default";
 181                 pinctrl-0 = <&pinctrl_pmic>;
 182                 reg = <0x8>;
 183
 184                 regulators {
 185                         sw1a_reg: sw1ab {
 186                                 regulator-min-microvolt = <300000>;
 187                                 regulator-max-microvolt = <1875000>;
 188                                 regulator-boot-on;
 189                                 regulator-always-on;
 190                                 regulator-ramp-delay = <6250>;
 191                         };
 192
 193                         sw2_reg: sw2 {
 194                                 regulator-min-microvolt = <800000>;
 195                                 regulator-max-microvolt = <3300000>;
 196                                 regulator-boot-on;
 197                                 regulator-always-on;
 198                         };
 199
 200                         sw3a_reg: sw3a {
 201                                 regulator-min-microvolt = <400000>;
 202                                 regulator-max-microvolt = <1975000>;
 203                                 regulator-boot-on;
 204                                 regulator-always-on;
 205                         };
 206
 207                         sw3b_reg: sw3b {
 208                                 regulator-min-microvolt = <400000>;
 209                                 regulator-max-microvolt = <1975000>;
 210                                 regulator-boot-on;
 211                                 regulator-always-on;
 212                         };
 213
 214                         swbst_reg: swbst {
 215                                 regulator-min-microvolt = <5000000>;
 216                                 regulator-max-microvolt = <5150000>;
 217                         };
 218
 219                         vgen1_reg: vgen1 {
 220                                 regulator-min-microvolt = <800000>;
 221                                 regulator-max-microvolt = <1550000>;
 222                         };
 223
 224                         vgen2_reg: vgen2 {
 225                                 regulator-min-microvolt = <800000>;
 226                                 regulator-max-microvolt = <1550000>;
 227                         };
 228
 229                         vgen3_reg: vgen3 {
 230                                 regulator-min-microvolt = <1800000>;
 231                                 regulator-max-microvolt = <3300000>;
 232                                 regulator-always-on;
 233                         };
 234
 235                         vgen4_reg: vgen4 {
 236                                 regulator-min-microvolt = <1800000>;
 237                                 regulator-max-microvolt = <3300000>;
 238                                 regulator-always-on;
 239                         };
 240
 241                         vgen5_reg: vgen5 {
 242                                 regulator-min-microvolt = <1800000>;
 243                                 regulator-max-microvolt = <3300000>;
 244                                 regulator-always-on;
 245                         };
 246
 247                         vgen6_reg: vgen6 {
 248                                 regulator-min-microvolt = <1800000>;
 249                                 regulator-max-microvolt = <3300000>;
 250                                 regulator-always-on;
 251                         };
 252
 253                         vref_reg: vrefddr {
 254                                 regulator-boot-on;
 255                                 regulator-always-on;
 256                         };
 257
 258                         vsnvs_reg: vsnvs {
 259                                 regulator-min-microvolt = <1000000>;
 260                                 regulator-max-microvolt = <3000000>;
 261                                 regulator-boot-on;
 262                                 regulator-always-on;
 263                         };
 264                 };
 265         };
 266
 267         leds: led-controller@30 {
 268                 compatible = "ti,lp5562";
 269                 reg = <0x30>;
 270                 clock-mode = /bits/ 8 <1>;
 271                 status = "disabled";
 272                 #address-cells = <1>;
 273                 #size-cells = <0>;
 274
 275                 chan@0 {
 276                         chan-name = "R";
 277                         led-cur = /bits/ 8 <0x20>;
 278                         max-cur = /bits/ 8 <0x60>;
 279                         reg = <0>;
 280                 };
 281
 282                 chan@1 {
 283                         chan-name = "G";
 284                         led-cur = /bits/ 8 <0x20>;
 285                         max-cur = /bits/ 8 <0x60>;
 286                         reg = <1>;
 287                 };
 288
 289                 chan@2 {
 290                         chan-name = "B";
 291                         led-cur = /bits/ 8 <0x20>;
 292                         max-cur = /bits/ 8 <0x60>;
 293                         reg = <2>;
 294                 };
 295
 296                 chan@3 {
 297                         chan-name = "W";
 298                         led-cur = /bits/ 8 <0x0>;
 299                         max-cur = /bits/ 8 <0x0>;
 300                         reg = <3>;
 301                 };
 302         };
 303
 304         eeprom@57 {
 305                 compatible = "atmel,24c128";
 306                 reg = <0x57>;
 307                 pagesize = <64>;
 308                 status = "okay";
 309         };
 310
 311         touchscreen: touchscreen@5c {
 312                 compatible = "pixcir,pixcir_tangoc";
 313                 reg = <0x5c>;
 314                 pinctrl-0 = <&pinctrl_touch>;
 315                 interrupt-parent = <&gpio4>;
 316                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
 317                 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
 318                 reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 319                 touchscreen-size-x = <800>;
 320                 touchscreen-size-y = <480>;
 321                 status = "disabled";
 322         };
 323 };
 324
 325 &i2c3 {
 326         clock-frequency = <100000>;
 327         pinctrl-names = "default";
 328         pinctrl-0 = <&pinctrl_i2c3>;
 329         status = "okay";
 330
 331         oled_1309: oled@3c {
 332                 compatible = "solomon,ssd1309fb-i2c";
 333                 reg = <0x3c>;
 334                 solomon,height = <64>;
 335                 solomon,width = <128>;
 336                 solomon,page-offset = <0>;
 337                 solomon,segment-no-remap;
 338                 solomon,prechargep2 = <15>;
 339                 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
 340                 vbat-supply = <&sw2_reg>;
 341                 status = "disabled";
 342         };
 343
 344         oled_1305: oled@3d {
 345                 compatible = "solomon,ssd1305fb-i2c";
 346                 reg = <0x3d>;
 347                 solomon,height = <64>;
 348                 solomon,width = <128>;
 349                 solomon,page-offset = <0>;
 350                 solomon,col-offset = <4>;
 351                 solomon,prechargep2 = <15>;
 352                 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
 353                 vbat-supply = <&sw2_reg>;
 354                 status = "disabled";
 355         };
 356
 357         gpio_oled: gpio@41 {
 358                 compatible = "nxp,pca9536";
 359                 gpio-controller;
 360                 #gpio-cells = <2>;
 361                 reg = <0x41>;
 362                 vcc-supply = <&sw2_reg>;
 363                 status = "disabled";
 364         };
 365
 366         touchkeys: keys@5a {
 367                 compatible = "fsl,mpr121-touchkey";
 368                 reg = <0x5a>;
 369                 vdd-supply = <&sw2_reg>;
 370                 autorepeat;
 371                 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
 372                                 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
 373                                 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
 374                 poll-interval = <50>;
 375                 status = "disabled";
 376         };
 377 };
 378
 379 &iomuxc {
 380         pinctrl_enet: enetgrp {
 381                 fsl,pins = <
 382                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b020
 383                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b020
 384                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b020
 385                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b020
 386                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b020
 387                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b020
 388                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b020
 389                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b020
 390                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b020
 391                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b020
 392                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b020
 393                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b020
 394                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b020
 395                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b020
 396                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b010
 397                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x1b010
 398                         MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b098
 399                 >;
 400         };
 401
 402         pinctrl_hdmi_cec: hdmicecgrp {
 403                 fsl,pins = <
 404                         MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE    0x1b898
 405                 >;
 406         };
 407
 408         pinctrl_i2c2: i2c2grp {
 409                 fsl,pins = <
 410                         MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b899
 411                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b899
 412                 >;
 413         };
 414
 415         pinctrl_i2c3: i2c3grp {
 416                 fsl,pins = <
 417                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b899
 418                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b899
 419                 >;
 420         };
 421
 422         pinctrl_ipu1: ipu1grp {
 423                 fsl,pins = <
 424                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x10
 425                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x10
 426                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x10
 427                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x10
 428                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x10
 429                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x10
 430                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x10
 431                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x10
 432                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x10
 433                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x10
 434                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x10
 435                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x10
 436                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x10
 437                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x10
 438                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x10
 439                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x10
 440                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x10
 441                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x10
 442                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x10
 443                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x10
 444                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x10
 445                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18       0x10
 446                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19       0x10
 447                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20       0x10
 448                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21       0x10
 449                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22       0x10
 450                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23       0x10
 451                 >;
 452         };
 453
 454         pinctrl_pcie: pciegrp {
 455                 fsl,pins = <
 456                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x1b098
 457                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b098
 458                         MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20     0x1b098
 459                 >;
 460         };
 461
 462         pinctrl_pcie_reg: pciereggrp {
 463                 fsl,pins = <
 464                         MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x1b098
 465                 >;
 466         };
 467
 468         pinctrl_pmic: pmicgrp {
 469                 fsl,pins = <
 470                         MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b098
 471                 >;
 472         };
 473
 474         pinctrl_pwm1: pwm1grp {
 475                 fsl,pins = <
 476                         MX6QDL_PAD_GPIO_9__PWM1_OUT     0x8
 477                 >;
 478         };
 479
 480         pinctrl_touch: touchgrp {
 481                 fsl,pins = <
 482                         MX6QDL_PAD_GPIO_19__GPIO4_IO05  0x1b098
 483                         MX6QDL_PAD_GPIO_2__GPIO1_IO02   0x1b098
 484                 >;
 485         };
 486
 487         pinctrl_uart1: uart1grp {
 488                 fsl,pins = <
 489                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0a8
 490                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0a8
 491                 >;
 492         };
 493
 494         pinctrl_uart2: uart2grp {
 495                 fsl,pins = <
 496                         MX6QDL_PAD_GPIO_7__UART2_TX_DATA        0x1b098
 497                         MX6QDL_PAD_GPIO_8__UART2_RX_DATA        0x1b098
 498                 >;
 499         };
 500
 501         pinctrl_usbh1: usbh1grp {
 502                 fsl,pins = <
 503                         MX6QDL_PAD_EIM_D30__USB_H1_OC   0x1b098
 504                 >;
 505         };
 506
 507         pinctrl_usbh1_vbus: usbh1-vbus {
 508                 fsl,pins = <
 509                         MX6QDL_PAD_ENET_TXD1__GPIO1_IO29        0x98
 510                 >;
 511         };
 512
 513         pinctrl_usbotg: usbotggrp {
 514                 fsl,pins = <
 515                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x1b098
 516                         MX6QDL_PAD_EIM_D21__USB_OTG_OC          0x1b098
 517                 >;
 518         };
 519
 520         pinctrl_usbotg_vbus: usbotg-vbus {
 521                 fsl,pins = <
 522                         MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x98
 523                 >;
 524         };
 525
 526         pinctrl_usdhc3: usdhc3grp {
 527                 fsl,pins = <
 528                         MX6QDL_PAD_EIM_A16__GPIO2_IO22  0x1b018
 529                         MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x1b018
 530                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 531                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 532                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 533                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 534                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 535                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 536                 >;
 537         };
 538
 539         pinctrl_usdhc4: usdhc4grp {
 540                 fsl,pins = <
 541                         MX6QDL_PAD_SD4_CMD__SD4_CMD     0x1f069
 542                         MX6QDL_PAD_SD4_CLK__SD4_CLK     0x10069
 543                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0  0x17069
 544                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1  0x17069
 545                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2  0x17069
 546                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3  0x17069
 547                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4  0x17069
 548                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5  0x17069
 549                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6  0x17069
 550                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7  0x17069
 551                 >;
 552         };
 553
 554         pinctrl_wdog: wdoggrp {
 555                 fsl,pins = <
 556                         MX6QDL_PAD_GPIO_1__WDOG2_B      0x1b0b0
 557                 >;
 558         };
 559 };
 560
 561 &ipu1_di0_disp0 {
 562         remote-endpoint = <&lcd_display_in>;
 563 };
 564
 565 &pcie {
 566         pinctrl-names = "default";
 567         pinctrl-0 = <&pinctrl_pcie>;
 568         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
 569         vpcie-supply = <&reg_pcie>;
 570         status = "disabled";
 571 };
 572
 573 &pwm1 {
 574         pinctrl-names = "default";
 575         pinctrl-0 = <&pinctrl_pwm1>;
 576         status = "disabled";
 577 };
 578
 579 &uart1 {
 580         pinctrl-names = "default";
 581         pinctrl-0 = <&pinctrl_uart1>;
 582         status = "okay";
 583 };
 584
 585 &uart2 {
 586         pinctrl-names = "default";
 587         pinctrl-0 = <&pinctrl_uart2>;
 588         status = "okay";
 589 };
 590
 591 &usbh1 {
 592         pinctrl-names = "default";
 593         pinctrl-0 = <&pinctrl_usbh1>;
 594         vbus-supply = <&reg_usb_h1_vbus>;
 595         over-current-active-low;
 596         status = "disabled";
 597 };
 598
 599 &usbotg {
 600         pinctrl-names = "default";
 601         pinctrl-0 = <&pinctrl_usbotg>;
 602         vbus-supply = <&reg_usb_otg_vbus>;
 603         over-current-active-low;
 604         srp-disable;
 605         hnp-disable;
 606         adp-disable;
 607         status = "okay";
 608 };
 609
 610 &usbphy1 {
 611         fsl,tx-d-cal = <106>;
 612         status = "okay";
 613 };
 614
 615 &usbphy2 {
 616         fsl,tx-d-cal = <109>;
 617         status = "disabled";
 618 };
 619
 620 &usdhc3 {
 621         pinctrl-names = "default";
 622         pinctrl-0 = <&pinctrl_usdhc3>;
 623         bus-width = <4>;
 624         cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
 625         wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
 626         no-1-8-v;
 627         keep-power-in-suspend;
 628         wakeup-source;
 629         vmmc-supply = <&sw2_reg>;
 630         status = "disabled";
 631 };
 632
 633 &usdhc4 {
 634         pinctrl-names = "default";
 635         pinctrl-0 = <&pinctrl_usdhc4>;
 636         bus-width = <8>;
 637         non-removable;
 638         no-1-8-v;
 639         keep-power-in-suspend;
 640         vmmc-supply = <&sw2_reg>;
 641         status = "okay";
 642 };
 643
 644 &wdog1 {
 645         status = "disabled";
 646 };
 647
 648 &wdog2 {
 649         pinctrl-names = "default";
 650         pinctrl-0 = <&pinctrl_wdog>;
 651         fsl,ext-reset-output;
 652         status = "okay";
 653 };