arch/arm/boot/dts/imx6dl-plym2m.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2014 Protonic Holland
   4  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/leds/common.h>
  10 #include "imx6dl.dtsi"
  11
  12 / {
  13         model = "Plymovent M2M board";
  14         compatible = "ply,plym2m", "fsl,imx6dl";
  15
  16         chosen {
  17                 stdout-path = &uart4;
  18         };
  19
  20         backlight: backlight {
  21                 compatible = "pwm-backlight";
  22                 pwms = <&pwm1 0 5000000 0>;
  23                 brightness-levels = <0 1000>;
  24                 num-interpolated-steps = <20>;
  25                 default-brightness-level = <19>;
  26                 power-supply = <&reg_12v0>;
  27         };
  28
  29         display {
  30                 compatible = "fsl,imx-parallel-display";
  31                 pinctrl-0 = <&pinctrl_ipu1_disp>;
  32                 pinctrl-names = "default";
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 port@0 {
  37                         reg = <0>;
  38
  39                         display_in: endpoint {
  40                                 remote-endpoint = <&ipu1_di0_disp0>;
  41                         };
  42                 };
  43
  44                 port@1 {
  45                         reg = <1>;
  46
  47                         display_out: endpoint {
  48                                 remote-endpoint = <&panel_in>;
  49                         };
  50                 };
  51         };
  52
  53         leds {
  54                 compatible = "gpio-leds";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&pinctrl_leds>;
  57
  58                 led-0 {
  59                         label = "debug0";
  60                         function = LED_FUNCTION_STATUS;
  61                         gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  62                         linux,default-trigger = "heartbeat";
  63                 };
  64         };
  65
  66         panel {
  67                 compatible = "edt,etm0700g0bdh6";
  68                 backlight = <&backlight>;
  69                 power-supply = <&reg_3v3>;
  70
  71                 port {
  72                         panel_in: endpoint {
  73                                 remote-endpoint = <&display_out>;
  74                         };
  75                 };
  76         };
  77
  78         clk50m_phy: phy-clock {
  79                 compatible = "fixed-clock";
  80                 #clock-cells = <0>;
  81                 clock-frequency = <50000000>;
  82         };
  83
  84         reg_3v3: regulator-3v3 {
  85                 compatible = "regulator-fixed";
  86                 regulator-name = "3v3";
  87                 regulator-min-microvolt = <3300000>;
  88                 regulator-max-microvolt = <3300000>;
  89         };
  90
  91         reg_5v0: regulator-5v0 {
  92                 compatible = "regulator-fixed";
  93                 regulator-name = "5v0";
  94                 regulator-min-microvolt = <5000000>;
  95                 regulator-max-microvolt = <5000000>;
  96         };
  97
  98         reg_12v0: regulator-12v0 {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "12v0";
 101                 regulator-min-microvolt = <12000000>;
 102                 regulator-max-microvolt = <12000000>;
 103         };
 104 };
 105
 106 &can1 {
 107         pinctrl-names = "default";
 108         pinctrl-0 = <&pinctrl_can1>;
 109         xceiver-supply = <&reg_5v0>;
 110         status = "okay";
 111 };
 112
 113 &ecspi1 {
 114         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 115         pinctrl-names = "default";
 116         pinctrl-0 = <&pinctrl_ecspi1>;
 117         status = "okay";
 118
 119         flash@0 {
 120                 compatible = "jedec,spi-nor";
 121                 reg = <0>;
 122                 spi-max-frequency = <20000000>;
 123         };
 124 };
 125
 126 &ecspi2 {
 127         cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
 128         pinctrl-names = "default";
 129         pinctrl-0 = <&pinctrl_ecspi2>;
 130         status = "okay";
 131
 132         touchscreen@0 {
 133                 compatible = "ti,tsc2046";
 134                 reg = <0>;
 135                 pinctrl-0 = <&pinctrl_tsc2046>;
 136                 pinctrl-names ="default";
 137                 spi-max-frequency = <100000>;
 138                 interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
 139                 pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
 140
 141                 touchscreen-inverted-x;
 142                 touchscreen-inverted-y;
 143                 touchscreen-max-pressure = <4095>;
 144
 145                 ti,vref-delay-usecs = /bits/ 16 <100>;
 146                 ti,x-plate-ohms = /bits/ 16 <800>;
 147                 ti,y-plate-ohms = /bits/ 16 <300>;
 148                 ti,debounce-max = /bits/ 16 <3>;
 149                 ti,debounce-tol = /bits/ 16 <70>;
 150                 ti,debounce-rep = /bits/ 16 <3>;
 151                 wakeup-source;
 152         };
 153 };
 154
 155 &fec {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&pinctrl_enet>;
 158         phy-mode = "rmii";
 159         clocks = <&clks IMX6QDL_CLK_ENET>,
 160                  <&clks IMX6QDL_CLK_ENET>,
 161                  <&clk50m_phy>;
 162         clock-names = "ipg", "ahb", "ptp";
 163         phy-handle = <&rgmii_phy>;
 164         status = "okay";
 165
 166         mdio {
 167                 #address-cells = <1>;
 168                 #size-cells = <0>;
 169
 170                 /* Microchip KSZ8081RNA PHY */
 171                 rgmii_phy: ethernet-phy@0 {
 172                         reg = <0>;
 173                         interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
 174                         reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
 175                         reset-assert-us = <10000>;
 176                         reset-deassert-us = <300>;
 177                 };
 178         };
 179 };
 180
 181 &gpio1 {
 182         gpio-line-names =
 183                 "CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
 184                 "DEBUG_0", "", "", "", "", "", "", "",
 185                 "", "", "", "", "", "", "", "",
 186                 "", "", "", "", "", "", "", "";
 187 };
 188
 189 &gpio2 {
 190         gpio-line-names =
 191                 "", "", "", "", "", "", "", "",
 192                 "", "", "", "", "", "", "", "",
 193                 "", "", "", "", "", "", "", "",
 194                 "", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
 195 };
 196
 197 &gpio3 {
 198         gpio-line-names =
 199                 "", "", "", "", "", "", "", "",
 200                 "", "", "", "", "", "", "", "",
 201                 "", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
 202                 "", "", "", "", "", "", "", "";
 203 };
 204
 205 &gpio4 {
 206         gpio-line-names =
 207                 "", "", "", "", "", "", "", "",
 208                 "", "", "", "", "CAN1_SR", "", "", "",
 209                 "", "", "", "", "", "", "", "",
 210                 "", "", "", "", "", "", "", "";
 211 };
 212
 213 &gpio5 {
 214         gpio-line-names =
 215                 "", "", "", "", "", "", "", "",
 216                 "", "", "", "", "", "", "", "",
 217                 "", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
 218                 "", "", "", "", "", "", "", "";
 219 };
 220
 221 &i2c1 {
 222         clock-frequency = <100000>;
 223         pinctrl-names = "default";
 224         pinctrl-0 = <&pinctrl_i2c1>;
 225         status = "okay";
 226
 227         /* additional i2c devices are added automatically by the boot loader */
 228 };
 229
 230 &i2c3 {
 231         clock-frequency = <100000>;
 232         pinctrl-names = "default";
 233         pinctrl-0 = <&pinctrl_i2c3>;
 234         status = "okay";
 235
 236         temperature-sensor@70 {
 237                 compatible = "ti,tmp103";
 238                 reg = <0x70>;
 239         };
 240 };
 241
 242 &ipu1_di0_disp0 {
 243         remote-endpoint = <&display_in>;
 244 };
 245
 246 &pwm1 {
 247         pinctrl-names = "default";
 248         pinctrl-0 = <&pinctrl_pwm1>;
 249         status = "okay";
 250 };
 251
 252 &uart4 {
 253         pinctrl-names = "default";
 254         pinctrl-0 = <&pinctrl_uart4>;
 255         status = "okay";
 256 };
 257
 258 &usbphynop1 {
 259         status = "disabled";
 260 };
 261
 262 &usbphynop2 {
 263         status = "disabled";
 264 };
 265
 266 &usbotg {
 267         phy_type = "utmi";
 268         dr_mode = "host";
 269         disable-over-current;
 270         status = "okay";
 271 };
 272
 273 &usdhc1 {
 274         pinctrl-names = "default";
 275         pinctrl-0 = <&pinctrl_usdhc1>;
 276         cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 277         no-1-8-v;
 278         disable-wp;
 279         cap-sd-highspeed;
 280         no-mmc;
 281         no-sdio;
 282         status = "okay";
 283 };
 284
 285 &usdhc3 {
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_usdhc3>;
 288         bus-width = <8>;
 289         no-1-8-v;
 290         non-removable;
 291         no-sd;
 292         no-sdio;
 293         status = "okay";
 294 };
 295
 296 &iomuxc {
 297         pinctrl_can1: can1grp {
 298                 fsl,pins = <
 299                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX                0x1b000
 300                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX                0x3008
 301                         /* CAN1_SR */
 302                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12                 0x13008
 303                         /* CAN1_TERM */
 304                         MX6QDL_PAD_GPIO_0__GPIO1_IO00                   0x1b088
 305                 >;
 306         };
 307
 308         pinctrl_ecspi1: ecspi1grp {
 309                 fsl,pins = <
 310                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x1b000
 311                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI                 0x3008
 312                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK                 0x3008
 313                         /* CS */
 314                         MX6QDL_PAD_EIM_D19__GPIO3_IO19                  0x3008
 315                 >;
 316         };
 317
 318         pinctrl_ecspi2: ecspi2grp {
 319                 fsl,pins = <
 320                         MX6QDL_PAD_EIM_OE__ECSPI2_MISO                  0x10000
 321                         MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK                 0x3008
 322                         MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI                 0x3008
 323                         /* CS */
 324                         MX6QDL_PAD_EIM_RW__GPIO2_IO26                   0x3008
 325                 >;
 326         };
 327
 328         pinctrl_enet: enetgrp {
 329                 fsl,pins = <
 330                         /* MX6QDL_ENET_PINGRP4 */
 331                         MX6QDL_PAD_ENET_MDC__ENET_MDC                   0x1b0b0
 332                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO                 0x1b0b0
 333                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0             0x1b0b0
 334                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1             0x1b0b0
 335                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER               0x1b0b0
 336                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN               0x1b0b0
 337                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0             0x1b0b0
 338                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1             0x1b0b0
 339                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN              0x1b0b0
 340
 341                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK                0x1b0b0
 342                         /* Phy reset */
 343                         MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22                0x1b0b0
 344                         /* nINTRP */
 345                         MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23                0x1b0b0
 346                 >;
 347         };
 348
 349         pinctrl_i2c1: i2c1grp {
 350                 fsl,pins = <
 351                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA                  0x4001f8b1
 352                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL                  0x4001f8b1
 353                 >;
 354         };
 355
 356         pinctrl_i2c3: i2c3grp {
 357                 fsl,pins = <
 358                         MX6QDL_PAD_GPIO_5__I2C3_SCL                     0x4001b8b1
 359                         MX6QDL_PAD_GPIO_6__I2C3_SDA                     0x4001b8b1
 360                 >;
 361         };
 362
 363         pinctrl_ipu1_disp: ipudisp1grp {
 364                 fsl,pins = <
 365                         /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
 366                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x30
 367                         MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15            0x30
 368                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x30
 369                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x30
 370                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x30
 371                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x30
 372                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x30
 373                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x30
 374                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x30
 375                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x30
 376                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x30
 377                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x30
 378                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x30
 379                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x30
 380                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x30
 381                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x30
 382                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x30
 383                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x30
 384                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x30
 385                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x30
 386                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x30
 387                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x30
 388                 >;
 389         };
 390
 391         pinctrl_leds: ledsgrp {
 392                 fsl,pins = <
 393                         MX6QDL_PAD_GPIO_8__GPIO1_IO08                   0x1b0b0
 394                 >;
 395         };
 396
 397         pinctrl_pwm1: pwm1grp {
 398                 fsl,pins = <
 399                         MX6QDL_PAD_GPIO_9__PWM1_OUT                     0x8
 400                 >;
 401         };
 402
 403         pinctrl_tsc2046: tsc2046grp {
 404                 fsl,pins = <
 405                         /* TSC_PENIRQ */
 406                         MX6QDL_PAD_EIM_D20__GPIO3_IO20                  0x1b0b1
 407                         /* TSC_BUSY */
 408                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30                  0x1b0b0
 409                 >;
 410         };
 411
 412         pinctrl_uart4: uart4grp {
 413                 fsl,pins = <
 414                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA              0x1b0b1
 415                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA              0x1b0b1
 416                 >;
 417         };
 418
 419         pinctrl_usdhc1: usdhc1grp {
 420                 fsl,pins = <
 421                         MX6QDL_PAD_SD1_CMD__SD1_CMD                     0x170f9
 422                         MX6QDL_PAD_SD1_CLK__SD1_CLK                     0x100f9
 423                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0                  0x170f9
 424                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1                  0x170f9
 425                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2                  0x170f9
 426                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3                  0x170f9
 427                         MX6QDL_PAD_GPIO_1__GPIO1_IO01                   0x1b0b0
 428                 >;
 429         };
 430
 431         pinctrl_usdhc3: usdhc3grp {
 432                 fsl,pins = <
 433                         MX6QDL_PAD_SD3_CMD__SD3_CMD                     0x17099
 434                         MX6QDL_PAD_SD3_CLK__SD3_CLK                     0x10099
 435                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0                  0x17099
 436                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1                  0x17099
 437                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2                  0x17099
 438                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3                  0x17099
 439                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4                  0x17099
 440                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5                  0x17099
 441                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6                  0x17099
 442                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7                  0x17099
 443                         MX6QDL_PAD_SD3_RST__SD3_RESET                   0x1b0b1
 444                 >;
 445         };
 446 };