arch/arm/boot/dts/at91-sama5d27_som1.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
   4  *
   5  *  Copyright (c) 2017, Microchip Technology Inc.
   6  *                2017 Cristian Birsan <cristian.birsan@microchip.com>
   7  *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
   8  */
   9 #include "sama5d2.dtsi"
  10 #include "sama5d2-pinfunc.h"
  11
  12 / {
  13         model = "Atmel SAMA5D27 SoM1";
  14         compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
  15
  16         aliases {
  17                 i2c0    = &i2c0;
  18         };
  19
  20         clocks {
  21                 slow_xtal {
  22                         clock-frequency = <32768>;
  23                 };
  24
  25                 main_xtal {
  26                         clock-frequency = <24000000>;
  27                 };
  28         };
  29
  30         ahb {
  31                 sdmmc0: sdio-host@a0000000 {
  32                         microchip,sdcal-inverted;
  33                 };
  34
  35                 apb {
  36                         qspi1: spi@f0024000 {
  37                                 pinctrl-names = "default";
  38                                 pinctrl-0 = <&pinctrl_qspi1_default>;
  39
  40                                 flash@0 {
  41                                         #address-cells = <1>;
  42                                         #size-cells = <1>;
  43                                         compatible = "jedec,spi-nor";
  44                                         reg = <0>;
  45                                         spi-max-frequency = <80000000>;
  46                                         spi-tx-bus-width = <4>;
  47                                         spi-rx-bus-width = <4>;
  48                                         m25p,fast-read;
  49
  50                                         at91bootstrap@0 {
  51                                                 label = "at91bootstrap";
  52                                                 reg = <0x00000000 0x00040000>;
  53                                         };
  54
  55                                         bootloader@40000 {
  56                                                 label = "bootloader";
  57                                                 reg = <0x00040000 0x000c0000>;
  58                                         };
  59
  60                                         bootloaderenvred@100000 {
  61                                                 label = "bootloader env redundant";
  62                                                 reg = <0x00100000 0x00040000>;
  63                                         };
  64
  65                                         bootloaderenv@140000 {
  66                                                 label = "bootloader env";
  67                                                 reg = <0x00140000 0x00040000>;
  68                                         };
  69
  70                                         dtb@180000 {
  71                                                 label = "device tree";
  72                                                 reg = <0x00180000 0x00080000>;
  73                                         };
  74
  75                                         kernel@200000 {
  76                                                 label = "kernel";
  77                                                 reg = <0x00200000 0x00600000>;
  78                                         };
  79                                 };
  80                         };
  81
  82                         macb0: ethernet@f8008000 {
  83                                 pinctrl-names = "default";
  84                                 pinctrl-0 = <&pinctrl_macb0_default>;
  85                                 phy-mode = "rmii";
  86
  87                                 ethernet-phy@7 {
  88                                         reg = <0x7>;
  89                                         interrupt-parent = <&pioA>;
  90                                         interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
  91                                         pinctrl-names = "default";
  92                                         pinctrl-0 = <&pinctrl_macb0_phy_irq>;
  93                                 };
  94                         };
  95
  96                         i2c0: i2c@f8028000 {
  97                                 dmas = <0>, <0>;
  98                                 pinctrl-names = "default";
  99                                 pinctrl-0 = <&pinctrl_i2c0_default>;
 100                                 status = "okay";
 101
 102                                 at24@50 {
 103                                         compatible = "atmel,24c02";
 104                                         reg = <0x50>;
 105                                         pagesize = <8>;
 106                                 };
 107                         };
 108
 109                         pinctrl@fc038000 {
 110                                 pinctrl_i2c0_default: i2c0_default {
 111                                         pinmux = <PIN_PD21__TWD0>,
 112                                                  <PIN_PD22__TWCK0>;
 113                                         bias-disable;
 114                                 };
 115
 116                                 pinctrl_qspi1_default: qspi1_default {
 117                                         sck_cs {
 118                                                 pinmux = <PIN_PB5__QSPI1_SCK>,
 119                                                          <PIN_PB6__QSPI1_CS>;
 120                                                 bias-disable;
 121                                         };
 122
 123                                         data {
 124                                                 pinmux = <PIN_PB7__QSPI1_IO0>,
 125                                                          <PIN_PB8__QSPI1_IO1>,
 126                                                          <PIN_PB9__QSPI1_IO2>,
 127                                                          <PIN_PB10__QSPI1_IO3>;
 128                                                 bias-pull-up;
 129                                         };
 130                                 };
 131
 132                                 pinctrl_macb0_default: macb0_default {
 133                                         pinmux = <PIN_PD9__GTXCK>,
 134                                                  <PIN_PD10__GTXEN>,
 135                                                  <PIN_PD11__GRXDV>,
 136                                                  <PIN_PD12__GRXER>,
 137                                                  <PIN_PD13__GRX0>,
 138                                                  <PIN_PD14__GRX1>,
 139                                                  <PIN_PD15__GTX0>,
 140                                                  <PIN_PD16__GTX1>,
 141                                                  <PIN_PD17__GMDC>,
 142                                                  <PIN_PD18__GMDIO>;
 143                                         bias-disable;
 144                                 };
 145
 146                                 pinctrl_macb0_phy_irq: macb0_phy_irq {
 147                                         pinmux = <PIN_PD31__GPIO>;
 148                                         bias-disable;
 149                                 };
 150                         };
 151                 };
 152         };
 153 };