arch/arm/boot/dts/aspeed-g5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/aspeed-clock.h>
   3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
   4
   5 / {
   6         model = "Aspeed BMC";
   7         compatible = "aspeed,ast2500";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         interrupt-parent = <&vic>;
  11
  12         aliases {
  13                 i2c0 = &i2c0;
  14                 i2c1 = &i2c1;
  15                 i2c2 = &i2c2;
  16                 i2c3 = &i2c3;
  17                 i2c4 = &i2c4;
  18                 i2c5 = &i2c5;
  19                 i2c6 = &i2c6;
  20                 i2c7 = &i2c7;
  21                 i2c8 = &i2c8;
  22                 i2c9 = &i2c9;
  23                 i2c10 = &i2c10;
  24                 i2c11 = &i2c11;
  25                 i2c12 = &i2c12;
  26                 i2c13 = &i2c13;
  27                 serial0 = &uart1;
  28                 serial1 = &uart2;
  29                 serial2 = &uart3;
  30                 serial3 = &uart4;
  31                 serial4 = &uart5;
  32                 serial5 = &vuart;
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 cpu@0 {
  40                         compatible = "arm,arm1176jzf-s";
  41                         device_type = "cpu";
  42                         reg = <0>;
  43                 };
  44         };
  45
  46         memory@80000000 {
  47                 device_type = "memory";
  48                 reg = <0x80000000 0>;
  49         };
  50
  51         ahb {
  52                 compatible = "simple-bus";
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 ranges;
  56
  57                 fmc: spi@1e620000 {
  58                         reg = < 0x1e620000 0xc4
  59                                 0x20000000 0x10000000 >;
  60                         #address-cells = <1>;
  61                         #size-cells = <0>;
  62                         compatible = "aspeed,ast2500-fmc";
  63                         clocks = <&syscon ASPEED_CLK_AHB>;
  64                         status = "disabled";
  65                         interrupts = <19>;
  66                         flash@0 {
  67                                 reg = < 0 >;
  68                                 compatible = "jedec,spi-nor";
  69                                 spi-max-frequency = <50000000>;
  70                                 status = "disabled";
  71                         };
  72                         flash@1 {
  73                                 reg = < 1 >;
  74                                 compatible = "jedec,spi-nor";
  75                                 spi-max-frequency = <50000000>;
  76                                 status = "disabled";
  77                         };
  78                         flash@2 {
  79                                 reg = < 2 >;
  80                                 compatible = "jedec,spi-nor";
  81                                 spi-max-frequency = <50000000>;
  82                                 status = "disabled";
  83                         };
  84                 };
  85
  86                 spi1: spi@1e630000 {
  87                         reg = < 0x1e630000 0xc4
  88                                 0x30000000 0x08000000 >;
  89                         #address-cells = <1>;
  90                         #size-cells = <0>;
  91                         compatible = "aspeed,ast2500-spi";
  92                         clocks = <&syscon ASPEED_CLK_AHB>;
  93                         status = "disabled";
  94                         flash@0 {
  95                                 reg = < 0 >;
  96                                 compatible = "jedec,spi-nor";
  97                                 spi-max-frequency = <50000000>;
  98                                 status = "disabled";
  99                         };
 100                         flash@1 {
 101                                 reg = < 1 >;
 102                                 compatible = "jedec,spi-nor";
 103                                 spi-max-frequency = <50000000>;
 104                                 status = "disabled";
 105                         };
 106                 };
 107
 108                 spi2: spi@1e631000 {
 109                         reg = < 0x1e631000 0xc4
 110                                 0x38000000 0x08000000 >;
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                         compatible = "aspeed,ast2500-spi";
 114                         clocks = <&syscon ASPEED_CLK_AHB>;
 115                         status = "disabled";
 116                         flash@0 {
 117                                 reg = < 0 >;
 118                                 compatible = "jedec,spi-nor";
 119                                 spi-max-frequency = <50000000>;
 120                                 status = "disabled";
 121                         };
 122                         flash@1 {
 123                                 reg = < 1 >;
 124                                 compatible = "jedec,spi-nor";
 125                                 spi-max-frequency = <50000000>;
 126                                 status = "disabled";
 127                         };
 128                 };
 129
 130                 vic: interrupt-controller@1e6c0080 {
 131                         compatible = "aspeed,ast2400-vic";
 132                         interrupt-controller;
 133                         #interrupt-cells = <1>;
 134                         valid-sources = <0xfefff7ff 0x0807ffff>;
 135                         reg = <0x1e6c0080 0x80>;
 136                 };
 137
 138                 cvic: copro-interrupt-controller@1e6c2000 {
 139                         compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
 140                         valid-sources = <0xffffffff>;
 141                         copro-sw-interrupts = <1>;
 142                         reg = <0x1e6c2000 0x80>;
 143                 };
 144
 145                 mac0: ethernet@1e660000 {
 146                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 147                         reg = <0x1e660000 0x180>;
 148                         interrupts = <2>;
 149                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 150                         status = "disabled";
 151                 };
 152
 153                 mac1: ethernet@1e680000 {
 154                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 155                         reg = <0x1e680000 0x180>;
 156                         interrupts = <3>;
 157                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 158                         status = "disabled";
 159                 };
 160
 161                 ehci0: usb@1e6a1000 {
 162                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 163                         reg = <0x1e6a1000 0x100>;
 164                         interrupts = <5>;
 165                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 166                         pinctrl-names = "default";
 167                         pinctrl-0 = <&pinctrl_usb2ah_default>;
 168                         status = "disabled";
 169                 };
 170
 171                 ehci1: usb@1e6a3000 {
 172                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 173                         reg = <0x1e6a3000 0x100>;
 174                         interrupts = <13>;
 175                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
 176                         pinctrl-names = "default";
 177                         pinctrl-0 = <&pinctrl_usb2bh_default>;
 178                         status = "disabled";
 179                 };
 180
 181                 uhci: usb@1e6b0000 {
 182                         compatible = "aspeed,ast2500-uhci", "generic-uhci";
 183                         reg = <0x1e6b0000 0x100>;
 184                         interrupts = <14>;
 185                         #ports = <2>;
 186                         clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
 187                         status = "disabled";
 188                         /*
 189                          * No default pinmux, it will follow EHCI, use an explicit pinmux
 190                          * override if you don't enable EHCI
 191                          */
 192                 };
 193
 194                 vhub: usb-vhub@1e6a0000 {
 195                         compatible = "aspeed,ast2500-usb-vhub";
 196                         reg = <0x1e6a0000 0x300>;
 197                         interrupts = <5>;
 198                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 199                         aspeed,vhub-downstream-ports = <5>;
 200                         aspeed,vhub-generic-endpoints = <15>;
 201                         pinctrl-names = "default";
 202                         pinctrl-0 = <&pinctrl_usb2ad_default>;
 203                         status = "disabled";
 204                 };
 205
 206                 apb {
 207                         compatible = "simple-bus";
 208                         #address-cells = <1>;
 209                         #size-cells = <1>;
 210                         ranges;
 211
 212                         edac: memory-controller@1e6e0000 {
 213                                 compatible = "aspeed,ast2500-sdram-edac";
 214                                 reg = <0x1e6e0000 0x174>;
 215                                 interrupts = <0>;
 216                                 status = "disabled";
 217                         };
 218
 219                         syscon: syscon@1e6e2000 {
 220                                 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
 221                                 reg = <0x1e6e2000 0x1a8>;
 222                                 #address-cells = <1>;
 223                                 #size-cells = <1>;
 224                                 ranges = <0 0x1e6e2000 0x1000>;
 225                                 #clock-cells = <1>;
 226                                 #reset-cells = <1>;
 227
 228                                 scu_ic: interrupt-controller@18 {
 229                                         #interrupt-cells = <1>;
 230                                         compatible = "aspeed,ast2500-scu-ic";
 231                                         reg = <0x18 0x4>;
 232                                         interrupts = <21>;
 233                                         interrupt-controller;
 234                                 };
 235
 236                                 p2a: p2a-control@2c {
 237                                         compatible = "aspeed,ast2500-p2a-ctrl";
 238                                         reg = <0x2c 0x4>;
 239                                         status = "disabled";
 240                                 };
 241
 242                                 silicon-id@7c {
 243                                         compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
 244                                         reg = <0x7c 0x4 0x150 0x8>;
 245                                 };
 246
 247                                 pinctrl: pinctrl@80 {
 248                                         compatible = "aspeed,ast2500-pinctrl";
 249                                         reg = <0x80 0x18>, <0xa0 0x10>;
 250                                         aspeed,external-nodes = <&gfx>, <&lhc>;
 251                                 };
 252                         };
 253
 254                         rng: hwrng@1e6e2078 {
 255                                 compatible = "timeriomem_rng";
 256                                 reg = <0x1e6e2078 0x4>;
 257                                 period = <1>;
 258                                 quality = <100>;
 259                         };
 260
 261                         gfx: display@1e6e6000 {
 262                                 compatible = "aspeed,ast2500-gfx", "syscon";
 263                                 reg = <0x1e6e6000 0x1000>;
 264                                 reg-io-width = <4>;
 265                                 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
 266                                 resets = <&syscon ASPEED_RESET_CRT1>;
 267                                 syscon = <&syscon>;
 268                                 status = "disabled";
 269                                 interrupts = <0x19>;
 270                         };
 271
 272                         xdma: xdma@1e6e7000 {
 273                                 compatible = "aspeed,ast2500-xdma";
 274                                 reg = <0x1e6e7000 0x100>;
 275                                 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
 276                                 resets = <&syscon ASPEED_RESET_XDMA>;
 277                                 interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>;
 278                                 aspeed,pcie-device = "bmc";
 279                                 aspeed,scu = <&syscon>;
 280                                 status = "disabled";
 281                         };
 282
 283                         adc: adc@1e6e9000 {
 284                                 compatible = "aspeed,ast2500-adc";
 285                                 reg = <0x1e6e9000 0xb0>;
 286                                 clocks = <&syscon ASPEED_CLK_APB>;
 287                                 resets = <&syscon ASPEED_RESET_ADC>;
 288                                 #io-channel-cells = <1>;
 289                                 status = "disabled";
 290                         };
 291
 292                         video: video@1e700000 {
 293                                 compatible = "aspeed,ast2500-video-engine";
 294                                 reg = <0x1e700000 0x1000>;
 295                                 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
 296                                          <&syscon ASPEED_CLK_GATE_ECLK>;
 297                                 clock-names = "vclk", "eclk";
 298                                 interrupts = <7>;
 299                                 status = "disabled";
 300                         };
 301
 302                         sram: sram@1e720000 {
 303                                 compatible = "mmio-sram";
 304                                 reg = <0x1e720000 0x9000>;      // 36K
 305                         };
 306
 307                         sdmmc: sd-controller@1e740000 {
 308                                 compatible = "aspeed,ast2500-sd-controller";
 309                                 reg = <0x1e740000 0x100>;
 310                                 #address-cells = <1>;
 311                                 #size-cells = <1>;
 312                                 ranges = <0 0x1e740000 0x10000>;
 313                                 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
 314                                 status = "disabled";
 315
 316                                 sdhci0: sdhci@100 {
 317                                         compatible = "aspeed,ast2500-sdhci";
 318                                         reg = <0x100 0x100>;
 319                                         interrupts = <26>;
 320                                         sdhci,auto-cmd12;
 321                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 322                                         status = "disabled";
 323                                 };
 324
 325                                 sdhci1: sdhci@200 {
 326                                         compatible = "aspeed,ast2500-sdhci";
 327                                         reg = <0x200 0x100>;
 328                                         interrupts = <26>;
 329                                         sdhci,auto-cmd12;
 330                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 331                                         status = "disabled";
 332                                 };
 333                         };
 334
 335                         gpio: gpio@1e780000 {
 336                                 #gpio-cells = <2>;
 337                                 gpio-controller;
 338                                 compatible = "aspeed,ast2500-gpio";
 339                                 reg = <0x1e780000 0x200>;
 340                                 interrupts = <20>;
 341                                 gpio-ranges = <&pinctrl 0 0 232>;
 342                                 clocks = <&syscon ASPEED_CLK_APB>;
 343                                 interrupt-controller;
 344                                 #interrupt-cells = <2>;
 345                         };
 346
 347                         sgpio: sgpio@1e780200 {
 348                                 #gpio-cells = <2>;
 349                                 compatible = "aspeed,ast2500-sgpio";
 350                                 gpio-controller;
 351                                 interrupts = <40>;
 352                                 reg = <0x1e780200 0x0100>;
 353                                 clocks = <&syscon ASPEED_CLK_APB>;
 354                                 interrupt-controller;
 355                                 bus-frequency = <12000000>;
 356                                 pinctrl-names = "default";
 357                                 pinctrl-0 = <&pinctrl_sgpm_default>;
 358                                 status = "disabled";
 359                         };
 360
 361                         rtc: rtc@1e781000 {
 362                                 compatible = "aspeed,ast2500-rtc";
 363                                 reg = <0x1e781000 0x18>;
 364                                 status = "disabled";
 365                         };
 366
 367                         timer: timer@1e782000 {
 368                                 /* This timer is a Faraday FTTMR010 derivative */
 369                                 compatible = "aspeed,ast2400-timer";
 370                                 reg = <0x1e782000 0x90>;
 371                                 interrupts = <16 17 18 35 36 37 38 39>;
 372                                 clocks = <&syscon ASPEED_CLK_APB>;
 373                                 clock-names = "PCLK";
 374                         };
 375
 376                         uart1: serial@1e783000 {
 377                                 compatible = "ns16550a";
 378                                 reg = <0x1e783000 0x20>;
 379                                 reg-shift = <2>;
 380                                 interrupts = <9>;
 381                                 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
 382                                 resets = <&lpc_reset 4>;
 383                                 no-loopback-test;
 384                                 status = "disabled";
 385                         };
 386
 387                         uart5: serial@1e784000 {
 388                                 compatible = "ns16550a";
 389                                 reg = <0x1e784000 0x20>;
 390                                 reg-shift = <2>;
 391                                 interrupts = <10>;
 392                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 393                                 no-loopback-test;
 394                                 status = "disabled";
 395                         };
 396
 397                         wdt1: watchdog@1e785000 {
 398                                 compatible = "aspeed,ast2500-wdt";
 399                                 reg = <0x1e785000 0x20>;
 400                                 clocks = <&syscon ASPEED_CLK_APB>;
 401                         };
 402
 403                         wdt2: watchdog@1e785020 {
 404                                 compatible = "aspeed,ast2500-wdt";
 405                                 reg = <0x1e785020 0x20>;
 406                                 clocks = <&syscon ASPEED_CLK_APB>;
 407                         };
 408
 409                         wdt3: watchdog@1e785040 {
 410                                 compatible = "aspeed,ast2500-wdt";
 411                                 reg = <0x1e785040 0x20>;
 412                                 clocks = <&syscon ASPEED_CLK_APB>;
 413                                 status = "disabled";
 414                         };
 415
 416                         pwm_tacho: pwm-tacho-controller@1e786000 {
 417                                 compatible = "aspeed,ast2500-pwm-tacho";
 418                                 #address-cells = <1>;
 419                                 #size-cells = <0>;
 420                                 reg = <0x1e786000 0x1000>;
 421                                 clocks = <&syscon ASPEED_CLK_24M>;
 422                                 resets = <&syscon ASPEED_RESET_PWM>;
 423                                 status = "disabled";
 424                         };
 425
 426                         vuart: serial@1e787000 {
 427                                 compatible = "aspeed,ast2500-vuart";
 428                                 reg = <0x1e787000 0x40>;
 429                                 reg-shift = <2>;
 430                                 interrupts = <8>;
 431                                 clocks = <&syscon ASPEED_CLK_APB>;
 432                                 no-loopback-test;
 433                                 status = "disabled";
 434                         };
 435
 436                         lpc: lpc@1e789000 {
 437                                 compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
 438                                 reg = <0x1e789000 0x1000>;
 439                                 reg-io-width = <4>;
 440
 441                                 #address-cells = <1>;
 442                                 #size-cells = <1>;
 443                                 ranges = <0x0 0x1e789000 0x1000>;
 444
 445                                 kcs1: kcs@24 {
 446                                         compatible = "aspeed,ast2500-kcs-bmc-v2";
 447                                         reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
 448                                         interrupts = <8>;
 449                                         status = "disabled";
 450                                 };
 451
 452                                 kcs2: kcs@28 {
 453                                         compatible = "aspeed,ast2500-kcs-bmc-v2";
 454                                         reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
 455                                         interrupts = <8>;
 456                                         status = "disabled";
 457                                 };
 458
 459                                 kcs3: kcs@2c {
 460                                         compatible = "aspeed,ast2500-kcs-bmc-v2";
 461                                         reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
 462                                         interrupts = <8>;
 463                                         status = "disabled";
 464                                 };
 465
 466                                 kcs4: kcs@114 {
 467                                         compatible = "aspeed,ast2500-kcs-bmc-v2";
 468                                         reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
 469                                         interrupts = <8>;
 470                                         status = "disabled";
 471                                 };
 472
 473                                 lpc_ctrl: lpc-ctrl@80 {
 474                                         compatible = "aspeed,ast2500-lpc-ctrl";
 475                                         reg = <0x80 0x10>;
 476                                         clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 477                                         status = "disabled";
 478                                 };
 479
 480                                 lpc_snoop: lpc-snoop@90 {
 481                                         compatible = "aspeed,ast2500-lpc-snoop";
 482                                         reg = <0x90 0x8>;
 483                                         interrupts = <8>;
 484                                         clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 485                                         status = "disabled";
 486                                 };
 487
 488                                 lpc_reset: reset-controller@98 {
 489                                         compatible = "aspeed,ast2500-lpc-reset";
 490                                         reg = <0x98 0x4>;
 491                                         #reset-cells = <1>;
 492                                 };
 493
 494                                 lhc: lhc@a0 {
 495                                         compatible = "aspeed,ast2500-lhc";
 496                                         reg = <0xa0 0x24 0xc8 0x8>;
 497                                 };
 498
 499
 500                                 ibt: ibt@140 {
 501                                         compatible = "aspeed,ast2500-ibt-bmc";
 502                                         reg = <0x140 0x18>;
 503                                         interrupts = <8>;
 504                                         status = "disabled";
 505                                 };
 506                         };
 507
 508                         uart2: serial@1e78d000 {
 509                                 compatible = "ns16550a";
 510                                 reg = <0x1e78d000 0x20>;
 511                                 reg-shift = <2>;
 512                                 interrupts = <32>;
 513                                 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
 514                                 resets = <&lpc_reset 5>;
 515                                 no-loopback-test;
 516                                 status = "disabled";
 517                         };
 518
 519                         uart3: serial@1e78e000 {
 520                                 compatible = "ns16550a";
 521                                 reg = <0x1e78e000 0x20>;
 522                                 reg-shift = <2>;
 523                                 interrupts = <33>;
 524                                 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
 525                                 resets = <&lpc_reset 6>;
 526                                 no-loopback-test;
 527                                 status = "disabled";
 528                         };
 529
 530                         uart4: serial@1e78f000 {
 531                                 compatible = "ns16550a";
 532                                 reg = <0x1e78f000 0x20>;
 533                                 reg-shift = <2>;
 534                                 interrupts = <34>;
 535                                 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
 536                                 resets = <&lpc_reset 7>;
 537                                 no-loopback-test;
 538                                 status = "disabled";
 539                         };
 540
 541                         i2c: bus@1e78a000 {
 542                                 compatible = "simple-bus";
 543                                 #address-cells = <1>;
 544                                 #size-cells = <1>;
 545                                 ranges = <0 0x1e78a000 0x1000>;
 546                         };
 547                 };
 548         };
 549 };
 550
 551 &i2c {
 552         i2c_ic: interrupt-controller@0 {
 553                 #interrupt-cells = <1>;
 554                 compatible = "aspeed,ast2500-i2c-ic";
 555                 reg = <0x0 0x40>;
 556                 interrupts = <12>;
 557                 interrupt-controller;
 558         };
 559
 560         i2c0: i2c-bus@40 {
 561                 #address-cells = <1>;
 562                 #size-cells = <0>;
 563                 #interrupt-cells = <1>;
 564
 565                 reg = <0x40 0x40>;
 566                 compatible = "aspeed,ast2500-i2c-bus";
 567                 clocks = <&syscon ASPEED_CLK_APB>;
 568                 resets = <&syscon ASPEED_RESET_I2C>;
 569                 bus-frequency = <100000>;
 570                 interrupts = <0>;
 571                 interrupt-parent = <&i2c_ic>;
 572                 status = "disabled";
 573                 /* Does not need pinctrl properties */
 574         };
 575
 576         i2c1: i2c-bus@80 {
 577                 #address-cells = <1>;
 578                 #size-cells = <0>;
 579                 #interrupt-cells = <1>;
 580
 581                 reg = <0x80 0x40>;
 582                 compatible = "aspeed,ast2500-i2c-bus";
 583                 clocks = <&syscon ASPEED_CLK_APB>;
 584                 resets = <&syscon ASPEED_RESET_I2C>;
 585                 bus-frequency = <100000>;
 586                 interrupts = <1>;
 587                 interrupt-parent = <&i2c_ic>;
 588                 status = "disabled";
 589                 /* Does not need pinctrl properties */
 590         };
 591
 592         i2c2: i2c-bus@c0 {
 593                 #address-cells = <1>;
 594                 #size-cells = <0>;
 595                 #interrupt-cells = <1>;
 596
 597                 reg = <0xc0 0x40>;
 598                 compatible = "aspeed,ast2500-i2c-bus";
 599                 clocks = <&syscon ASPEED_CLK_APB>;
 600                 resets = <&syscon ASPEED_RESET_I2C>;
 601                 bus-frequency = <100000>;
 602                 interrupts = <2>;
 603                 interrupt-parent = <&i2c_ic>;
 604                 pinctrl-names = "default";
 605                 pinctrl-0 = <&pinctrl_i2c3_default>;
 606                 status = "disabled";
 607         };
 608
 609         i2c3: i2c-bus@100 {
 610                 #address-cells = <1>;
 611                 #size-cells = <0>;
 612                 #interrupt-cells = <1>;
 613
 614                 reg = <0x100 0x40>;
 615                 compatible = "aspeed,ast2500-i2c-bus";
 616                 clocks = <&syscon ASPEED_CLK_APB>;
 617                 resets = <&syscon ASPEED_RESET_I2C>;
 618                 bus-frequency = <100000>;
 619                 interrupts = <3>;
 620                 interrupt-parent = <&i2c_ic>;
 621                 pinctrl-names = "default";
 622                 pinctrl-0 = <&pinctrl_i2c4_default>;
 623                 status = "disabled";
 624         };
 625
 626         i2c4: i2c-bus@140 {
 627                 #address-cells = <1>;
 628                 #size-cells = <0>;
 629                 #interrupt-cells = <1>;
 630
 631                 reg = <0x140 0x40>;
 632                 compatible = "aspeed,ast2500-i2c-bus";
 633                 clocks = <&syscon ASPEED_CLK_APB>;
 634                 resets = <&syscon ASPEED_RESET_I2C>;
 635                 bus-frequency = <100000>;
 636                 interrupts = <4>;
 637                 interrupt-parent = <&i2c_ic>;
 638                 pinctrl-names = "default";
 639                 pinctrl-0 = <&pinctrl_i2c5_default>;
 640                 status = "disabled";
 641         };
 642
 643         i2c5: i2c-bus@180 {
 644                 #address-cells = <1>;
 645                 #size-cells = <0>;
 646                 #interrupt-cells = <1>;
 647
 648                 reg = <0x180 0x40>;
 649                 compatible = "aspeed,ast2500-i2c-bus";
 650                 clocks = <&syscon ASPEED_CLK_APB>;
 651                 resets = <&syscon ASPEED_RESET_I2C>;
 652                 bus-frequency = <100000>;
 653                 interrupts = <5>;
 654                 interrupt-parent = <&i2c_ic>;
 655                 pinctrl-names = "default";
 656                 pinctrl-0 = <&pinctrl_i2c6_default>;
 657                 status = "disabled";
 658         };
 659
 660         i2c6: i2c-bus@1c0 {
 661                 #address-cells = <1>;
 662                 #size-cells = <0>;
 663                 #interrupt-cells = <1>;
 664
 665                 reg = <0x1c0 0x40>;
 666                 compatible = "aspeed,ast2500-i2c-bus";
 667                 clocks = <&syscon ASPEED_CLK_APB>;
 668                 resets = <&syscon ASPEED_RESET_I2C>;
 669                 bus-frequency = <100000>;
 670                 interrupts = <6>;
 671                 interrupt-parent = <&i2c_ic>;
 672                 pinctrl-names = "default";
 673                 pinctrl-0 = <&pinctrl_i2c7_default>;
 674                 status = "disabled";
 675         };
 676
 677         i2c7: i2c-bus@300 {
 678                 #address-cells = <1>;
 679                 #size-cells = <0>;
 680                 #interrupt-cells = <1>;
 681
 682                 reg = <0x300 0x40>;
 683                 compatible = "aspeed,ast2500-i2c-bus";
 684                 clocks = <&syscon ASPEED_CLK_APB>;
 685                 resets = <&syscon ASPEED_RESET_I2C>;
 686                 bus-frequency = <100000>;
 687                 interrupts = <7>;
 688                 interrupt-parent = <&i2c_ic>;
 689                 pinctrl-names = "default";
 690                 pinctrl-0 = <&pinctrl_i2c8_default>;
 691                 status = "disabled";
 692         };
 693
 694         i2c8: i2c-bus@340 {
 695                 #address-cells = <1>;
 696                 #size-cells = <0>;
 697                 #interrupt-cells = <1>;
 698
 699                 reg = <0x340 0x40>;
 700                 compatible = "aspeed,ast2500-i2c-bus";
 701                 clocks = <&syscon ASPEED_CLK_APB>;
 702                 resets = <&syscon ASPEED_RESET_I2C>;
 703                 bus-frequency = <100000>;
 704                 interrupts = <8>;
 705                 interrupt-parent = <&i2c_ic>;
 706                 pinctrl-names = "default";
 707                 pinctrl-0 = <&pinctrl_i2c9_default>;
 708                 status = "disabled";
 709         };
 710
 711         i2c9: i2c-bus@380 {
 712                 #address-cells = <1>;
 713                 #size-cells = <0>;
 714                 #interrupt-cells = <1>;
 715
 716                 reg = <0x380 0x40>;
 717                 compatible = "aspeed,ast2500-i2c-bus";
 718                 clocks = <&syscon ASPEED_CLK_APB>;
 719                 resets = <&syscon ASPEED_RESET_I2C>;
 720                 bus-frequency = <100000>;
 721                 interrupts = <9>;
 722                 interrupt-parent = <&i2c_ic>;
 723                 pinctrl-names = "default";
 724                 pinctrl-0 = <&pinctrl_i2c10_default>;
 725                 status = "disabled";
 726         };
 727
 728         i2c10: i2c-bus@3c0 {
 729                 #address-cells = <1>;
 730                 #size-cells = <0>;
 731                 #interrupt-cells = <1>;
 732
 733                 reg = <0x3c0 0x40>;
 734                 compatible = "aspeed,ast2500-i2c-bus";
 735                 clocks = <&syscon ASPEED_CLK_APB>;
 736                 resets = <&syscon ASPEED_RESET_I2C>;
 737                 bus-frequency = <100000>;
 738                 interrupts = <10>;
 739                 interrupt-parent = <&i2c_ic>;
 740                 pinctrl-names = "default";
 741                 pinctrl-0 = <&pinctrl_i2c11_default>;
 742                 status = "disabled";
 743         };
 744
 745         i2c11: i2c-bus@400 {
 746                 #address-cells = <1>;
 747                 #size-cells = <0>;
 748                 #interrupt-cells = <1>;
 749
 750                 reg = <0x400 0x40>;
 751                 compatible = "aspeed,ast2500-i2c-bus";
 752                 clocks = <&syscon ASPEED_CLK_APB>;
 753                 resets = <&syscon ASPEED_RESET_I2C>;
 754                 bus-frequency = <100000>;
 755                 interrupts = <11>;
 756                 interrupt-parent = <&i2c_ic>;
 757                 pinctrl-names = "default";
 758                 pinctrl-0 = <&pinctrl_i2c12_default>;
 759                 status = "disabled";
 760         };
 761
 762         i2c12: i2c-bus@440 {
 763                 #address-cells = <1>;
 764                 #size-cells = <0>;
 765                 #interrupt-cells = <1>;
 766
 767                 reg = <0x440 0x40>;
 768                 compatible = "aspeed,ast2500-i2c-bus";
 769                 clocks = <&syscon ASPEED_CLK_APB>;
 770                 resets = <&syscon ASPEED_RESET_I2C>;
 771                 bus-frequency = <100000>;
 772                 interrupts = <12>;
 773                 interrupt-parent = <&i2c_ic>;
 774                 pinctrl-names = "default";
 775                 pinctrl-0 = <&pinctrl_i2c13_default>;
 776                 status = "disabled";
 777         };
 778
 779         i2c13: i2c-bus@480 {
 780                 #address-cells = <1>;
 781                 #size-cells = <0>;
 782                 #interrupt-cells = <1>;
 783
 784                 reg = <0x480 0x40>;
 785                 compatible = "aspeed,ast2500-i2c-bus";
 786                 clocks = <&syscon ASPEED_CLK_APB>;
 787                 resets = <&syscon ASPEED_RESET_I2C>;
 788                 bus-frequency = <100000>;
 789                 interrupts = <13>;
 790                 interrupt-parent = <&i2c_ic>;
 791                 pinctrl-names = "default";
 792                 pinctrl-0 = <&pinctrl_i2c14_default>;
 793                 status = "disabled";
 794         };
 795 };
 796
 797 &pinctrl {
 798         pinctrl_acpi_default: acpi_default {
 799                 function = "ACPI";
 800                 groups = "ACPI";
 801         };
 802
 803         pinctrl_adc0_default: adc0_default {
 804                 function = "ADC0";
 805                 groups = "ADC0";
 806         };
 807
 808         pinctrl_adc1_default: adc1_default {
 809                 function = "ADC1";
 810                 groups = "ADC1";
 811         };
 812
 813         pinctrl_adc10_default: adc10_default {
 814                 function = "ADC10";
 815                 groups = "ADC10";
 816         };
 817
 818         pinctrl_adc11_default: adc11_default {
 819                 function = "ADC11";
 820                 groups = "ADC11";
 821         };
 822
 823         pinctrl_adc12_default: adc12_default {
 824                 function = "ADC12";
 825                 groups = "ADC12";
 826         };
 827
 828         pinctrl_adc13_default: adc13_default {
 829                 function = "ADC13";
 830                 groups = "ADC13";
 831         };
 832
 833         pinctrl_adc14_default: adc14_default {
 834                 function = "ADC14";
 835                 groups = "ADC14";
 836         };
 837
 838         pinctrl_adc15_default: adc15_default {
 839                 function = "ADC15";
 840                 groups = "ADC15";
 841         };
 842
 843         pinctrl_adc2_default: adc2_default {
 844                 function = "ADC2";
 845                 groups = "ADC2";
 846         };
 847
 848         pinctrl_adc3_default: adc3_default {
 849                 function = "ADC3";
 850                 groups = "ADC3";
 851         };
 852
 853         pinctrl_adc4_default: adc4_default {
 854                 function = "ADC4";
 855                 groups = "ADC4";
 856         };
 857
 858         pinctrl_adc5_default: adc5_default {
 859                 function = "ADC5";
 860                 groups = "ADC5";
 861         };
 862
 863         pinctrl_adc6_default: adc6_default {
 864                 function = "ADC6";
 865                 groups = "ADC6";
 866         };
 867
 868         pinctrl_adc7_default: adc7_default {
 869                 function = "ADC7";
 870                 groups = "ADC7";
 871         };
 872
 873         pinctrl_adc8_default: adc8_default {
 874                 function = "ADC8";
 875                 groups = "ADC8";
 876         };
 877
 878         pinctrl_adc9_default: adc9_default {
 879                 function = "ADC9";
 880                 groups = "ADC9";
 881         };
 882
 883         pinctrl_bmcint_default: bmcint_default {
 884                 function = "BMCINT";
 885                 groups = "BMCINT";
 886         };
 887
 888         pinctrl_ddcclk_default: ddcclk_default {
 889                 function = "DDCCLK";
 890                 groups = "DDCCLK";
 891         };
 892
 893         pinctrl_ddcdat_default: ddcdat_default {
 894                 function = "DDCDAT";
 895                 groups = "DDCDAT";
 896         };
 897
 898         pinctrl_espi_default: espi_default {
 899                 function = "ESPI";
 900                 groups = "ESPI";
 901         };
 902
 903         pinctrl_fwspics1_default: fwspics1_default {
 904                 function = "FWSPICS1";
 905                 groups = "FWSPICS1";
 906         };
 907
 908         pinctrl_fwspics2_default: fwspics2_default {
 909                 function = "FWSPICS2";
 910                 groups = "FWSPICS2";
 911         };
 912
 913         pinctrl_gpid0_default: gpid0_default {
 914                 function = "GPID0";
 915                 groups = "GPID0";
 916         };
 917
 918         pinctrl_gpid2_default: gpid2_default {
 919                 function = "GPID2";
 920                 groups = "GPID2";
 921         };
 922
 923         pinctrl_gpid4_default: gpid4_default {
 924                 function = "GPID4";
 925                 groups = "GPID4";
 926         };
 927
 928         pinctrl_gpid6_default: gpid6_default {
 929                 function = "GPID6";
 930                 groups = "GPID6";
 931         };
 932
 933         pinctrl_gpie0_default: gpie0_default {
 934                 function = "GPIE0";
 935                 groups = "GPIE0";
 936         };
 937
 938         pinctrl_gpie2_default: gpie2_default {
 939                 function = "GPIE2";
 940                 groups = "GPIE2";
 941         };
 942
 943         pinctrl_gpie4_default: gpie4_default {
 944                 function = "GPIE4";
 945                 groups = "GPIE4";
 946         };
 947
 948         pinctrl_gpie6_default: gpie6_default {
 949                 function = "GPIE6";
 950                 groups = "GPIE6";
 951         };
 952
 953         pinctrl_i2c10_default: i2c10_default {
 954                 function = "I2C10";
 955                 groups = "I2C10";
 956         };
 957
 958         pinctrl_i2c11_default: i2c11_default {
 959                 function = "I2C11";
 960                 groups = "I2C11";
 961         };
 962
 963         pinctrl_i2c12_default: i2c12_default {
 964                 function = "I2C12";
 965                 groups = "I2C12";
 966         };
 967
 968         pinctrl_i2c13_default: i2c13_default {
 969                 function = "I2C13";
 970                 groups = "I2C13";
 971         };
 972
 973         pinctrl_i2c14_default: i2c14_default {
 974                 function = "I2C14";
 975                 groups = "I2C14";
 976         };
 977
 978         pinctrl_i2c3_default: i2c3_default {
 979                 function = "I2C3";
 980                 groups = "I2C3";
 981         };
 982
 983         pinctrl_i2c4_default: i2c4_default {
 984                 function = "I2C4";
 985                 groups = "I2C4";
 986         };
 987
 988         pinctrl_i2c5_default: i2c5_default {
 989                 function = "I2C5";
 990                 groups = "I2C5";
 991         };
 992
 993         pinctrl_i2c6_default: i2c6_default {
 994                 function = "I2C6";
 995                 groups = "I2C6";
 996         };
 997
 998         pinctrl_i2c7_default: i2c7_default {
 999                 function = "I2C7";
1000                 groups = "I2C7";
1001         };
1002
1003         pinctrl_i2c8_default: i2c8_default {
1004                 function = "I2C8";
1005                 groups = "I2C8";
1006         };
1007
1008         pinctrl_i2c9_default: i2c9_default {
1009                 function = "I2C9";
1010                 groups = "I2C9";
1011         };
1012
1013         pinctrl_lad0_default: lad0_default {
1014                 function = "LAD0";
1015                 groups = "LAD0";
1016         };
1017
1018         pinctrl_lad1_default: lad1_default {
1019                 function = "LAD1";
1020                 groups = "LAD1";
1021         };
1022
1023         pinctrl_lad2_default: lad2_default {
1024                 function = "LAD2";
1025                 groups = "LAD2";
1026         };
1027
1028         pinctrl_lad3_default: lad3_default {
1029                 function = "LAD3";
1030                 groups = "LAD3";
1031         };
1032
1033         pinctrl_lclk_default: lclk_default {
1034                 function = "LCLK";
1035                 groups = "LCLK";
1036         };
1037
1038         pinctrl_lframe_default: lframe_default {
1039                 function = "LFRAME";
1040                 groups = "LFRAME";
1041         };
1042
1043         pinctrl_lpchc_default: lpchc_default {
1044                 function = "LPCHC";
1045                 groups = "LPCHC";
1046         };
1047
1048         pinctrl_lpcpd_default: lpcpd_default {
1049                 function = "LPCPD";
1050                 groups = "LPCPD";
1051         };
1052
1053         pinctrl_lpcplus_default: lpcplus_default {
1054                 function = "LPCPLUS";
1055                 groups = "LPCPLUS";
1056         };
1057
1058         pinctrl_lpcpme_default: lpcpme_default {
1059                 function = "LPCPME";
1060                 groups = "LPCPME";
1061         };
1062
1063         pinctrl_lpcrst_default: lpcrst_default {
1064                 function = "LPCRST";
1065                 groups = "LPCRST";
1066         };
1067
1068         pinctrl_lpcsmi_default: lpcsmi_default {
1069                 function = "LPCSMI";
1070                 groups = "LPCSMI";
1071         };
1072
1073         pinctrl_lsirq_default: lsirq_default {
1074                 function = "LSIRQ";
1075                 groups = "LSIRQ";
1076         };
1077
1078         pinctrl_mac1link_default: mac1link_default {
1079                 function = "MAC1LINK";
1080                 groups = "MAC1LINK";
1081         };
1082
1083         pinctrl_mac2link_default: mac2link_default {
1084                 function = "MAC2LINK";
1085                 groups = "MAC2LINK";
1086         };
1087
1088         pinctrl_mdio1_default: mdio1_default {
1089                 function = "MDIO1";
1090                 groups = "MDIO1";
1091         };
1092
1093         pinctrl_mdio2_default: mdio2_default {
1094                 function = "MDIO2";
1095                 groups = "MDIO2";
1096         };
1097
1098         pinctrl_ncts1_default: ncts1_default {
1099                 function = "NCTS1";
1100                 groups = "NCTS1";
1101         };
1102
1103         pinctrl_ncts2_default: ncts2_default {
1104                 function = "NCTS2";
1105                 groups = "NCTS2";
1106         };
1107
1108         pinctrl_ncts3_default: ncts3_default {
1109                 function = "NCTS3";
1110                 groups = "NCTS3";
1111         };
1112
1113         pinctrl_ncts4_default: ncts4_default {
1114                 function = "NCTS4";
1115                 groups = "NCTS4";
1116         };
1117
1118         pinctrl_ndcd1_default: ndcd1_default {
1119                 function = "NDCD1";
1120                 groups = "NDCD1";
1121         };
1122
1123         pinctrl_ndcd2_default: ndcd2_default {
1124                 function = "NDCD2";
1125                 groups = "NDCD2";
1126         };
1127
1128         pinctrl_ndcd3_default: ndcd3_default {
1129                 function = "NDCD3";
1130                 groups = "NDCD3";
1131         };
1132
1133         pinctrl_ndcd4_default: ndcd4_default {
1134                 function = "NDCD4";
1135                 groups = "NDCD4";
1136         };
1137
1138         pinctrl_ndsr1_default: ndsr1_default {
1139                 function = "NDSR1";
1140                 groups = "NDSR1";
1141         };
1142
1143         pinctrl_ndsr2_default: ndsr2_default {
1144                 function = "NDSR2";
1145                 groups = "NDSR2";
1146         };
1147
1148         pinctrl_ndsr3_default: ndsr3_default {
1149                 function = "NDSR3";
1150                 groups = "NDSR3";
1151         };
1152
1153         pinctrl_ndsr4_default: ndsr4_default {
1154                 function = "NDSR4";
1155                 groups = "NDSR4";
1156         };
1157
1158         pinctrl_ndtr1_default: ndtr1_default {
1159                 function = "NDTR1";
1160                 groups = "NDTR1";
1161         };
1162
1163         pinctrl_ndtr2_default: ndtr2_default {
1164                 function = "NDTR2";
1165                 groups = "NDTR2";
1166         };
1167
1168         pinctrl_ndtr3_default: ndtr3_default {
1169                 function = "NDTR3";
1170                 groups = "NDTR3";
1171         };
1172
1173         pinctrl_ndtr4_default: ndtr4_default {
1174                 function = "NDTR4";
1175                 groups = "NDTR4";
1176         };
1177
1178         pinctrl_nri1_default: nri1_default {
1179                 function = "NRI1";
1180                 groups = "NRI1";
1181         };
1182
1183         pinctrl_nri2_default: nri2_default {
1184                 function = "NRI2";
1185                 groups = "NRI2";
1186         };
1187
1188         pinctrl_nri3_default: nri3_default {
1189                 function = "NRI3";
1190                 groups = "NRI3";
1191         };
1192
1193         pinctrl_nri4_default: nri4_default {
1194                 function = "NRI4";
1195                 groups = "NRI4";
1196         };
1197
1198         pinctrl_nrts1_default: nrts1_default {
1199                 function = "NRTS1";
1200                 groups = "NRTS1";
1201         };
1202
1203         pinctrl_nrts2_default: nrts2_default {
1204                 function = "NRTS2";
1205                 groups = "NRTS2";
1206         };
1207
1208         pinctrl_nrts3_default: nrts3_default {
1209                 function = "NRTS3";
1210                 groups = "NRTS3";
1211         };
1212
1213         pinctrl_nrts4_default: nrts4_default {
1214                 function = "NRTS4";
1215                 groups = "NRTS4";
1216         };
1217
1218         pinctrl_oscclk_default: oscclk_default {
1219                 function = "OSCCLK";
1220                 groups = "OSCCLK";
1221         };
1222
1223         pinctrl_pewake_default: pewake_default {
1224                 function = "PEWAKE";
1225                 groups = "PEWAKE";
1226         };
1227
1228         pinctrl_pnor_default: pnor_default {
1229                 function = "PNOR";
1230                 groups = "PNOR";
1231         };
1232
1233         pinctrl_pwm0_default: pwm0_default {
1234                 function = "PWM0";
1235                 groups = "PWM0";
1236         };
1237
1238         pinctrl_pwm1_default: pwm1_default {
1239                 function = "PWM1";
1240                 groups = "PWM1";
1241         };
1242
1243         pinctrl_pwm2_default: pwm2_default {
1244                 function = "PWM2";
1245                 groups = "PWM2";
1246         };
1247
1248         pinctrl_pwm3_default: pwm3_default {
1249                 function = "PWM3";
1250                 groups = "PWM3";
1251         };
1252
1253         pinctrl_pwm4_default: pwm4_default {
1254                 function = "PWM4";
1255                 groups = "PWM4";
1256         };
1257
1258         pinctrl_pwm5_default: pwm5_default {
1259                 function = "PWM5";
1260                 groups = "PWM5";
1261         };
1262
1263         pinctrl_pwm6_default: pwm6_default {
1264                 function = "PWM6";
1265                 groups = "PWM6";
1266         };
1267
1268         pinctrl_pwm7_default: pwm7_default {
1269                 function = "PWM7";
1270                 groups = "PWM7";
1271         };
1272
1273         pinctrl_rgmii1_default: rgmii1_default {
1274                 function = "RGMII1";
1275                 groups = "RGMII1";
1276         };
1277
1278         pinctrl_rgmii2_default: rgmii2_default {
1279                 function = "RGMII2";
1280                 groups = "RGMII2";
1281         };
1282
1283         pinctrl_rmii1_default: rmii1_default {
1284                 function = "RMII1";
1285                 groups = "RMII1";
1286         };
1287
1288         pinctrl_rmii2_default: rmii2_default {
1289                 function = "RMII2";
1290                 groups = "RMII2";
1291         };
1292
1293         pinctrl_rxd1_default: rxd1_default {
1294                 function = "RXD1";
1295                 groups = "RXD1";
1296         };
1297
1298         pinctrl_rxd2_default: rxd2_default {
1299                 function = "RXD2";
1300                 groups = "RXD2";
1301         };
1302
1303         pinctrl_rxd3_default: rxd3_default {
1304                 function = "RXD3";
1305                 groups = "RXD3";
1306         };
1307
1308         pinctrl_rxd4_default: rxd4_default {
1309                 function = "RXD4";
1310                 groups = "RXD4";
1311         };
1312
1313         pinctrl_salt1_default: salt1_default {
1314                 function = "SALT1";
1315                 groups = "SALT1";
1316         };
1317
1318         pinctrl_salt10_default: salt10_default {
1319                 function = "SALT10";
1320                 groups = "SALT10";
1321         };
1322
1323         pinctrl_salt11_default: salt11_default {
1324                 function = "SALT11";
1325                 groups = "SALT11";
1326         };
1327
1328         pinctrl_salt12_default: salt12_default {
1329                 function = "SALT12";
1330                 groups = "SALT12";
1331         };
1332
1333         pinctrl_salt13_default: salt13_default {
1334                 function = "SALT13";
1335                 groups = "SALT13";
1336         };
1337
1338         pinctrl_salt14_default: salt14_default {
1339                 function = "SALT14";
1340                 groups = "SALT14";
1341         };
1342
1343         pinctrl_salt2_default: salt2_default {
1344                 function = "SALT2";
1345                 groups = "SALT2";
1346         };
1347
1348         pinctrl_salt3_default: salt3_default {
1349                 function = "SALT3";
1350                 groups = "SALT3";
1351         };
1352
1353         pinctrl_salt4_default: salt4_default {
1354                 function = "SALT4";
1355                 groups = "SALT4";
1356         };
1357
1358         pinctrl_salt5_default: salt5_default {
1359                 function = "SALT5";
1360                 groups = "SALT5";
1361         };
1362
1363         pinctrl_salt6_default: salt6_default {
1364                 function = "SALT6";
1365                 groups = "SALT6";
1366         };
1367
1368         pinctrl_salt7_default: salt7_default {
1369                 function = "SALT7";
1370                 groups = "SALT7";
1371         };
1372
1373         pinctrl_salt8_default: salt8_default {
1374                 function = "SALT8";
1375                 groups = "SALT8";
1376         };
1377
1378         pinctrl_salt9_default: salt9_default {
1379                 function = "SALT9";
1380                 groups = "SALT9";
1381         };
1382
1383         pinctrl_scl1_default: scl1_default {
1384                 function = "SCL1";
1385                 groups = "SCL1";
1386         };
1387
1388         pinctrl_scl2_default: scl2_default {
1389                 function = "SCL2";
1390                 groups = "SCL2";
1391         };
1392
1393         pinctrl_sd1_default: sd1_default {
1394                 function = "SD1";
1395                 groups = "SD1";
1396         };
1397
1398         pinctrl_sd2_default: sd2_default {
1399                 function = "SD2";
1400                 groups = "SD2";
1401         };
1402
1403         pinctrl_sda1_default: sda1_default {
1404                 function = "SDA1";
1405                 groups = "SDA1";
1406         };
1407
1408         pinctrl_sda2_default: sda2_default {
1409                 function = "SDA2";
1410                 groups = "SDA2";
1411         };
1412
1413         pinctrl_sgpm_default: sgpm_default {
1414                 function = "SGPM";
1415                 groups = "SGPM";
1416         };
1417
1418         pinctrl_sgps1_default: sgps1_default {
1419                 function = "SGPS1";
1420                 groups = "SGPS1";
1421         };
1422
1423         pinctrl_sgps2_default: sgps2_default {
1424                 function = "SGPS2";
1425                 groups = "SGPS2";
1426         };
1427
1428         pinctrl_sioonctrl_default: sioonctrl_default {
1429                 function = "SIOONCTRL";
1430                 groups = "SIOONCTRL";
1431         };
1432
1433         pinctrl_siopbi_default: siopbi_default {
1434                 function = "SIOPBI";
1435                 groups = "SIOPBI";
1436         };
1437
1438         pinctrl_siopbo_default: siopbo_default {
1439                 function = "SIOPBO";
1440                 groups = "SIOPBO";
1441         };
1442
1443         pinctrl_siopwreq_default: siopwreq_default {
1444                 function = "SIOPWREQ";
1445                 groups = "SIOPWREQ";
1446         };
1447
1448         pinctrl_siopwrgd_default: siopwrgd_default {
1449                 function = "SIOPWRGD";
1450                 groups = "SIOPWRGD";
1451         };
1452
1453         pinctrl_sios3_default: sios3_default {
1454                 function = "SIOS3";
1455                 groups = "SIOS3";
1456         };
1457
1458         pinctrl_sios5_default: sios5_default {
1459                 function = "SIOS5";
1460                 groups = "SIOS5";
1461         };
1462
1463         pinctrl_siosci_default: siosci_default {
1464                 function = "SIOSCI";
1465                 groups = "SIOSCI";
1466         };
1467
1468         pinctrl_spi1_default: spi1_default {
1469                 function = "SPI1";
1470                 groups = "SPI1";
1471         };
1472
1473         pinctrl_spi1cs1_default: spi1cs1_default {
1474                 function = "SPI1CS1";
1475                 groups = "SPI1CS1";
1476         };
1477
1478         pinctrl_spi1debug_default: spi1debug_default {
1479                 function = "SPI1DEBUG";
1480                 groups = "SPI1DEBUG";
1481         };
1482
1483         pinctrl_spi1passthru_default: spi1passthru_default {
1484                 function = "SPI1PASSTHRU";
1485                 groups = "SPI1PASSTHRU";
1486         };
1487
1488         pinctrl_spi2ck_default: spi2ck_default {
1489                 function = "SPI2CK";
1490                 groups = "SPI2CK";
1491         };
1492
1493         pinctrl_spi2cs0_default: spi2cs0_default {
1494                 function = "SPI2CS0";
1495                 groups = "SPI2CS0";
1496         };
1497
1498         pinctrl_spi2cs1_default: spi2cs1_default {
1499                 function = "SPI2CS1";
1500                 groups = "SPI2CS1";
1501         };
1502
1503         pinctrl_spi2miso_default: spi2miso_default {
1504                 function = "SPI2MISO";
1505                 groups = "SPI2MISO";
1506         };
1507
1508         pinctrl_spi2mosi_default: spi2mosi_default {
1509                 function = "SPI2MOSI";
1510                 groups = "SPI2MOSI";
1511         };
1512
1513         pinctrl_timer3_default: timer3_default {
1514                 function = "TIMER3";
1515                 groups = "TIMER3";
1516         };
1517
1518         pinctrl_timer4_default: timer4_default {
1519                 function = "TIMER4";
1520                 groups = "TIMER4";
1521         };
1522
1523         pinctrl_timer5_default: timer5_default {
1524                 function = "TIMER5";
1525                 groups = "TIMER5";
1526         };
1527
1528         pinctrl_timer6_default: timer6_default {
1529                 function = "TIMER6";
1530                 groups = "TIMER6";
1531         };
1532
1533         pinctrl_timer7_default: timer7_default {
1534                 function = "TIMER7";
1535                 groups = "TIMER7";
1536         };
1537
1538         pinctrl_timer8_default: timer8_default {
1539                 function = "TIMER8";
1540                 groups = "TIMER8";
1541         };
1542
1543         pinctrl_txd1_default: txd1_default {
1544                 function = "TXD1";
1545                 groups = "TXD1";
1546         };
1547
1548         pinctrl_txd2_default: txd2_default {
1549                 function = "TXD2";
1550                 groups = "TXD2";
1551         };
1552
1553         pinctrl_txd3_default: txd3_default {
1554                 function = "TXD3";
1555                 groups = "TXD3";
1556         };
1557
1558         pinctrl_txd4_default: txd4_default {
1559                 function = "TXD4";
1560                 groups = "TXD4";
1561         };
1562
1563         pinctrl_uart6_default: uart6_default {
1564                 function = "UART6";
1565                 groups = "UART6";
1566         };
1567
1568         pinctrl_usbcki_default: usbcki_default {
1569                 function = "USBCKI";
1570                 groups = "USBCKI";
1571         };
1572
1573         pinctrl_usb2ah_default: usb2ah_default {
1574                 function = "USB2AH";
1575                 groups = "USB2AH";
1576         };
1577
1578         pinctrl_usb2ad_default: usb2ad_default {
1579                 function = "USB2AD";
1580                 groups = "USB2AD";
1581         };
1582
1583         pinctrl_usb11bhid_default: usb11bhid_default {
1584                 function = "USB11BHID";
1585                 groups = "USB11BHID";
1586         };
1587
1588         pinctrl_usb2bh_default: usb2bh_default {
1589                 function = "USB2BH";
1590                 groups = "USB2BH";
1591         };
1592
1593         pinctrl_vgabiosrom_default: vgabiosrom_default {
1594                 function = "VGABIOSROM";
1595                 groups = "VGABIOSROM";
1596         };
1597
1598         pinctrl_vgahs_default: vgahs_default {
1599                 function = "VGAHS";
1600                 groups = "VGAHS";
1601         };
1602
1603         pinctrl_vgavs_default: vgavs_default {
1604                 function = "VGAVS";
1605                 groups = "VGAVS";
1606         };
1607
1608         pinctrl_vpi24_default: vpi24_default {
1609                 function = "VPI24";
1610                 groups = "VPI24";
1611         };
1612
1613         pinctrl_vpo_default: vpo_default {
1614                 function = "VPO";
1615                 groups = "VPO";
1616         };
1617
1618         pinctrl_wdtrst1_default: wdtrst1_default {
1619                 function = "WDTRST1";
1620                 groups = "WDTRST1";
1621         };
1622
1623         pinctrl_wdtrst2_default: wdtrst2_default {
1624                 function = "WDTRST2";
1625                 groups = "WDTRST2";
1626         };
1627 };