arch/arm/boot/dts/aspeed-ast2600-evb.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 // Copyright 2019 IBM Corp.
   3
   4 /dts-v1/;
   5
   6 #include "aspeed-g6.dtsi"
   7 #include <dt-bindings/gpio/aspeed-gpio.h>
   8
   9 / {
  10         model = "AST2600 EVB";
  11         compatible = "aspeed,ast2600";
  12
  13         aliases {
  14                 serial4 = &uart5;
  15         };
  16
  17         chosen {
  18                 bootargs = "console=ttyS4,115200n8";
  19         };
  20
  21         memory@80000000 {
  22                 device_type = "memory";
  23                 reg = <0x80000000 0x80000000>;
  24         };
  25
  26         vcc_sdhci0: regulator-vcc-sdhci0 {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "SDHCI0 Vcc";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31                 gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
  32                 enable-active-high;
  33         };
  34
  35         vccq_sdhci0: regulator-vccq-sdhci0 {
  36                 compatible = "regulator-gpio";
  37                 regulator-name = "SDHCI0 VccQ";
  38                 regulator-min-microvolt = <1800000>;
  39                 regulator-max-microvolt = <3300000>;
  40                 gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
  41                 gpios-states = <1>;
  42                 states = <3300000 1>,
  43                          <1800000 0>;
  44         };
  45
  46         vcc_sdhci1: regulator-vcc-sdhci1 {
  47                 compatible = "regulator-fixed";
  48                 regulator-name = "SDHCI1 Vcc";
  49                 regulator-min-microvolt = <3300000>;
  50                 regulator-max-microvolt = <3300000>;
  51                 gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
  52                 enable-active-high;
  53         };
  54
  55         vccq_sdhci1: regulator-vccq-sdhci1 {
  56                 compatible = "regulator-gpio";
  57                 regulator-name = "SDHCI1 VccQ";
  58                 regulator-min-microvolt = <1800000>;
  59                 regulator-max-microvolt = <3300000>;
  60                 gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
  61                 gpios-states = <1>;
  62                 states = <3300000 1>,
  63                          <1800000 0>;
  64         };
  65 };
  66
  67 &mdio0 {
  68         status = "okay";
  69
  70         ethphy0: ethernet-phy@0 {
  71                 compatible = "ethernet-phy-ieee802.3-c22";
  72                 reg = <0>;
  73         };
  74 };
  75
  76 &mdio1 {
  77         status = "okay";
  78
  79         ethphy1: ethernet-phy@0 {
  80                 compatible = "ethernet-phy-ieee802.3-c22";
  81                 reg = <0>;
  82         };
  83 };
  84
  85 &mdio2 {
  86         status = "okay";
  87
  88         ethphy2: ethernet-phy@0 {
  89                 compatible = "ethernet-phy-ieee802.3-c22";
  90                 reg = <0>;
  91         };
  92 };
  93
  94 &mdio3 {
  95         status = "okay";
  96
  97         ethphy3: ethernet-phy@0 {
  98                 compatible = "ethernet-phy-ieee802.3-c22";
  99                 reg = <0>;
 100         };
 101 };
 102
 103 &mac0 {
 104         status = "okay";
 105
 106         phy-mode = "rgmii";
 107         phy-handle = <&ethphy0>;
 108
 109         pinctrl-names = "default";
 110         pinctrl-0 = <&pinctrl_rgmii1_default>;
 111 };
 112
 113
 114 &mac1 {
 115         status = "okay";
 116
 117         phy-mode = "rgmii";
 118         phy-handle = <&ethphy1>;
 119
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&pinctrl_rgmii2_default>;
 122 };
 123
 124 &mac2 {
 125         status = "okay";
 126
 127         phy-mode = "rgmii";
 128         phy-handle = <&ethphy2>;
 129
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_rgmii3_default>;
 132 };
 133
 134 &mac3 {
 135         status = "okay";
 136
 137         phy-mode = "rgmii";
 138         phy-handle = <&ethphy3>;
 139
 140         pinctrl-names = "default";
 141         pinctrl-0 = <&pinctrl_rgmii4_default>;
 142 };
 143
 144 &emmc_controller {
 145         status = "okay";
 146 };
 147
 148 &emmc {
 149         non-removable;
 150         bus-width = <4>;
 151         max-frequency = <100000000>;
 152         clk-phase-mmc-hs200 = <9>, <225>;
 153 };
 154
 155 &rtc {
 156         status = "okay";
 157 };
 158
 159 &fmc {
 160         status = "okay";
 161         flash@0 {
 162                 status = "okay";
 163                 m25p,fast-read;
 164                 label = "bmc";
 165                 spi-max-frequency = <50000000>;
 166 #include "openbmc-flash-layout-64.dtsi"
 167         };
 168 };
 169
 170 &spi1 {
 171         status = "okay";
 172         pinctrl-names = "default";
 173         pinctrl-0 = <&pinctrl_spi1_default>;
 174
 175         flash@0 {
 176                 status = "okay";
 177                 m25p,fast-read;
 178                 label = "pnor";
 179                 spi-max-frequency = <100000000>;
 180         };
 181 };
 182
 183 &uart5 {
 184         // Workaround for A0
 185         compatible = "snps,dw-apb-uart";
 186 };
 187
 188 &i2c0 {
 189         status = "okay";
 190
 191         temp@2e {
 192                 compatible = "adi,adt7490";
 193                 reg = <0x2e>;
 194         };
 195 };
 196
 197 &i2c1 {
 198         status = "okay";
 199 };
 200
 201 &i2c2 {
 202         status = "okay";
 203 };
 204
 205 &i2c3 {
 206         status = "okay";
 207 };
 208
 209 &i2c4 {
 210         status = "okay";
 211 };
 212
 213 &i2c5 {
 214         status = "okay";
 215 };
 216
 217 &i2c6 {
 218         status = "okay";
 219 };
 220
 221 &i2c7 {
 222         status = "okay";
 223 };
 224
 225 &i2c8 {
 226         status = "okay";
 227 };
 228
 229 &i2c9 {
 230         status = "okay";
 231 };
 232
 233 &i2c12 {
 234         status = "okay";
 235 };
 236
 237 &i2c13 {
 238         status = "okay";
 239 };
 240
 241 &i2c14 {
 242         status = "okay";
 243 };
 244
 245 &i2c15 {
 246         status = "okay";
 247 };
 248
 249 &fsim0 {
 250         status = "okay";
 251 };
 252
 253 &ehci1 {
 254         status = "okay";
 255 };
 256
 257 &uhci {
 258         status = "okay";
 259 };
 260
 261 &sdc {
 262         status = "okay";
 263 };
 264
 265 /*
 266  * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be
 267  * toggled by GPIO pins.
 268  * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the
 269  * power load switch that provides 3.3v to sdhci0 vdd, GPIOV1 is connected to
 270  * a 1.8v and a 3.3v power load switch that provides signal voltage to
 271  * sdhci0 bus.
 272  * If GPIOV0 is active high, sdhci0 is enabled, otherwise, sdhci0 is disabled.
 273  * If GPIOV1 is active high, 3.3v power load switch is enabled, sdhci0 signal
 274  * voltage is 3.3v, otherwise, 1.8v power load switch will be enabled,
 275  * sdhci0 signal voltage becomes 1.8v.
 276  * AST2600-A2 EVB also supports toggling signal voltage for sdhci1.
 277  * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3
 278  * as power-switch-gpio.
 279  */
 280 &sdhci0 {
 281         status = "okay";
 282         bus-width = <4>;
 283         max-frequency = <100000000>;
 284         sdhci-drive-type = /bits/ 8 <3>;
 285         sdhci-caps-mask = <0x7 0x0>;
 286         sdhci,wp-inverted;
 287         vmmc-supply = <&vcc_sdhci0>;
 288         vqmmc-supply = <&vccq_sdhci0>;
 289         clk-phase-sd-hs = <7>, <200>;
 290 };
 291
 292 &sdhci1 {
 293         status = "okay";
 294         bus-width = <4>;
 295         max-frequency = <100000000>;
 296         sdhci-drive-type = /bits/ 8 <3>;
 297         sdhci-caps-mask = <0x7 0x0>;
 298         sdhci,wp-inverted;
 299         vmmc-supply = <&vcc_sdhci1>;
 300         vqmmc-supply = <&vccq_sdhci1>;
 301         clk-phase-sd-hs = <7>, <200>;
 302 };