arch/arm/boot/dts/am33xx.dtsi

   1 /*
   2  * Device Tree Source for AM33XX SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pinctrl/am33xx.h>
  14 #include <dt-bindings/clock/am3.h>
  15
  16 / {
  17         compatible = "ti,am33xx";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 serial0 = &uart0;
  28                 serial1 = &uart1;
  29                 serial2 = &uart2;
  30                 serial3 = &uart3;
  31                 serial4 = &uart4;
  32                 serial5 = &uart5;
  33                 d-can0 = &dcan0;
  34                 d-can1 = &dcan1;
  35                 usb0 = &usb0;
  36                 usb1 = &usb1;
  37                 phy0 = &usb0_phy;
  38                 phy1 = &usb1_phy;
  39                 ethernet0 = &cpsw_emac0;
  40                 ethernet1 = &cpsw_emac1;
  41                 spi0 = &spi0;
  42                 spi1 = &spi1;
  43         };
  44
  45         cpus {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48                 cpu@0 {
  49                         compatible = "arm,cortex-a8";
  50                         enable-method = "ti,am3352";
  51                         device_type = "cpu";
  52                         reg = <0>;
  53
  54                         operating-points-v2 = <&cpu0_opp_table>;
  55
  56                         clocks = <&dpll_mpu_ck>;
  57                         clock-names = "cpu";
  58
  59                         clock-latency = <300000>; /* From omap-cpufreq driver */
  60                         cpu-idle-states = <&mpu_gate>;
  61                 };
  62
  63                 idle-states {
  64                         mpu_gate: mpu_gate {
  65                                 compatible = "arm,idle-state";
  66                                 entry-latency-us = <40>;
  67                                 exit-latency-us = <90>;
  68                                 min-residency-us = <300>;
  69                                 ti,idle-wkup-m3;
  70                         };
  71                 };
  72         };
  73
  74         cpu0_opp_table: opp-table {
  75                 compatible = "operating-points-v2-ti-cpu";
  76                 syscon = <&scm_conf>;
  77
  78                 /*
  79                  * The three following nodes are marked with opp-suspend
  80                  * because the can not be enabled simultaneously on a
  81                  * single SoC.
  82                  */
  83                 opp50-300000000 {
  84                         opp-hz = /bits/ 64 <300000000>;
  85                         opp-microvolt = <950000 931000 969000>;
  86                         opp-supported-hw = <0x06 0x0010>;
  87                         opp-suspend;
  88                 };
  89
  90                 opp100-275000000 {
  91                         opp-hz = /bits/ 64 <275000000>;
  92                         opp-microvolt = <1100000 1078000 1122000>;
  93                         opp-supported-hw = <0x01 0x00FF>;
  94                         opp-suspend;
  95                 };
  96
  97                 opp100-300000000 {
  98                         opp-hz = /bits/ 64 <300000000>;
  99                         opp-microvolt = <1100000 1078000 1122000>;
 100                         opp-supported-hw = <0x06 0x0020>;
 101                         opp-suspend;
 102                 };
 103
 104                 opp100-500000000 {
 105                         opp-hz = /bits/ 64 <500000000>;
 106                         opp-microvolt = <1100000 1078000 1122000>;
 107                         opp-supported-hw = <0x01 0xFFFF>;
 108                 };
 109
 110                 opp100-600000000 {
 111                         opp-hz = /bits/ 64 <600000000>;
 112                         opp-microvolt = <1100000 1078000 1122000>;
 113                         opp-supported-hw = <0x06 0x0040>;
 114                 };
 115
 116                 opp120-600000000 {
 117                         opp-hz = /bits/ 64 <600000000>;
 118                         opp-microvolt = <1200000 1176000 1224000>;
 119                         opp-supported-hw = <0x01 0xFFFF>;
 120                 };
 121
 122                 opp120-720000000 {
 123                         opp-hz = /bits/ 64 <720000000>;
 124                         opp-microvolt = <1200000 1176000 1224000>;
 125                         opp-supported-hw = <0x06 0x0080>;
 126                 };
 127
 128                 oppturbo-720000000 {
 129                         opp-hz = /bits/ 64 <720000000>;
 130                         opp-microvolt = <1260000 1234800 1285200>;
 131                         opp-supported-hw = <0x01 0xFFFF>;
 132                 };
 133
 134                 oppturbo-800000000 {
 135                         opp-hz = /bits/ 64 <800000000>;
 136                         opp-microvolt = <1260000 1234800 1285200>;
 137                         opp-supported-hw = <0x06 0x0100>;
 138                 };
 139
 140                 oppnitro-1000000000 {
 141                         opp-hz = /bits/ 64 <1000000000>;
 142                         opp-microvolt = <1325000 1298500 1351500>;
 143                         opp-supported-hw = <0x04 0x0200>;
 144                 };
 145         };
 146
 147         target-module@4b000000 {
 148                 compatible = "ti,sysc-omap4-simple", "ti,sysc";
 149                 clocks = <&l3_clkctrl AM3_L3_L3_INSTR_CLKCTRL 0>;
 150                 clock-names = "fck";
 151                 ti,no-idle;
 152                 #address-cells = <1>;
 153                 #size-cells = <1>;
 154                 ranges = <0x0 0x4b000000 0x1000000>;
 155
 156                 target-module@140000 {
 157                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 158                         clocks = <&l3_aon_clkctrl AM3_L3_AON_DEBUGSS_CLKCTRL 0>;
 159                         clock-names = "fck";
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         ranges = <0x0 0x140000 0xec0000>;
 163
 164                         pmu@0 {
 165                                 compatible = "arm,cortex-a8-pmu";
 166                                 interrupts = <3>;
 167                         };
 168                 };
 169         };
 170
 171         /*
 172          * The soc node represents the soc top level view. It is used for IPs
 173          * that are not memory mapped in the MPU view or for the MPU itself.
 174          */
 175         soc {
 176                 compatible = "ti,omap-infra";
 177         };
 178
 179         /*
 180          * XXX: Use a flat representation of the AM33XX interconnect.
 181          * The real AM33XX interconnect network is quite complex. Since
 182          * it will not bring real advantage to represent that in DT
 183          * for the moment, just use a fake OCP bus entry to represent
 184          * the whole bus hierarchy.
 185          */
 186         ocp: ocp {
 187                 compatible = "simple-pm-bus";
 188                 power-domains = <&prm_per>;
 189                 clocks = <&l3_clkctrl AM3_L3_L3_MAIN_CLKCTRL 0>;
 190                 clock-names = "fck";
 191                 #address-cells = <1>;
 192                 #size-cells = <1>;
 193                 ranges;
 194
 195                 l4_wkup: interconnect@44c00000 {
 196                 };
 197                 l4_per: interconnect@48000000 {
 198                 };
 199                 l4_fw: interconnect@47c00000 {
 200                 };
 201                 l4_fast: interconnect@4a000000 {
 202                 };
 203                 l4_mpuss: interconnect@4b140000 {
 204                 };
 205
 206                 intc: interrupt-controller@48200000 {
 207                         compatible = "ti,am33xx-intc";
 208                         interrupt-controller;
 209                         #interrupt-cells = <1>;
 210                         reg = <0x48200000 0x1000>;
 211                 };
 212
 213                 target-module@49000000 {
 214                         compatible = "ti,sysc-omap4", "ti,sysc";
 215                         reg = <0x49000000 0x4>;
 216                         reg-names = "rev";
 217                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
 218                         clock-names = "fck";
 219                         #address-cells = <1>;
 220                         #size-cells = <1>;
 221                         ranges = <0x0 0x49000000 0x10000>;
 222
 223                         edma: dma@0 {
 224                                 compatible = "ti,edma3-tpcc";
 225                                 reg = <0 0x10000>;
 226                                 reg-names = "edma3_cc";
 227                                 interrupts = <12 13 14>;
 228                                 interrupt-names = "edma3_ccint", "edma3_mperr",
 229                                                   "edma3_ccerrint";
 230                                 dma-requests = <64>;
 231                                 #dma-cells = <2>;
 232
 233                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 234                                            <&edma_tptc2 0>;
 235
 236                                 ti,edma-memcpy-channels = <20 21>;
 237                         };
 238                 };
 239
 240                 target-module@49800000 {
 241                         compatible = "ti,sysc-omap4", "ti,sysc";
 242                         reg = <0x49800000 0x4>,
 243                               <0x49800010 0x4>;
 244                         reg-names = "rev", "sysc";
 245                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 246                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 247                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 248                                         <SYSC_IDLE_SMART>;
 249                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
 250                         clock-names = "fck";
 251                         #address-cells = <1>;
 252                         #size-cells = <1>;
 253                         ranges = <0x0 0x49800000 0x100000>;
 254
 255                         edma_tptc0: dma@0 {
 256                                 compatible = "ti,edma3-tptc";
 257                                 reg = <0 0x100000>;
 258                                 interrupts = <112>;
 259                                 interrupt-names = "edma3_tcerrint";
 260                         };
 261                 };
 262
 263                 target-module@49900000 {
 264                         compatible = "ti,sysc-omap4", "ti,sysc";
 265                         reg = <0x49900000 0x4>,
 266                               <0x49900010 0x4>;
 267                         reg-names = "rev", "sysc";
 268                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 269                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 270                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 271                                         <SYSC_IDLE_SMART>;
 272                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
 273                         clock-names = "fck";
 274                         #address-cells = <1>;
 275                         #size-cells = <1>;
 276                         ranges = <0x0 0x49900000 0x100000>;
 277
 278                         edma_tptc1: dma@0 {
 279                                 compatible = "ti,edma3-tptc";
 280                                 reg = <0 0x100000>;
 281                                 interrupts = <113>;
 282                                 interrupt-names = "edma3_tcerrint";
 283                         };
 284                 };
 285
 286                 target-module@49a00000 {
 287                         compatible = "ti,sysc-omap4", "ti,sysc";
 288                         reg = <0x49a00000 0x4>,
 289                               <0x49a00010 0x4>;
 290                         reg-names = "rev", "sysc";
 291                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 292                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 293                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 294                                         <SYSC_IDLE_SMART>;
 295                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
 296                         clock-names = "fck";
 297                         #address-cells = <1>;
 298                         #size-cells = <1>;
 299                         ranges = <0x0 0x49a00000 0x100000>;
 300
 301                         edma_tptc2: dma@0 {
 302                                 compatible = "ti,edma3-tptc";
 303                                 reg = <0 0x100000>;
 304                                 interrupts = <114>;
 305                                 interrupt-names = "edma3_tcerrint";
 306                         };
 307                 };
 308
 309                 target-module@47810000 {
 310                         compatible = "ti,sysc-omap2", "ti,sysc";
 311                         reg = <0x478102fc 0x4>,
 312                               <0x47810110 0x4>,
 313                               <0x47810114 0x4>;
 314                         reg-names = "rev", "sysc", "syss";
 315                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 316                                          SYSC_OMAP2_ENAWAKEUP |
 317                                          SYSC_OMAP2_SOFTRESET |
 318                                          SYSC_OMAP2_AUTOIDLE)>;
 319                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 320                                         <SYSC_IDLE_NO>,
 321                                         <SYSC_IDLE_SMART>;
 322                         ti,syss-mask = <1>;
 323                         clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
 324                         clock-names = "fck";
 325                         #address-cells = <1>;
 326                         #size-cells = <1>;
 327                         ranges = <0x0 0x47810000 0x1000>;
 328
 329                         mmc3: mmc@0 {
 330                                 compatible = "ti,am335-sdhci";
 331                                 ti,needs-special-reset;
 332                                 interrupts = <29>;
 333                                 reg = <0x0 0x1000>;
 334                                 status = "disabled";
 335                         };
 336                 };
 337
 338                 usb: target-module@47400000 {
 339                         compatible = "ti,sysc-omap4", "ti,sysc";
 340                         reg = <0x47400000 0x4>,
 341                               <0x47400010 0x4>;
 342                         reg-names = "rev", "sysc";
 343                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
 344                                          SYSC_OMAP4_SOFTRESET)>;
 345                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 346                                         <SYSC_IDLE_NO>,
 347                                         <SYSC_IDLE_SMART>;
 348                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 349                                         <SYSC_IDLE_NO>,
 350                                         <SYSC_IDLE_SMART>,
 351                                         <SYSC_IDLE_SMART_WKUP>;
 352                         clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
 353                         clock-names = "fck";
 354                         #address-cells = <1>;
 355                         #size-cells = <1>;
 356                         ranges = <0x0 0x47400000 0x8000>;
 357
 358                         usb0_phy: usb-phy@1300 {
 359                                 compatible = "ti,am335x-usb-phy";
 360                                 reg = <0x1300 0x100>;
 361                                 reg-names = "phy";
 362                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 363                                 #phy-cells = <0>;
 364                         };
 365
 366                         usb0: usb@1400 {
 367                                 compatible = "ti,musb-am33xx";
 368                                 reg = <0x1400 0x400>,
 369                                       <0x1000 0x200>;
 370                                 reg-names = "mc", "control";
 371
 372                                 interrupts = <18>;
 373                                 interrupt-names = "mc";
 374                                 dr_mode = "otg";
 375                                 mentor,multipoint = <1>;
 376                                 mentor,num-eps = <16>;
 377                                 mentor,ram-bits = <12>;
 378                                 mentor,power = <500>;
 379                                 phys = <&usb0_phy>;
 380
 381                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
 382                                         &cppi41dma  2 0 &cppi41dma  3 0
 383                                         &cppi41dma  4 0 &cppi41dma  5 0
 384                                         &cppi41dma  6 0 &cppi41dma  7 0
 385                                         &cppi41dma  8 0 &cppi41dma  9 0
 386                                         &cppi41dma 10 0 &cppi41dma 11 0
 387                                         &cppi41dma 12 0 &cppi41dma 13 0
 388                                         &cppi41dma 14 0 &cppi41dma  0 1
 389                                         &cppi41dma  1 1 &cppi41dma  2 1
 390                                         &cppi41dma  3 1 &cppi41dma  4 1
 391                                         &cppi41dma  5 1 &cppi41dma  6 1
 392                                         &cppi41dma  7 1 &cppi41dma  8 1
 393                                         &cppi41dma  9 1 &cppi41dma 10 1
 394                                         &cppi41dma 11 1 &cppi41dma 12 1
 395                                         &cppi41dma 13 1 &cppi41dma 14 1>;
 396                                 dma-names =
 397                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 398                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 399                                         "rx14", "rx15",
 400                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 401                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 402                                         "tx14", "tx15";
 403                         };
 404
 405                         usb1_phy: usb-phy@1b00 {
 406                                 compatible = "ti,am335x-usb-phy";
 407                                 reg = <0x1b00 0x100>;
 408                                 reg-names = "phy";
 409                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 410                                 #phy-cells = <0>;
 411                         };
 412
 413                         usb1: usb@1800 {
 414                                 compatible = "ti,musb-am33xx";
 415                                 reg = <0x1c00 0x400>,
 416                                       <0x1800 0x200>;
 417                                 reg-names = "mc", "control";
 418                                 interrupts = <19>;
 419                                 interrupt-names = "mc";
 420                                 dr_mode = "otg";
 421                                 mentor,multipoint = <1>;
 422                                 mentor,num-eps = <16>;
 423                                 mentor,ram-bits = <12>;
 424                                 mentor,power = <500>;
 425                                 phys = <&usb1_phy>;
 426
 427                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
 428                                         &cppi41dma 17 0 &cppi41dma 18 0
 429                                         &cppi41dma 19 0 &cppi41dma 20 0
 430                                         &cppi41dma 21 0 &cppi41dma 22 0
 431                                         &cppi41dma 23 0 &cppi41dma 24 0
 432                                         &cppi41dma 25 0 &cppi41dma 26 0
 433                                         &cppi41dma 27 0 &cppi41dma 28 0
 434                                         &cppi41dma 29 0 &cppi41dma 15 1
 435                                         &cppi41dma 16 1 &cppi41dma 17 1
 436                                         &cppi41dma 18 1 &cppi41dma 19 1
 437                                         &cppi41dma 20 1 &cppi41dma 21 1
 438                                         &cppi41dma 22 1 &cppi41dma 23 1
 439                                         &cppi41dma 24 1 &cppi41dma 25 1
 440                                         &cppi41dma 26 1 &cppi41dma 27 1
 441                                         &cppi41dma 28 1 &cppi41dma 29 1>;
 442                                 dma-names =
 443                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 444                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 445                                         "rx14", "rx15",
 446                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 447                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 448                                         "tx14", "tx15";
 449                         };
 450
 451                         cppi41dma: dma-controller@2000 {
 452                                 compatible = "ti,am3359-cppi41";
 453                                 reg =  <0x0000 0x1000>,
 454                                        <0x2000 0x1000>,
 455                                        <0x3000 0x1000>,
 456                                        <0x4000 0x4000>;
 457                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
 458                                 interrupts = <17>;
 459                                 interrupt-names = "glue";
 460                                 #dma-cells = <2>;
 461                                 #dma-channels = <30>;
 462                                 #dma-requests = <256>;
 463                         };
 464                 };
 465
 466                 target-module@40300000 {
 467                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 468                         clocks = <&l3_clkctrl AM3_L3_OCMCRAM_CLKCTRL 0>;
 469                         clock-names = "fck";
 470                         ti,no-idle;
 471                         #address-cells = <1>;
 472                         #size-cells = <1>;
 473                         ranges = <0 0x40300000 0x10000>;
 474
 475                         ocmcram: sram@0 {
 476                                 compatible = "mmio-sram";
 477                                 reg = <0 0x10000>; /* 64k */
 478                                 ranges = <0 0 0x10000>;
 479                                 #address-cells = <1>;
 480                                 #size-cells = <1>;
 481
 482                                 pm_sram_code: pm-code-sram@0 {
 483                                         compatible = "ti,sram";
 484                                         reg = <0x0 0x1000>;
 485                                         protect-exec;
 486                                 };
 487
 488                                 pm_sram_data: pm-data-sram@1000 {
 489                                         compatible = "ti,sram";
 490                                         reg = <0x1000 0x1000>;
 491                                         pool;
 492                                 };
 493                         };
 494                 };
 495
 496                 target-module@4c000000 {
 497                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 498                         reg = <0x4c000000 0x4>;
 499                         reg-names = "rev";
 500                         clocks = <&l3_clkctrl AM3_L3_EMIF_CLKCTRL 0>;
 501                         clock-names = "fck";
 502                         ti,no-idle;
 503                         #address-cells = <1>;
 504                         #size-cells = <1>;
 505                         ranges = <0x0 0x4c000000 0x1000000>;
 506
 507                         emif: emif@0 {
 508                                 compatible = "ti,emif-am3352";
 509                                 reg = <0 0x1000000>;
 510                                 interrupts = <101>;
 511                                 sram = <&pm_sram_code
 512                                         &pm_sram_data>;
 513                         };
 514                 };
 515
 516                 target-module@50000000 {
 517                         compatible = "ti,sysc-omap2", "ti,sysc";
 518                         reg = <0x50000000 4>,
 519                               <0x50000010 4>,
 520                               <0x50000014 4>;
 521                         reg-names = "rev", "sysc", "syss";
 522                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 523                                         <SYSC_IDLE_NO>,
 524                                         <SYSC_IDLE_SMART>;
 525                         ti,syss-mask = <1>;
 526                         clocks = <&l3s_clkctrl AM3_L3S_GPMC_CLKCTRL 0>;
 527                         clock-names = "fck";
 528                         #address-cells = <1>;
 529                         #size-cells = <1>;
 530                         ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
 531                                  <0x00000000 0x00000000 0x40000000>; /* data */
 532
 533                         gpmc: gpmc@50000000 {
 534                                 compatible = "ti,am3352-gpmc";
 535                                 reg = <0x50000000 0x2000>;
 536                                 interrupts = <100>;
 537                                 dmas = <&edma 52 0>;
 538                                 dma-names = "rxtx";
 539                                 gpmc,num-cs = <7>;
 540                                 gpmc,num-waitpins = <2>;
 541                                 #address-cells = <2>;
 542                                 #size-cells = <1>;
 543                                 interrupt-controller;
 544                                 #interrupt-cells = <2>;
 545                                 gpio-controller;
 546                                 #gpio-cells = <2>;
 547                                 status = "disabled";
 548                         };
 549                 };
 550
 551                 sham_target: target-module@53100000 {
 552                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
 553                         reg = <0x53100100 0x4>,
 554                               <0x53100110 0x4>,
 555                               <0x53100114 0x4>;
 556                         reg-names = "rev", "sysc", "syss";
 557                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 558                                          SYSC_OMAP2_AUTOIDLE)>;
 559                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 560                                         <SYSC_IDLE_NO>,
 561                                         <SYSC_IDLE_SMART>;
 562                         ti,syss-mask = <1>;
 563                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 564                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
 565                         clock-names = "fck";
 566                         #address-cells = <1>;
 567                         #size-cells = <1>;
 568                         ranges = <0x0 0x53100000 0x1000>;
 569
 570                         sham: sham@0 {
 571                                 compatible = "ti,omap4-sham";
 572                                 reg = <0 0x200>;
 573                                 interrupts = <109>;
 574                                 dmas = <&edma 36 0>;
 575                                 dma-names = "rx";
 576                         };
 577                 };
 578
 579                 aes_target: target-module@53500000 {
 580                         compatible = "ti,sysc-omap2", "ti,sysc";
 581                         reg = <0x53500080 0x4>,
 582                               <0x53500084 0x4>,
 583                               <0x53500088 0x4>;
 584                         reg-names = "rev", "sysc", "syss";
 585                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 586                                          SYSC_OMAP2_AUTOIDLE)>;
 587                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 588                                         <SYSC_IDLE_NO>,
 589                                         <SYSC_IDLE_SMART>,
 590                                         <SYSC_IDLE_SMART_WKUP>;
 591                         ti,syss-mask = <1>;
 592                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 593                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
 594                         clock-names = "fck";
 595                         #address-cells = <1>;
 596                         #size-cells = <1>;
 597                         ranges = <0x0 0x53500000 0x1000>;
 598
 599                         aes: aes@0 {
 600                                 compatible = "ti,omap4-aes";
 601                                 reg = <0 0xa0>;
 602                                 interrupts = <103>;
 603                                 dmas = <&edma 6 0>,
 604                                        <&edma 5 0>;
 605                                 dma-names = "tx", "rx";
 606                         };
 607                 };
 608
 609                 target-module@56000000 {
 610                         compatible = "ti,sysc-omap4", "ti,sysc";
 611                         reg = <0x5600fe00 0x4>,
 612                               <0x5600fe10 0x4>;
 613                         reg-names = "rev", "sysc";
 614                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 615                                         <SYSC_IDLE_NO>,
 616                                         <SYSC_IDLE_SMART>;
 617                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 618                                         <SYSC_IDLE_NO>,
 619                                         <SYSC_IDLE_SMART>;
 620                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
 621                         clock-names = "fck";
 622                         power-domains = <&prm_gfx>;
 623                         resets = <&prm_gfx 0>;
 624                         reset-names = "rstctrl";
 625                         #address-cells = <1>;
 626                         #size-cells = <1>;
 627                         ranges = <0 0x56000000 0x1000000>;
 628
 629                         /*
 630                          * Closed source PowerVR driver, no child device
 631                          * binding or driver in mainline
 632                          */
 633                 };
 634         };
 635 };
 636
 637 #include "am33xx-l4.dtsi"
 638 #include "am33xx-clocks.dtsi"
 639
 640 &prcm {
 641         prm_per: prm@c00 {
 642                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 643                 reg = <0xc00 0x100>;
 644                 #reset-cells = <1>;
 645                 #power-domain-cells = <0>;
 646         };
 647
 648         prm_wkup: prm@d00 {
 649                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 650                 reg = <0xd00 0x100>;
 651                 #reset-cells = <1>;
 652                 #power-domain-cells = <0>;
 653         };
 654
 655         prm_mpu: prm@e00 {
 656                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 657                 reg = <0xe00 0x100>;
 658                 #power-domain-cells = <0>;
 659         };
 660
 661         prm_device: prm@f00 {
 662                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 663                 reg = <0xf00 0x100>;
 664                 #reset-cells = <1>;
 665         };
 666
 667         prm_rtc: prm@1000 {
 668                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 669                 reg = <0x1000 0x100>;
 670                 #power-domain-cells = <0>;
 671         };
 672
 673         prm_gfx: prm@1100 {
 674                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 675                 reg = <0x1100 0x100>;
 676                 #power-domain-cells = <0>;
 677                 #reset-cells = <1>;
 678         };
 679
 680         prm_cefuse: prm@1200 {
 681                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 682                 reg = <0x1200 0x100>;
 683                 #power-domain-cells = <0>;
 684         };
 685 };
 686
 687 /* Preferred always-on timer for clocksource */
 688 &timer1_target {
 689         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>,
 690                  <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
 691         clock-names = "fck", "ick";
 692         ti,no-reset-on-init;
 693         ti,no-idle;
 694         timer@0 {
 695                 assigned-clocks = <&timer1_fck>;
 696                 assigned-clock-parents = <&sys_clkin_ck>;
 697         };
 698 };
 699
 700 /* Preferred timer for clockevent */
 701 &timer2_target {
 702         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>,
 703                  <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
 704         clock-names = "fck", "ick";
 705         ti,no-reset-on-init;
 706         ti,no-idle;
 707         timer@0 {
 708                 assigned-clocks = <&timer2_fck>;
 709                 assigned-clock-parents = <&sys_clkin_ck>;
 710         };
 711 };