Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
[linux-2.6-microblaze.git] / arch / arm / boot / dts / am335x-pepper.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/
4  */
5 /dts-v1/;
6
7 #include <dt-bindings/input/input.h>
8 #include "am33xx.dtsi"
9
10 / {
11         model = "Gumstix Pepper";
12         compatible = "gumstix,am335x-pepper", "ti,am33xx";
13
14         cpus {
15                 cpu@0 {
16                         cpu0-supply = <&dcdc3_reg>;
17                 };
18         };
19
20         memory@80000000 {
21                 device_type = "memory";
22                 reg = <0x80000000 0x20000000>; /* 512 MB */
23         };
24
25         buttons: user_buttons {
26                 compatible = "gpio-keys";
27         };
28
29         leds: user_leds {
30                 compatible = "gpio-leds";
31         };
32
33         panel: lcd_panel {
34                 compatible = "ti,tilcdc,panel";
35         };
36
37         sound: sound_iface {
38                 compatible = "ti,da830-evm-audio";
39         };
40
41         vbat: fixedregulator0 {
42                 compatible = "regulator-fixed";
43         };
44
45         v3v3c_reg: fixedregulator1 {
46                 compatible = "regulator-fixed";
47         };
48
49         vdd5_reg: fixedregulator2 {
50                 compatible = "regulator-fixed";
51         };
52 };
53
54 /* I2C Busses */
55 &i2c0 {
56         status = "okay";
57         pinctrl-names = "default";
58         pinctrl-0 = <&i2c0_pins>;
59
60         clock-frequency = <400000>;
61
62         tps: tps@24 {
63                 reg = <0x24>;
64         };
65
66         eeprom: eeprom@50 {
67                 compatible = "atmel,24c256";
68                 reg = <0x50>;
69         };
70
71         audio_codec: tlv320aic3106@1b {
72                 compatible = "ti,tlv320aic3106";
73                 reg = <0x1b>;
74                 ai3x-micbias-vg = <0x2>;
75         };
76
77         accel: lis331dlh@1d {
78                 compatible = "st,lis3lv02d";
79                 reg = <0x1d>;
80         };
81 };
82
83 &i2c1 {
84         status = "okay";
85         pinctrl-names = "default";
86         pinctrl-0 = <&i2c1_pins>;
87         clock-frequency = <400000>;
88 };
89
90 &am33xx_pinmux {
91         i2c0_pins: pinmux_i2c0 {
92                 pinctrl-single,pins = <
93                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
94                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
95                 >;
96         };
97         i2c1_pins: pinmux_i2c1 {
98                 pinctrl-single,pins = <
99                         AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE3)        /* mii1_crs,i2c1_sda */
100                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE3)      /* mii1_rxerr,i2c1_scl */
101                 >;
102         };
103 };
104
105 /* Accelerometer */
106 &accel {
107         pinctrl-names = "default";
108         pinctrl-0 = <&accel_pins>;
109
110         Vdd-supply = <&ldo3_reg>;
111         Vdd_IO-supply = <&ldo3_reg>;
112         st,irq1-click;
113         st,wakeup-x-lo;
114         st,wakeup-x-hi;
115         st,wakeup-y-lo;
116         st,wakeup-y-hi;
117         st,wakeup-z-lo;
118         st,wakeup-z-hi;
119         st,min-limit-x = <92>;
120         st,max-limit-x = <14>;
121         st,min-limit-y = <14>;
122         st,max-limit-y = <92>;
123         st,min-limit-z = <92>;
124         st,max-limit-z = <14>;
125 };
126
127 &am33xx_pinmux {
128         accel_pins: pinmux_accel {
129                 pinctrl-single,pins = <
130                         AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT, MUX_MODE7)   /* gpmc_wen.gpio2_4 */
131                 >;
132         };
133 };
134
135 /* Audio */
136 &audio_codec {
137         status = "okay";
138
139         reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
140         AVDD-supply = <&ldo3_reg>;
141         IOVDD-supply = <&ldo3_reg>;
142         DRVDD-supply = <&ldo3_reg>;
143         DVDD-supply = <&dcdc1_reg>;
144 };
145
146 &sound {
147         ti,model = "AM335x-EVM";
148         ti,audio-codec = <&audio_codec>;
149         ti,mcasp-controller = <&mcasp0>;
150         ti,codec-clock-rate = <12000000>;
151         ti,audio-routing =
152                 "Headphone Jack",       "HPLOUT",
153                 "Headphone Jack",       "HPROUT",
154                 "MIC3L",                "Mic3L Switch";
155 };
156
157 &mcasp0 {
158         status = "okay";
159         pinctrl-names = "default";
160         pinctrl-0 = <&audio_pins>;
161
162         op-mode = <0>;  /* MCASP_ISS_MODE */
163         tdm-slots = <2>;
164         serial-dir = <
165                 1 2 0 0
166                 0 0 0 0
167                 0 0 0 0
168                 0 0 0 0
169         >;
170         tx-num-evt = <1>;
171         rx-num-evt = <1>;
172 };
173
174 &am33xx_pinmux {
175         audio_pins: pinmux_audio {
176                 pinctrl-single,pins = <
177                         AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
178                         AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
179                         AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
180                         AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
181                         AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0)
182                         AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)       /* gpmc_a0.gpio1_16 */
183                 >;
184         };
185 };
186
187 /* Display: 24-bit LCD Screen */
188 &panel {
189         status = "okay";
190         pinctrl-names = "default";
191         pinctrl-0 = <&lcd_pins>;
192         panel-info {
193                 ac-bias = <255>;
194                 ac-bias-intrpt = <0>;
195                 dma-burst-sz = <16>;
196                 bpp = <32>;
197                 fdd = <0x80>;
198                 sync-edge = <0>;
199                 sync-ctrl = <1>;
200                 raster-order = <0>;
201                 fifo-th = <0>;
202         };
203         display-timings {
204                 native-mode = <&timing0>;
205                 timing0: 480x272 {
206                         clock-frequency = <18400000>;
207                         hactive = <480>;
208                         vactive = <272>;
209                         hfront-porch = <8>;
210                         hback-porch = <4>;
211                         hsync-len = <41>;
212                         vfront-porch = <4>;
213                         vback-porch = <2>;
214                         vsync-len = <10>;
215                         hsync-active = <1>;
216                         vsync-active = <1>;
217                 };
218         };
219 };
220
221 &lcdc {
222         status = "okay";
223 };
224
225 &am33xx_pinmux {
226         lcd_pins: pinmux_lcd {
227                 pinctrl-single,pins = <
228                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
229                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
230                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
231                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
232                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
233                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
234                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
235                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
236                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
237                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
238                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
239                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
240                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
241                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
242                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
243                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
244                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)      /* gpmc_ad8.lcd_data16 */
245                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)      /* gpmc_ad9.lcd_data17 */
246                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)     /* gpmc_ad10.lcd_data18 */
247                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)     /* gpmc_ad11.lcd_data19 */
248                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)     /* gpmc_ad12.lcd_data20 */
249                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)     /* gpmc_ad13.lcd_data21 */
250                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)     /* gpmc_ad14.lcd_data22 */
251                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)     /* gpmc_ad15.lcd_data23 */
252                         AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
253                         AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
254                         AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
255                         AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
256                         /* Display Enable */
257                         AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLUP, MUX_MODE7)       /* gpmc_a11.gpio1_27 */
258                 >;
259         };
260 };
261
262 /* Ethernet */
263 &cpsw_port1 {
264         phy-handle = <&ethphy0>;
265         phy-mode = "rgmii";
266         ti,dual-emac-pvid = <1>;
267 };
268
269 &cpsw_port2 {
270         phy-handle = <&ethphy1>;
271         phy-mode = "rgmii";
272         ti,dual-emac-pvid = <2>;
273 };
274
275 &davinci_mdio_sw {
276         pinctrl-names = "default";
277         pinctrl-0 = <&mdio_pins>;
278
279         ethphy0: ethernet-phy@0 {
280                 reg = <0>;
281         };
282
283         ethphy1: ethernet-phy@1 {
284                 reg = <1>;
285         };
286 };
287
288 &mac_sw {
289         status = "okay";
290         pinctrl-names = "default";
291         pinctrl-0 = <&ethernet_pins>;
292 };
293
294 &am33xx_pinmux {
295         ethernet_pins: pinmux_ethernet {
296                 pinctrl-single,pins = <
297                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)   /* mii1_txen.rgmii1_tctl */
298                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE2)      /* mii1_rxdv.rgmii1_rctl */
299                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
300                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
301                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
302                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
303                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE2)
304                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE2)
305                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE2)
306                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE2)
307                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE2)
308                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE2)
309                         /* ethernet interrupt */
310                         AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE7)   /* rmii2_refclk.gpio0_29 */
311                         /* ethernet PHY nReset */
312                         AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7)       /* mii1_col.gpio3_0 */
313                 >;
314         };
315
316         mdio_pins: pinmux_mdio {
317                 pinctrl-single,pins = <
318                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
319                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
320                 >;
321         };
322 };
323
324 /* MMC */
325 &mmc1 {
326         /* Bootable SD card slot */
327         status = "okay";
328         vmmc-supply = <&ldo3_reg>;
329         bus-width = <4>;
330         pinctrl-names = "default";
331         pinctrl-0 = <&sd_pins>;
332         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
333 };
334
335 &mmc2 {
336         /* eMMC (not populated) on MMC #2 */
337         status = "disabled";
338         pinctrl-names = "default";
339         pinctrl-0 = <&emmc_pins>;
340         vmmc-supply = <&ldo3_reg>;
341         bus-width = <8>;
342         non-removable;
343 };
344
345 &mmc3 {
346         /* Wifi & Bluetooth on MMC #3 */
347         status = "okay";
348         pinctrl-names = "default";
349         pinctrl-0 = <&wireless_pins>;
350         vmmmc-supply = <&v3v3c_reg>;
351         bus-width = <4>;
352         non-removable;
353         dmas = <&edma_xbar 12 0 1
354                 &edma_xbar 13 0 2>;
355         dma-names = "tx", "rx";
356 };
357
358
359 &am33xx_pinmux {
360         sd_pins: pinmux_sd_card {
361                 pinctrl-single,pins = <
362                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
363                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
364                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
365                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
366                         AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
367                         AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
368                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)               /* spi0_cs1.gpio0_6 */
369                 >;
370         };
371         emmc_pins: pinmux_emmc {
372                 pinctrl-single,pins = <
373                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)       /* gpmc_csn1.mmc1_clk */
374                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)       /* gpmc_csn2.mmc1_cmd */
375                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad0.mmc1_dat0 */
376                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad1.mmc1_dat1 */
377                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad2.mmc1_dat2 */
378                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad3.mmc1_dat3 */
379                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad4.mmc1_dat4 */
380                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad5.mmc1_dat5 */
381                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad6.mmc1_dat6 */
382                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad7.mmc1_dat7 */
383                         /* EMMC nReset */
384                         AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE7)       /* gpmc_wpn.gpio0_31 */
385                 >;
386         };
387         wireless_pins: pinmux_wireless {
388                 pinctrl-single,pins = <
389                         AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
390                         AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
391                         AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
392                         AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE3)       /* gpmc_ben1.mmc2_dat3 */
393                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3)       /* gpmc_csn3.mmc2_cmd */
394                         AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3)        /* gpmc_clk.mmc1_clk */
395                         /* WLAN nReset */
396                         AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7)        /* gpmc_a8.gpio1_24 */
397                         /* WLAN nPower down */
398                         AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_OUTPUT_PULLUP, MUX_MODE7)     /* gpmc_wait0.gpio0_30 */
399                         /* 32kHz Clock */
400                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)     /* xdma_event_intr1.clkout2 */
401                 >;
402         };
403 };
404
405 /* Power */
406 &vbat {
407         regulator-name = "vbat";
408         regulator-min-microvolt = <5000000>;
409         regulator-max-microvolt = <5000000>;
410 };
411
412 &v3v3c_reg {
413         regulator-name = "v3v3c_reg";
414         regulator-min-microvolt = <3300000>;
415         regulator-max-microvolt = <3300000>;
416         vin-supply = <&vbat>;
417 };
418
419 &vdd5_reg {
420         regulator-name = "vdd5_reg";
421         regulator-min-microvolt = <5000000>;
422         regulator-max-microvolt = <5000000>;
423         vin-supply = <&vbat>;
424 };
425
426 /include/ "tps65217.dtsi"
427
428 &tps {
429         backlight {
430                 isel = <1>; /* ISET1 */
431                 fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
432                 default-brightness = <80>;
433         };
434
435         regulators {
436                 dcdc1_reg: regulator@0 {
437                         /* VDD_1V8 system supply */
438                         regulator-always-on;
439                 };
440
441                 dcdc2_reg: regulator@1 {
442                         /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
443                         regulator-name = "vdd_core";
444                         regulator-min-microvolt = <925000>;
445                         regulator-max-microvolt = <1150000>;
446                         regulator-boot-on;
447                         regulator-always-on;
448                 };
449
450                 dcdc3_reg: regulator@2 {
451                         /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
452                         regulator-name = "vdd_mpu";
453                         regulator-min-microvolt = <925000>;
454                         regulator-max-microvolt = <1325000>;
455                         regulator-boot-on;
456                         regulator-always-on;
457                 };
458
459                 ldo1_reg: regulator@3 {
460                         /* VRTC 1.8V always-on supply */
461                         regulator-name = "vrtc,vdds";
462                         regulator-always-on;
463                 };
464
465                 ldo2_reg: regulator@4 {
466                         /* 3.3V rail */
467                         regulator-name = "vdd_3v3aux";
468                         regulator-always-on;
469                 };
470
471                 ldo3_reg: regulator@5 {
472                         /* VDD_3V3A 3.3V rail */
473                         regulator-name = "vdd_3v3a";
474                         regulator-min-microvolt = <3300000>;
475                         regulator-max-microvolt = <3300000>;
476                 };
477
478                 ldo4_reg: regulator@6 {
479                         /* VDD_3V3B 3.3V rail */
480                         regulator-name = "vdd_3v3b";
481                         regulator-always-on;
482                 };
483         };
484 };
485
486 /* SPI Busses */
487 &spi0 {
488         status = "okay";
489         pinctrl-names = "default";
490         pinctrl-0 = <&spi0_pins>;
491 };
492
493 &am33xx_pinmux {
494         spi0_pins: pinmux_spi0 {
495                 pinctrl-single,pins = <
496                         AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
497                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
498                         AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
499                         AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
500                 >;
501         };
502 };
503
504 /* Touch Screen */
505 &tscadc {
506         status = "okay";
507         tsc {
508                 ti,wires = <4>;
509                 ti,x-plate-resistance = <200>;
510                 ti,coordinate-readouts = <5>;
511                 ti,wire-config = <0x00 0x11 0x22 0x33>;
512         };
513
514         adc {
515                 ti,adc-channels = <4 5 6 7>;
516         };
517 };
518
519 /* UARTs */
520 &uart0 {
521         /* Serial Console */
522         status = "okay";
523         pinctrl-names = "default";
524         pinctrl-0 = <&uart0_pins>;
525 };
526
527 &uart1 {
528         /* Broken out to J6 header */
529         status = "okay";
530         pinctrl-names = "default";
531         pinctrl-0 = <&uart1_pins>;
532 };
533
534 &am33xx_pinmux {
535         uart0_pins: pinmux_uart0 {
536                 pinctrl-single,pins = <
537                         AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
538                         AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
539                 >;
540         };
541         uart1_pins: pinmux_uart1 {
542                 pinctrl-single,pins = <
543                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE0)
544                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
545                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
546                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
547                 >;
548         };
549 };
550
551 /* USB */
552 &usb {
553         pinctrl-names = "default";
554         pinctrl-0 = <&usb_pins>;
555 };
556
557 &usb0 {
558         dr_mode = "host";
559 };
560
561 &usb1 {
562         dr_mode = "host";
563 };
564
565 &am33xx_pinmux {
566         usb_pins: pinmux_usb {
567                 pinctrl-single,pins = <
568                         /* USB0 Over-Current (active low) */
569                         AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)        /* gpmc_a9.gpio1_25 */
570                         /* USB1 Over-Current (active low) */
571                         AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)       /* gpmc_a10.gpio1_26 */
572                 >;
573         };
574 };
575
576 /* User IO */
577 &leds {
578         pinctrl-names = "default";
579         pinctrl-0 = <&user_leds_pins>;
580
581         led0 {
582                 label = "pepper:user0:blue";
583                 gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
584                 linux,default-trigger = "none";
585                 default-state = "off";
586         };
587
588         led1 {
589                 label = "pepper:user1:red";
590                 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
591                 linux,default-trigger = "none";
592                 default-state = "off";
593         };
594 };
595
596 &buttons {
597         pinctrl-names = "default";
598         pinctrl-0 = <&user_buttons_pins>;
599         #address-cells = <1>;
600         #size-cells = <0>;
601
602         button0 {
603                 label = "home";
604                 linux,code = <KEY_HOME>;
605                 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
606                 wakeup-source;
607         };
608
609         button1 {
610                 label = "menu";
611                 linux,code = <KEY_MENU>;
612                 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
613                 wakeup-source;
614         };
615
616         buttons2 {
617                 label = "power";
618                 linux,code = <KEY_POWER>;
619                 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
620                 wakeup-source;
621         };
622 };
623
624 &am33xx_pinmux {
625         user_leds_pins: pinmux_user_leds {
626                 pinctrl-single,pins = <
627                         AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE7)       /* gpmc_a4.gpio1_20 */
628                         AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)       /* gpmc_a5.gpio1_21 */
629                 >;
630         };
631
632         user_buttons_pins: pinmux_user_buttons {
633                 pinctrl-single,pins = <
634                         AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
635                         AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_a7.gpio1_21 */
636                         AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE7)       /* gpmc_a8.gpio0_7 */
637                 >;
638         };
639 };