arch/arm/boot/dts/am335x-igep0033.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
   4  *
   5  * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
   6  */
   7
   8 /dts-v1/;
   9
  10 #include "am33xx.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12
  13 / {
  14         cpus {
  15                 cpu@0 {
  16                         cpu0-supply = <&vdd1_reg>;
  17                 };
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x10000000>; /* 256 MB */
  23         };
  24
  25         leds {
  26                 pinctrl-names = "default";
  27                 pinctrl-0 = <&leds_pins>;
  28
  29                 compatible = "gpio-leds";
  30
  31                 led0 {
  32                         label = "com:green:user";
  33                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  34                         default-state = "on";
  35                 };
  36         };
  37
  38         vbat: fixedregulator0 {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "vbat";
  41                 regulator-min-microvolt = <5000000>;
  42                 regulator-max-microvolt = <5000000>;
  43                 regulator-boot-on;
  44         };
  45
  46         vmmc: fixedregulator1 {
  47                 compatible = "regulator-fixed";
  48                 regulator-name = "vmmc";
  49                 regulator-min-microvolt = <3300000>;
  50                 regulator-max-microvolt = <3300000>;
  51         };
  52 };
  53
  54 &am33xx_pinmux {
  55         i2c0_pins: pinmux_i2c0_pins {
  56                 pinctrl-single,pins = <
  57                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
  58                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
  59                 >;
  60         };
  61
  62         nandflash_pins: pinmux_nandflash_pins {
  63                 pinctrl-single,pins = <
  64                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
  65                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
  66                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
  67                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
  68                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
  69                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
  70                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
  71                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
  72                         AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
  73                         AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)        /* gpmc_wpn.gpio0_31 */
  74                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
  75                         AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
  76                         AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
  77                         AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
  78                         AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
  79                 >;
  80         };
  81
  82         uart0_pins: pinmux_uart0_pins {
  83                 pinctrl-single,pins = <
  84                         AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
  85                         AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  86                 >;
  87         };
  88
  89         leds_pins: pinmux_leds_pins {
  90                 pinctrl-single,pins = <
  91                         AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_a7.gpio1_23 */
  92                 >;
  93         };
  94 };
  95
  96 &mac_sw {
  97         status = "okay";
  98 };
  99
 100 &davinci_mdio_sw {
 101
 102         ethphy0: ethernet-phy@0 {
 103                 reg = <0>;
 104         };
 105
 106         ethphy1: ethernet-phy@1 {
 107                 reg = <1>;
 108         };
 109 };
 110
 111 &cpsw_port1 {
 112         phy-handle = <&ethphy0>;
 113         phy-mode = "rmii";
 114         ti,dual-emac-pvid = <1>;
 115 };
 116
 117 &cpsw_port2 {
 118         phy-handle = <&ethphy1>;
 119         phy-mode = "rmii";
 120         ti,dual-emac-pvid = <2>;
 121 };
 122
 123 &elm {
 124         status = "okay";
 125 };
 126
 127 &gpmc {
 128         status = "okay";
 129         pinctrl-names = "default";
 130         pinctrl-0 = <&nandflash_pins>;
 131
 132         ranges = <0 0 0x08000000 0x1000000>;    /* CS0: 16MB for NAND */
 133
 134         nand@0,0 {
 135                 compatible = "ti,omap2-nand";
 136                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 137                 interrupt-parent = <&gpmc>;
 138                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 139                              <1 IRQ_TYPE_NONE>; /* termcount */
 140                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 141                 nand-bus-width = <8>;
 142                 ti,nand-ecc-opt = "bch8";
 143                 gpmc,device-width = <1>;
 144                 gpmc,sync-clk-ps = <0>;
 145                 gpmc,cs-on-ns = <0>;
 146                 gpmc,cs-rd-off-ns = <44>;
 147                 gpmc,cs-wr-off-ns = <44>;
 148                 gpmc,adv-on-ns = <6>;
 149                 gpmc,adv-rd-off-ns = <34>;
 150                 gpmc,adv-wr-off-ns = <44>;
 151                 gpmc,we-on-ns = <0>;
 152                 gpmc,we-off-ns = <40>;
 153                 gpmc,oe-on-ns = <0>;
 154                 gpmc,oe-off-ns = <54>;
 155                 gpmc,access-ns = <64>;
 156                 gpmc,rd-cycle-ns = <82>;
 157                 gpmc,wr-cycle-ns = <82>;
 158                 gpmc,bus-turnaround-ns = <0>;
 159                 gpmc,cycle2cycle-delay-ns = <0>;
 160                 gpmc,clk-activation-ns = <0>;
 161                 gpmc,wr-access-ns = <40>;
 162                 gpmc,wr-data-mux-bus-ns = <0>;
 163
 164                 #address-cells = <1>;
 165                 #size-cells = <1>;
 166                 ti,elm-id = <&elm>;
 167
 168                 /* MTD partition table */
 169                 partition@0 {
 170                         label = "SPL";
 171                         reg = <0x00000000 0x000080000>;
 172                 };
 173
 174                 partition@1 {
 175                         label = "U-boot";
 176                         reg = <0x00080000 0x001e0000>;
 177                 };
 178
 179                 partition@2 {
 180                         label = "U-Boot Env";
 181                         reg = <0x00260000 0x00020000>;
 182                 };
 183
 184                 partition@3 {
 185                         label = "Kernel";
 186                         reg = <0x00280000 0x00500000>;
 187                 };
 188
 189                 partition@4 {
 190                         label = "File System";
 191                         reg = <0x00780000 0x007880000>;
 192                 };
 193         };
 194 };
 195
 196 &i2c0 {
 197         status = "okay";
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&i2c0_pins>;
 200
 201         clock-frequency = <400000>;
 202
 203         tps: tps@2d {
 204                 reg = <0x2d>;
 205         };
 206 };
 207
 208 &mmc1 {
 209         status = "okay";
 210         vmmc-supply = <&vmmc>;
 211         bus-width = <4>;
 212 };
 213
 214 &uart0 {
 215         status = "okay";
 216         pinctrl-names = "default";
 217         pinctrl-0 = <&uart0_pins>;
 218 };
 219
 220 &usb1 {
 221         dr_mode = "host";
 222 };
 223
 224 #include "tps65910.dtsi"
 225
 226 &tps {
 227         vcc1-supply = <&vbat>;
 228         vcc2-supply = <&vbat>;
 229         vcc3-supply = <&vbat>;
 230         vcc4-supply = <&vbat>;
 231         vcc5-supply = <&vbat>;
 232         vcc6-supply = <&vbat>;
 233         vcc7-supply = <&vbat>;
 234         vccio-supply = <&vbat>;
 235
 236         regulators {
 237                 vrtc_reg: regulator@0 {
 238                         regulator-always-on;
 239                 };
 240
 241                 vio_reg: regulator@1 {
 242                         regulator-always-on;
 243                 };
 244
 245                 vdd1_reg: regulator@2 {
 246                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 247                         regulator-name = "vdd_mpu";
 248                         regulator-min-microvolt = <912500>;
 249                         regulator-max-microvolt = <1312500>;
 250                         regulator-boot-on;
 251                         regulator-always-on;
 252                 };
 253
 254                 vdd2_reg: regulator@3 {
 255                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 256                         regulator-name = "vdd_core";
 257                         regulator-min-microvolt = <912500>;
 258                         regulator-max-microvolt = <1150000>;
 259                         regulator-boot-on;
 260                         regulator-always-on;
 261                 };
 262
 263                 vdd3_reg: regulator@4 {
 264                         regulator-always-on;
 265                 };
 266
 267                 vdig1_reg: regulator@5 {
 268                         regulator-always-on;
 269                 };
 270
 271                 vdig2_reg: regulator@6 {
 272                         regulator-always-on;
 273                 };
 274
 275                 vpll_reg: regulator@7 {
 276                         regulator-always-on;
 277                 };
 278
 279                 vdac_reg: regulator@8 {
 280                         regulator-always-on;
 281                 };
 282
 283                 vaux1_reg: regulator@9 {
 284                         regulator-always-on;
 285                 };
 286
 287                 vaux2_reg: regulator@10 {
 288                         regulator-always-on;
 289                 };
 290
 291                 vaux33_reg: regulator@11 {
 292                         regulator-always-on;
 293                 };
 294
 295                 vmmc_reg: regulator@12 {
 296                         regulator-always-on;
 297                 };
 298         };
 299 };
 300