1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-tsadc # PX30 SoCs
16 - rockchip,rv1108-tsadc # RV1108 SoCs
17 - rockchip,rk3228-tsadc # RK3228 SoCs
18 - rockchip,rk3288-tsadc # RK3288 SoCs
19 - rockchip,rk3328-tsadc # RK3328 SoCs
20 - rockchip,rk3368-tsadc # RK3368 SoCs
21 - rockchip,rk3399-tsadc # RK3399 SoCs
22 - rockchip,rk3568-tsadc # RK3568 SoCs
46 "#thermal-sensor-cells":
50 description: The phandle of the syscon node for the general register file.
51 $ref: /schemas/types.yaml#/definitions/phandle
53 rockchip,hw-tshut-temp:
54 description: The hardware-controlled shutdown temperature value.
55 $ref: /schemas/types.yaml#/definitions/uint32
57 rockchip,hw-tshut-mode:
58 description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
59 $ref: /schemas/types.yaml#/definitions/uint32
62 rockchip,hw-tshut-polarity:
63 description: The hardware-controlled active polarity 0:LOW 1:HIGH.
64 $ref: /schemas/types.yaml#/definitions/uint32
75 - "#thermal-sensor-cells"
77 additionalProperties: false
81 #include <dt-bindings/interrupt-controller/arm-gic.h>
82 #include <dt-bindings/clock/rk3288-cru.h>
84 tsadc: tsadc@ff280000 {
85 compatible = "rockchip,rk3288-tsadc";
86 reg = <0xff280000 0x100>;
87 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
88 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
89 clock-names = "tsadc", "apb_pclk";
90 resets = <&cru SRST_TSADC>;
91 reset-names = "tsadc-apb";
92 #thermal-sensor-cells = <1>;
93 rockchip,hw-tshut-temp = <95000>;
94 rockchip,hw-tshut-mode = <0>;
95 rockchip,hw-tshut-polarity = <0>;