Documentation/devicetree/bindings/spi/spi-rockchip.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip SPI Controller
   8
   9 description:
  10   The Rockchip SPI controller is used to interface with various devices such
  11   as flash and display controllers using the SPI communication interface.
  12
  13 allOf:
  14   - $ref: "spi-controller.yaml#"
  15
  16 maintainers:
  17   - Heiko Stuebner <heiko@sntech.de>
  18
  19 # Everything else is described in the common file
  20 properties:
  21   compatible:
  22     oneOf:
  23       - const: rockchip,rk3036-spi
  24       - const: rockchip,rk3066-spi
  25       - const: rockchip,rk3228-spi
  26       - const: rockchip,rv1108-spi
  27       - items:
  28           - enum:
  29               - rockchip,px30-spi
  30               - rockchip,rk3188-spi
  31               - rockchip,rk3288-spi
  32               - rockchip,rk3308-spi
  33               - rockchip,rk3328-spi
  34               - rockchip,rk3368-spi
  35               - rockchip,rk3399-spi
  36               - rockchip,rv1126-spi
  37           - const: rockchip,rk3066-spi
  38
  39   reg:
  40     maxItems: 1
  41
  42   interrupts:
  43     maxItems: 1
  44
  45   clocks:
  46     items:
  47       - description: transfer-clock
  48       - description: peripheral clock
  49
  50   clock-names:
  51     items:
  52       - const: spiclk
  53       - const: apb_pclk
  54
  55   dmas:
  56     items:
  57       - description: TX DMA Channel
  58       - description: RX DMA Channel
  59
  60   dma-names:
  61     items:
  62       - const: tx
  63       - const: rx
  64
  65   rx-sample-delay-ns:
  66     default: 0
  67     description:
  68       Nano seconds to delay after the SCLK edge before sampling Rx data
  69       (may need to be fine tuned for high capacitance lines).
  70       If not specified 0 will be used.
  71
  72   pinctrl-names:
  73     minItems: 1
  74     items:
  75       - const: default
  76       - const: sleep
  77     description:
  78       Names for the pin configuration(s); may be "default" or "sleep",
  79       where the "sleep" configuration may describe the state
  80       the pins should be in during system suspend.
  81
  82 required:
  83   - compatible
  84   - reg
  85   - interrupts
  86   - clocks
  87   - clock-names
  88
  89 unevaluatedProperties: false
  90
  91 examples:
  92   - |
  93     #include <dt-bindings/clock/rk3188-cru-common.h>
  94     #include <dt-bindings/interrupt-controller/arm-gic.h>
  95     #include <dt-bindings/interrupt-controller/irq.h>
  96     spi0: spi@ff110000 {
  97       compatible = "rockchip,rk3066-spi";
  98       reg = <0xff110000 0x1000>;
  99       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 100       clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
 101       clock-names = "spiclk", "apb_pclk";
 102       dmas = <&pdma1 11>, <&pdma1 12>;
 103       dma-names = "tx", "rx";
 104       pinctrl-0 = <&spi1_pins>;
 105       pinctrl-1 = <&spi1_sleep>;
 106       pinctrl-names = "default", "sleep";
 107       rx-sample-delay-ns = <10>;
 108       #address-cells = <1>;
 109       #size-cells = <0>;
 110     };