Documentation/devicetree/bindings/sound/fsl,xcvr.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: NXP Audio Transceiver (XCVR) Controller
   8
   9 maintainers:
  10   - Viorel Suman <viorel.suman@nxp.com>
  11
  12 description: |
  13   NXP XCVR (Audio Transceiver) is a on-chip functional module
  14   that allows CPU to receive and transmit digital audio via
  15   HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
  16
  17 properties:
  18   $nodename:
  19     pattern: "^xcvr@.*"
  20
  21   compatible:
  22     enum:
  23       - fsl,imx8mp-xcvr
  24
  25   reg:
  26     items:
  27       - description: 20K RAM for code and data
  28       - description: registers space
  29       - description: RX FIFO address
  30       - description: TX FIFO address
  31
  32   reg-names:
  33     items:
  34       - const: ram
  35       - const: regs
  36       - const: rxfifo
  37       - const: txfifo
  38
  39   interrupts:
  40     maxItems: 1
  41
  42   clocks:
  43     items:
  44       - description: Peripheral clock
  45       - description: PHY clock
  46       - description: SPBA clock
  47       - description: PLL clock
  48
  49   clock-names:
  50     items:
  51       - const: ipg
  52       - const: phy
  53       - const: spba
  54       - const: pll_ipg
  55
  56   dmas:
  57     items:
  58       - description: DMA controller phandle and request line for RX
  59       - description: DMA controller phandle and request line for TX
  60
  61   dma-names:
  62     items:
  63       - const: rx
  64       - const: tx
  65
  66   resets:
  67     maxItems: 1
  68
  69 required:
  70   - compatible
  71   - reg
  72   - reg-names
  73   - interrupts
  74   - clocks
  75   - clock-names
  76   - dmas
  77   - dma-names
  78   - resets
  79
  80 additionalProperties: false
  81
  82 examples:
  83   - |
  84     #include <dt-bindings/interrupt-controller/arm-gic.h>
  85     #include <dt-bindings/clock/imx8mp-clock.h>
  86     #include <dt-bindings/reset/imx8mp-reset.h>
  87
  88     xcvr: xcvr@30cc0000 {
  89            compatible = "fsl,imx8mp-xcvr";
  90            reg = <0x30cc0000 0x800>,
  91                  <0x30cc0800 0x400>,
  92                  <0x30cc0c00 0x080>,
  93                  <0x30cc0e00 0x080>;
  94            reg-names = "ram", "regs", "rxfifo", "txfifo";
  95            interrupts = <0x0 128 IRQ_TYPE_LEVEL_HIGH>;
  96            clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
  97                     <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
  98                     <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
  99                     <&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
 100            clock-names = "ipg", "phy", "spba", "pll_ipg";
 101            dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
 102            dma-names = "rx", "tx";
 103            resets = <&audiomix_reset 0>;
 104     };