1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi/Microchip Serial GPIO controller
10 - Lars Povlsen <lars.povlsen@microchip.com>
13 By using a serial interface, the SIO controller significantly extend
14 the number of available GPIOs with a minimum number of additional
15 pins on the device. The primary purpose of the SIO controllers is to
16 connect control signals from SFP modules and to act as an LED
21 pattern: "^gpio@[0-9a-f]+$"
25 - microchip,sparx5-sgpio
41 microchip,sgpio-port-ranges:
42 description: This is a sequence of tuples, defining intervals of
43 enabled ports in the serial input stream. The enabled ports must
44 match the hardware configuration in order for signals to be
45 properly written/read to/from the controller holding
46 registers. Being tuples, then number of arguments must be
47 even. The tuples mast be ordered (low, high) and are
49 $ref: /schemas/types.yaml#/definitions/uint32-matrix
53 "low" indicates start bit number of range
57 "high" indicates end bit number of range
64 description: The sgpio controller frequency (Hz). This dictates
65 the serial bitstream speed, which again affects the latency in
66 getting control signals back and forth between external shift
67 registers. The speed must be no larger than half the system
68 clock, and larger than zero.
76 const: microchip,sparx5-sgpio-bank
80 The GPIO bank number. "0" is designates the input pin bank,
88 Specifies the pin (port and bit) and flags. Note that the
89 SGIO pin is defined by *2* numbers, a port number between 0
90 and 31, and a bit index, 0 to 3. The maximum bit number is
91 controlled indirectly by the "ngpios" property: (ngpios/32).
95 description: Specifies the sgpio IRQ (in parent controller)
98 interrupt-controller: true
102 Specifies the pin (port and bit) and flags, as defined in
103 defined in include/dt-bindings/interrupt-controller/irq.h
107 description: The numbers of GPIO's exposed. This must be a
119 additionalProperties: false
121 additionalProperties: false
127 - microchip,sgpio-port-ranges
133 #include <dt-bindings/interrupt-controller/arm-gic.h>
134 sgpio2: gpio@1101059c {
135 #address-cells = <1>;
137 compatible = "microchip,sparx5-sgpio";
139 pinctrl-0 = <&sgpio2_pins>;
140 pinctrl-names = "default";
141 reg = <0x1101059c 0x100>;
142 microchip,sgpio-port-ranges = <0 0>, <16 18>, <28 31>;
143 bus-frequency = <25000000>;
146 compatible = "microchip,sparx5-sgpio-bank";
150 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
151 interrupt-controller;
152 #interrupt-cells = <3>;
155 compatible = "microchip,sparx5-sgpio-bank";