Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt

   1 Rockchip EMMC PHY
   2 -----------------------
   3
   4 Required properties:
   5  - compatible: rockchip,rk3399-emmc-phy
   6  - #phy-cells: must be 0
   7  - reg: PHY register address offset and length in "general
   8    register files"
   9
  10 Optional properties:
  11  - clock-names: Should contain "emmcclk".  Although this is listed as optional
  12                 (because most boards can get basic functionality without having
  13                 access to it), it is strongly suggested.
  14                 See ../clock/clock-bindings.txt for details.
  15  - clocks: Should have a phandle to the card clock exported by the SDHCI driver.
  16  - drive-impedance-ohm: Specifies the drive impedance in Ohm.
  17                         Possible values are 33, 40, 50, 66 and 100.
  18                         If not set, the default value of 50 will be applied.
  19  - enable-strobe-pulldown: Enable internal pull-down for the strobe line.
  20                            If not set, pull-down is not used.
  21  - output-tapdelay-select: Specifies the phyctrl_otapdlysec register.
  22                            If not set, the register defaults to 0x4.
  23                            Maximum value 0xf.
  24
  25 Example:
  26
  27
  28 grf: syscon@ff770000 {
  29         compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
  30         #address-cells = <1>;
  31         #size-cells = <1>;
  32
  33 ...
  34
  35         emmcphy: phy@f780 {
  36                 compatible = "rockchip,rk3399-emmc-phy";
  37                 reg = <0xf780 0x20>;
  38                 clocks = <&sdhci>;
  39                 clock-names = "emmcclk";
  40                 drive-impedance-ohm = <50>;
  41                 #phy-cells = <0>;
  42         };
  43 };