Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: TI AM65 PCI Host
   9
  10 maintainers:
  11   - Kishon Vijay Abraham I <kishon@ti.com>
  12
  13 allOf:
  14   - $ref: /schemas/pci/pci-bus.yaml#
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - ti,am654-pcie-rc
  20       - ti,keystone-pcie
  21
  22   reg:
  23     maxItems: 4
  24
  25   reg-names:
  26     items:
  27       - const: app
  28       - const: dbics
  29       - const: config
  30       - const: atu
  31
  32   power-domains:
  33     maxItems: 1
  34
  35   ti,syscon-pcie-id:
  36     description: Phandle to the SYSCON entry required for getting PCIe device/vendor ID
  37     $ref: /schemas/types.yaml#/definitions/phandle
  38
  39   ti,syscon-pcie-mode:
  40     description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
  41     $ref: /schemas/types.yaml#/definitions/phandle
  42
  43   msi-map: true
  44
  45   dma-coherent: true
  46
  47 required:
  48   - compatible
  49   - reg
  50   - reg-names
  51   - max-link-speed
  52   - ti,syscon-pcie-id
  53   - ti,syscon-pcie-mode
  54   - ranges
  55
  56 if:
  57   properties:
  58     compatible:
  59       enum:
  60         - ti,am654-pcie-rc
  61 then:
  62   required:
  63     - dma-coherent
  64     - power-domains
  65     - msi-map
  66
  67 unevaluatedProperties: false
  68
  69 examples:
  70   - |
  71     #include <dt-bindings/interrupt-controller/arm-gic.h>
  72     #include <dt-bindings/interrupt-controller/irq.h>
  73     #include <dt-bindings/soc/ti,sci_pm_domain.h>
  74
  75     pcie0_rc: pcie@5500000 {
  76         compatible = "ti,am654-pcie-rc";
  77         reg =  <0x5500000 0x1000>,
  78                <0x5501000 0x1000>,
  79                <0x10000000 0x2000>,
  80                <0x5506000 0x1000>;
  81         reg-names = "app", "dbics", "config", "atu";
  82         power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
  83         #address-cells = <3>;
  84         #size-cells = <2>;
  85         ranges = <0x81000000 0 0          0x10020000 0 0x00010000>,
  86                  <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>;
  87         ti,syscon-pcie-id = <&pcie_devid>;
  88         ti,syscon-pcie-mode = <&pcie0_mode>;
  89         bus-range = <0x0 0xff>;
  90         num-viewport = <16>;
  91         max-link-speed = <2>;
  92         dma-coherent;
  93         interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
  94         msi-map = <0x0 &gic_its 0x0 0x10000>;
  95         device_type = "pci";
  96     };