1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare PCIe endpoint interface
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
14 Synopsys DesignWare PCIe host controller endpoint
17 - $ref: /schemas/pci/pci-ep.yaml#
23 - const: snps,dw-pcie-ep
27 It should contain Data Bus Interface (dbi) and config registers for all
29 For designware core version >= 4.80, it may contain ATU address space.
37 enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
40 description: GPIO pin number of PERST# signal
45 description: GPIO controlled connection to PERST# signal
48 snps,enable-cdm-check:
51 This is a boolean property and if present enables
52 automatic checking of CDM (Configuration Dependent Module) registers
53 for data corruption. CDM registers include standard PCIe configuration
54 space registers, Port Logic registers, DMA and iATU (internal Address
55 Translation Unit) registers.
58 description: number of inbound address translation windows
63 description: number of outbound address translation windows
68 $ref: /schemas/types.yaml#/definitions/uint32
69 description: maximum number of functions that can be configured
76 unevaluatedProperties: false
84 compatible = "snps,dw-pcie-ep";
85 reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
86 <0xdfc01000 0x0001000>, /* IP registers 2 */
87 <0xd0000000 0x2000000>; /* Configuration space */
88 reg-names = "dbi", "dbi2", "addr_space";