Documentation/devicetree/bindings/net/renesas,etheravb.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/renesas,etheravb.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas Ethernet AVB
   8
   9 maintainers:
  10   - Sergei Shtylyov <sergei.shtylyov@gmail.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - enum:
  17               - renesas,etheravb-r8a7742      # RZ/G1H
  18               - renesas,etheravb-r8a7743      # RZ/G1M
  19               - renesas,etheravb-r8a7744      # RZ/G1N
  20               - renesas,etheravb-r8a7745      # RZ/G1E
  21               - renesas,etheravb-r8a77470     # RZ/G1C
  22               - renesas,etheravb-r8a7790      # R-Car H2
  23               - renesas,etheravb-r8a7791      # R-Car M2-W
  24               - renesas,etheravb-r8a7792      # R-Car V2H
  25               - renesas,etheravb-r8a7793      # R-Car M2-N
  26               - renesas,etheravb-r8a7794      # R-Car E2
  27           - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1
  28
  29       - items:
  30           - enum:
  31               - renesas,etheravb-r8a774a1     # RZ/G2M
  32               - renesas,etheravb-r8a774b1     # RZ/G2N
  33               - renesas,etheravb-r8a774c0     # RZ/G2E
  34               - renesas,etheravb-r8a774e1     # RZ/G2H
  35               - renesas,etheravb-r8a7795      # R-Car H3
  36               - renesas,etheravb-r8a7796      # R-Car M3-W
  37               - renesas,etheravb-r8a77961     # R-Car M3-W+
  38               - renesas,etheravb-r8a77965     # R-Car M3-N
  39               - renesas,etheravb-r8a77970     # R-Car V3M
  40               - renesas,etheravb-r8a77980     # R-Car V3H
  41               - renesas,etheravb-r8a77990     # R-Car E3
  42               - renesas,etheravb-r8a77995     # R-Car D3
  43               - renesas,etheravb-r8a779a0     # R-Car V3U
  44           - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2
  45
  46       - items:
  47           - enum:
  48               - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
  49           - const: renesas,rzg2l-gbeth  # RZ/G2L
  50
  51   reg: true
  52
  53   interrupts: true
  54
  55   interrupt-names: true
  56
  57   clocks: true
  58
  59   clock-names: true
  60
  61   iommus:
  62     maxItems: 1
  63
  64   power-domains:
  65     maxItems: 1
  66
  67   resets:
  68     maxItems: 1
  69
  70   phy-mode: true
  71
  72   phy-handle: true
  73
  74   '#address-cells':
  75     description: Number of address cells for the MDIO bus.
  76     const: 1
  77
  78   '#size-cells':
  79     description: Number of size cells on the MDIO bus.
  80     const: 0
  81
  82   renesas,no-ether-link:
  83     type: boolean
  84     description:
  85       Specify when a board does not provide a proper AVB_LINK signal.
  86
  87   renesas,ether-link-active-low:
  88     type: boolean
  89     description:
  90       Specify when the AVB_LINK signal is active-low instead of normal
  91       active-high.
  92
  93   rx-internal-delay-ps:
  94     enum: [0, 1800]
  95
  96   tx-internal-delay-ps:
  97     enum: [0, 2000]
  98
  99 patternProperties:
 100   "^ethernet-phy@[0-9a-f]$":
 101     type: object
 102     $ref: ethernet-phy.yaml#
 103
 104 required:
 105   - compatible
 106   - reg
 107   - interrupts
 108   - clocks
 109   - power-domains
 110   - resets
 111   - phy-mode
 112   - phy-handle
 113   - '#address-cells'
 114   - '#size-cells'
 115
 116 allOf:
 117   - $ref: ethernet-controller.yaml#
 118
 119   - if:
 120       properties:
 121         compatible:
 122           contains:
 123             enum:
 124               - renesas,etheravb-rcar-gen2
 125               - renesas,etheravb-r8a7795
 126               - renesas,etheravb-r8a7796
 127               - renesas,etheravb-r8a77961
 128               - renesas,etheravb-r8a77965
 129     then:
 130       properties:
 131         reg:
 132           items:
 133             - description: MAC register block
 134             - description: Stream buffer
 135     else:
 136       properties:
 137         reg:
 138           items:
 139             - description: MAC register block
 140
 141   - if:
 142       properties:
 143         compatible:
 144           contains:
 145             enum:
 146               - renesas,etheravb-rcar-gen2
 147               - renesas,rzg2l-gbeth
 148     then:
 149       properties:
 150         interrupts:
 151           minItems: 1
 152           maxItems: 3
 153         interrupt-names:
 154           minItems: 1
 155           items:
 156             - const: mux
 157             - const: fil
 158             - const: arp_ns
 159         rx-internal-delay-ps: false
 160     else:
 161       properties:
 162         interrupts:
 163           minItems: 25
 164           maxItems: 25
 165         interrupt-names:
 166           items:
 167             pattern: '^ch[0-9]+$'
 168       required:
 169         - interrupt-names
 170         - rx-internal-delay-ps
 171
 172   - if:
 173       properties:
 174         compatible:
 175           contains:
 176             enum:
 177               - renesas,etheravb-r8a774a1
 178               - renesas,etheravb-r8a774b1
 179               - renesas,etheravb-r8a774e1
 180               - renesas,etheravb-r8a7795
 181               - renesas,etheravb-r8a7796
 182               - renesas,etheravb-r8a77961
 183               - renesas,etheravb-r8a77965
 184               - renesas,etheravb-r8a77970
 185               - renesas,etheravb-r8a77980
 186               - renesas,etheravb-r8a779a0
 187     then:
 188       required:
 189         - tx-internal-delay-ps
 190     else:
 191       properties:
 192         tx-internal-delay-ps: false
 193
 194   - if:
 195       properties:
 196         compatible:
 197           contains:
 198             const: renesas,etheravb-r8a77995
 199     then:
 200       properties:
 201         rx-internal-delay-ps:
 202           const: 1800
 203
 204   - if:
 205       properties:
 206         compatible:
 207           contains:
 208             const: renesas,etheravb-r8a77980
 209     then:
 210       properties:
 211         tx-internal-delay-ps:
 212           const: 2000
 213
 214   - if:
 215       properties:
 216         compatible:
 217           contains:
 218             const: renesas,rzg2l-gbeth
 219     then:
 220       properties:
 221         clocks:
 222           items:
 223             - description: Main clock
 224             - description: Register access clock
 225             - description: Reference clock for RGMII
 226         clock-names:
 227           items:
 228             - const: axi
 229             - const: chi
 230             - const: refclk
 231     else:
 232       properties:
 233         clocks:
 234           minItems: 1
 235           items:
 236             - description: AVB functional clock
 237             - description: Optional TXC reference clock
 238         clock-names:
 239           minItems: 1
 240           items:
 241             - const: fck
 242             - const: refclk
 243
 244 additionalProperties: false
 245
 246 examples:
 247   - |
 248     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
 249     #include <dt-bindings/interrupt-controller/arm-gic.h>
 250     #include <dt-bindings/power/r8a7795-sysc.h>
 251     #include <dt-bindings/gpio/gpio.h>
 252     aliases {
 253             ethernet0 = &avb;
 254     };
 255
 256     avb: ethernet@e6800000 {
 257             compatible = "renesas,etheravb-r8a7795",
 258                          "renesas,etheravb-rcar-gen3";
 259             reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>;
 260             interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 261                          <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 262                          <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 263                          <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 264                          <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 265                          <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 266                          <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 267                          <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 268                          <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 269                          <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 270                          <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 271                          <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 272                          <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 273                          <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 274                          <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 275                          <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 276                          <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 277                          <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 278                          <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 279                          <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 280                          <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 281                          <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 282                          <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 283                          <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 284                          <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 285             interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6",
 286                               "ch7", "ch8", "ch9", "ch10", "ch11", "ch12",
 287                               "ch13", "ch14", "ch15", "ch16", "ch17", "ch18",
 288                               "ch19", "ch20", "ch21", "ch22", "ch23", "ch24";
 289             clocks = <&cpg CPG_MOD 812>;
 290             iommus = <&ipmmu_ds0 16>;
 291             power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 292             resets = <&cpg 812>;
 293             phy-mode = "rgmii";
 294             phy-handle = <&phy0>;
 295             rx-internal-delay-ps = <0>;
 296             tx-internal-delay-ps = <2000>;
 297             #address-cells = <1>;
 298             #size-cells = <0>;
 299
 300             phy0: ethernet-phy@0 {
 301                     rxc-skew-ps = <1500>;
 302                     reg = <0>;
 303                     interrupt-parent = <&gpio2>;
 304                     interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 305                     reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 306             };
 307     };