Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt

   1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
   2
   3 This MDIO bus multiplexer defines buses that could be internal as well as
   4 external to SoCs and could accept MDIO transaction compatible to C-22 or
   5 C-45 Clause. When child bus is selected, one needs to select these two
   6 properties as well to generate desired MDIO transaction on appropriate bus.
   7
   8 Required properties in addition to the generic multiplexer properties:
   9
  10 MDIO multiplexer node:
  11 - compatible: brcm,mdio-mux-iproc.
  12
  13 Every non-ethernet PHY requires a compatible so that it could be probed based
  14 on this compatible string.
  15
  16 Optional properties:
  17 - clocks: phandle of the core clock which drives the mdio block.
  18
  19 Additional information regarding generic multiplexer properties can be found
  20 at- Documentation/devicetree/bindings/net/mdio-mux.yaml
  21
  22
  23 for example:
  24                 mdio_mux_iproc: mdio-mux@66020000 {
  25                         compatible = "brcm,mdio-mux-iproc";
  26                         reg = <0x66020000 0x250>;
  27                         #address-cells = <1>;
  28                         #size-cells = <0>;
  29
  30                         mdio@0 {
  31                                 reg = <0x0>;
  32                                 #address-cells = <1>;
  33                                 #size-cells = <0>;
  34
  35                                 pci_phy0: pci-phy@0 {
  36                                         compatible = "brcm,ns2-pcie-phy";
  37                                         reg = <0x0>;
  38                                         #phy-cells = <0>;
  39                                 };
  40                         };
  41
  42                         mdio@7 {
  43                                 reg = <0x7>;
  44                                 #address-cells = <1>;
  45                                 #size-cells = <0>;
  46
  47                                 pci_phy1: pci-phy@0 {
  48                                         compatible = "brcm,ns2-pcie-phy";
  49                                         reg = <0x0>;
  50                                         #phy-cells = <0>;
  51                                 };
  52                         };
  53                         mdio@10 {
  54                                 reg = <0x10>;
  55                                 #address-cells = <1>;
  56                                 #size-cells = <0>;
  57
  58                                 gphy0: eth-phy@10 {
  59                                         reg = <0x10>;
  60                                 };
  61                         };
  62                 };